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From ad908df5b5037252c7d619acb23b5a6d04049641 Mon Sep 17 00:00:00 2001
From: Jordan Lazare <Jordan.Lazare@amd.com>
Date: Thu, 25 Feb 2016 17:27:53 -0500
Subject: [PATCH 0874/1110] drm/amd/dal: Temporarily disable HW i2c on DCE80
HWi2c has a bug where we aren't able to read edid. Temporarily force SW
i2c on DCE8 until we can fix the issue
Signed-off-by: Jordan Lazare <Jordan.Lazare@amd.com>
Reviewed-by: Eagle Yeh <Eagle.Yeh@amd.com>
Acked-by: Harry Wentland<harry.wentland@amd.com>
---
drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_services.c | 8 --------
drivers/gpu/drm/amd/dal/dc/core/dc_link.c | 2 +-
drivers/gpu/drm/amd/dal/dc/core/dc_link_dp.c | 6 ++----
drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c | 2 +-
drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c | 2 +-
drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator_v.c | 2 +-
drivers/gpu/drm/amd/dal/dc/dm_services.h | 2 --
drivers/gpu/drm/amd/dal/dc/gpio/dce110/hw_ddc_dce110.c | 8 ++++----
drivers/gpu/drm/amd/dal/dc/gpio/dce80/hw_ddc_dce80.c | 8 ++++----
drivers/gpu/drm/amd/dal/dc/i2caux/aux_engine.c | 4 ++--
drivers/gpu/drm/amd/dal/dc/i2caux/dce80/i2caux_dce80.c | 7 +++++--
11 files changed, 21 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_services.c b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_services.c
index d89f9c4..03337f3 100644
--- a/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_services.c
+++ b/drivers/gpu/drm/amd/dal/amdgpu_dm/amdgpu_dm_services.c
@@ -40,14 +40,6 @@
#define dm_realloc(ptr, size) krealloc(ptr, size, GFP_KERNEL)
#define dm_free(ptr) kfree(ptr)
-void dm_sleep_in_milliseconds(struct dc_context *ctx, uint32_t milliseconds)
-{
- if (milliseconds >= 20)
- msleep(milliseconds);
- else
- usleep_range(milliseconds*1000, milliseconds*1000+1);
-}
-
/******************************************************************************
* IRQ Interfaces.
*****************************************************************************/
diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c
index 01c28f2..0903b0e 100644
--- a/drivers/gpu/drm/amd/dal/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link.c
@@ -1254,7 +1254,7 @@ static enum dc_status enable_link(struct pipe_ctx *pipe_ctx)
break;
case SIGNAL_TYPE_DISPLAY_PORT_MST:
status = enable_link_dp_mst(pipe_ctx);
- dm_sleep_in_milliseconds(pipe_ctx->stream->ctx, 200);
+ msleep(200);
break;
case SIGNAL_TYPE_DVI_SINGLE_LINK:
case SIGNAL_TYPE_DVI_DUAL_LINK:
diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/dal/dc/core/dc_link_dp.c
index 48e3e4d..aab73ff 100644
--- a/drivers/gpu/drm/amd/dal/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/dal/dc/core/dc_link_dp.c
@@ -702,7 +702,7 @@ static bool perform_post_lt_adj_req_sequence(
break;
}
- dm_sleep_in_milliseconds(link->ctx, 1);
+ msleep(1);
}
if (!req_drv_setting_changed) {
@@ -1163,9 +1163,7 @@ bool dp_hbr_verify_link_cap(
if (success)
break;
- dm_sleep_in_milliseconds(
- link->ctx,
- delay_between_retries);
+ msleep(delay_between_retries);
delay_between_retries += 10;
}
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
index 71ef1de..525a923 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
@@ -649,7 +649,7 @@ static void link_encoder_edp_wait_for_hpd_ready(
break;
}
- dm_sleep_in_milliseconds(ctx, HPD_CHECK_INTERVAL);
+ msleep(HPD_CHECK_INTERVAL);
time_elapsed += HPD_CHECK_INTERVAL;
} while (time_elapsed < timeout);
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c
index 70b82f1..61dc9c0 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c
@@ -356,7 +356,7 @@ bool dce110_timing_generator_blank_crtc(struct timing_generator *tg)
CRTC_CURRENT_BLANK_STATE) == 1)
break;
- dm_sleep_in_milliseconds(tg->ctx, 1);
+ msleep(1);
counter--;
}
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator_v.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator_v.c
index 10fc041..fcd2b58 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator_v.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator_v.c
@@ -106,7 +106,7 @@ static bool dce110_timing_generator_v_blank_crtc(struct timing_generator *tg)
CRTC_CURRENT_BLANK_STATE) == 1)
break;
- dm_sleep_in_milliseconds(tg->ctx, 1);
+ msleep(1);
counter--;
}
diff --git a/drivers/gpu/drm/amd/dal/dc/dm_services.h b/drivers/gpu/drm/amd/dal/dc/dm_services.h
index bf315ac..4c45a66 100644
--- a/drivers/gpu/drm/amd/dal/dc/dm_services.h
+++ b/drivers/gpu/drm/amd/dal/dc/dm_services.h
@@ -255,8 +255,6 @@ bool dm_pp_apply_display_requirements(
/****** end of PP interfaces ******/
-void dm_sleep_in_milliseconds(struct dc_context *ctx, uint32_t milliseconds);
-
enum platform_method {
PM_GET_AVAILABLE_METHODS = 1 << 0,
PM_GET_LID_STATE = 1 << 1,
diff --git a/drivers/gpu/drm/amd/dal/dc/gpio/dce110/hw_ddc_dce110.c b/drivers/gpu/drm/amd/dal/dc/gpio/dce110/hw_ddc_dce110.c
index 3e7d42e..7cbdc35 100644
--- a/drivers/gpu/drm/amd/dal/dc/gpio/dce110/hw_ddc_dce110.c
+++ b/drivers/gpu/drm/amd/dal/dc/gpio/dce110/hw_ddc_dce110.c
@@ -692,7 +692,7 @@ static enum gpio_result set_config(
/* should not affect normal I2C R/W */
/* [anaumov] in DAL2, there was
* dc_service_delay_in_microseconds(2500); */
- dm_sleep_in_milliseconds(ptr->ctx, 3);
+ msleep(3);
}
} else {
uint32_t reg2 = regval;
@@ -719,7 +719,7 @@ static enum gpio_result set_config(
/* should not affect normal I2C R/W */
/* [anaumov] in DAL2, there was
* dc_service_delay_in_microseconds(2500); */
- dm_sleep_in_milliseconds(ptr->ctx, 3);
+ msleep(3);
}
if (!scl_pd_dis) {
@@ -732,7 +732,7 @@ static enum gpio_result set_config(
/* should not affect normal I2C R/W */
/* [anaumov] in DAL2, there was
* dc_service_delay_in_microseconds(2500); */
- dm_sleep_in_milliseconds(ptr->ctx, 3);
+ msleep(3);
}
}
@@ -743,7 +743,7 @@ static enum gpio_result set_config(
config_data->config.ddc.clock_en_bit_present)
/* [anaumov] in DAL2, there was
* dc_service_delay_in_microseconds(2000); */
- dm_sleep_in_milliseconds(ptr->ctx, 2);
+ msleep(2);
/* set the I2C pad mode */
/* read the register again,
diff --git a/drivers/gpu/drm/amd/dal/dc/gpio/dce80/hw_ddc_dce80.c b/drivers/gpu/drm/amd/dal/dc/gpio/dce80/hw_ddc_dce80.c
index 5776751..74b980d 100644
--- a/drivers/gpu/drm/amd/dal/dc/gpio/dce80/hw_ddc_dce80.c
+++ b/drivers/gpu/drm/amd/dal/dc/gpio/dce80/hw_ddc_dce80.c
@@ -176,7 +176,7 @@ static enum gpio_result set_config(
/* should not affect normal I2C R/W */
/* [anaumov] in DAL2, there was
* dc_service_delay_in_microseconds(2500); */
- dm_sleep_in_milliseconds(ptr->ctx, 3);
+ msleep(3);
}
} else {
uint32_t reg2 = regval;
@@ -203,7 +203,7 @@ static enum gpio_result set_config(
/* should not affect normal I2C R/W */
/* [anaumov] in DAL2, there was
* dc_service_delay_in_microseconds(2500); */
- dm_sleep_in_milliseconds(ptr->ctx, 3);
+ msleep(3);
}
if (!scl_pd_dis) {
@@ -216,7 +216,7 @@ static enum gpio_result set_config(
/* should not affect normal I2C R/W */
/* [anaumov] in DAL2, there was
* dc_service_delay_in_microseconds(2500); */
- dm_sleep_in_milliseconds(ptr->ctx, 3);
+ msleep(3);
}
}
@@ -227,7 +227,7 @@ static enum gpio_result set_config(
config_data->config.ddc.clock_en_bit_present)
/* [anaumov] in DAL2, there was
* dc_service_delay_in_microseconds(2000); */
- dm_sleep_in_milliseconds(ptr->ctx, 2);
+ msleep(2);
/* set the I2C pad mode */
/* read the register again,
diff --git a/drivers/gpu/drm/amd/dal/dc/i2caux/aux_engine.c b/drivers/gpu/drm/amd/dal/dc/i2caux/aux_engine.c
index a281dc0..c0715d8 100644
--- a/drivers/gpu/drm/amd/dal/dc/i2caux/aux_engine.c
+++ b/drivers/gpu/drm/amd/dal/dc/i2caux/aux_engine.c
@@ -275,7 +275,7 @@ static bool read_command(
if (ctx.operation_succeeded && !ctx.transaction_complete)
if (ctx.request.type == AUX_TRANSACTION_TYPE_I2C)
- dm_sleep_in_milliseconds(engine->base.ctx, engine->delay);
+ msleep(engine->delay);
} while (ctx.operation_succeeded && !ctx.transaction_complete);
return ctx.operation_succeeded;
@@ -475,7 +475,7 @@ static bool write_command(
if (ctx.operation_succeeded && !ctx.transaction_complete)
if (ctx.request.type == AUX_TRANSACTION_TYPE_I2C)
- dm_sleep_in_milliseconds(engine->base.ctx, engine->delay);
+ msleep(engine->delay);
} while (ctx.operation_succeeded && !ctx.transaction_complete);
return ctx.operation_succeeded;
diff --git a/drivers/gpu/drm/amd/dal/dc/i2caux/dce80/i2caux_dce80.c b/drivers/gpu/drm/amd/dal/dc/i2caux/dce80/i2caux_dce80.c
index 1ed6196..1e5c2ad 100644
--- a/drivers/gpu/drm/amd/dal/dc/i2caux/dce80/i2caux_dce80.c
+++ b/drivers/gpu/drm/amd/dal/dc/i2caux/dce80/i2caux_dce80.c
@@ -170,8 +170,11 @@ static bool construct(
uint32_t reference_frequency =
dal_i2caux_get_reference_clock(as) >> 1;
- bool use_i2c_sw_engine = dal_adapter_service_is_feature_supported(
- FEATURE_RESTORE_USAGE_I2C_SW_ENGINE);
+ /*bool use_i2c_sw_engine = dal_adapter_service_is_feature_supported(
+ FEATURE_RESTORE_USAGE_I2C_SW_ENGINE);*/
+
+ /* Use SWI2C for dce8 currently, sicne we have bug with hwi2c */
+ bool use_i2c_sw_engine = true;
uint32_t i;
--
2.7.4
|
