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path: root/common/recipes-kernel/linux/files/0851-drm-amd-dal-move-virtual-hardware-header-files-to-in.patch
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From a95e1ffaafa9040ac1d5f9187073f2b816b5b2a7 Mon Sep 17 00:00:00 2001
From: Tony Cheng <Tony.Cheng@amd.com>
Date: Sat, 27 Feb 2016 11:43:43 -0500
Subject: [PATCH 0851/1110] drm/amd/dal: move virtual hardware header files to
 inc/hw

Signed-off-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
---
 drivers/gpu/drm/amd/dal/Makefile                   |   1 +
 drivers/gpu/drm/amd/dal/dc/core/dc_surface.c       |   2 +-
 drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp.h     |   2 +-
 .../drm/amd/dal/dc/dce110/dce110_link_encoder.h    |   2 +-
 .../gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h   |   2 +-
 .../gpu/drm/amd/dal/dc/dce110/dce110_mem_input_v.h |   2 +-
 drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h     |   2 +-
 drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_v.h   |   2 +-
 .../drm/amd/dal/dc/dce110/dce110_stream_encoder.h  |   2 +-
 .../amd/dal/dc/dce110/dce110_timing_generator.c    |   2 +-
 .../amd/dal/dc/dce110/dce110_timing_generator.h    |   2 +-
 .../amd/dal/dc/dce110/dce110_timing_generator_v.c  |   2 +-
 .../gpu/drm/amd/dal/dc/dce110/dce110_transform.h   |   2 +-
 .../gpu/drm/amd/dal/dc/dce110/dce110_transform_v.h |   2 +-
 drivers/gpu/drm/amd/dal/dc/dce80/dce80_ipp.h       |   2 +-
 .../gpu/drm/amd/dal/dc/dce80/dce80_link_encoder.h  |   2 +-
 drivers/gpu/drm/amd/dal/dc/dce80/dce80_mem_input.h |   2 +-
 drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp.h       |   2 +-
 .../drm/amd/dal/dc/dce80/dce80_stream_encoder.h    |   2 +-
 .../drm/amd/dal/dc/dce80/dce80_timing_generator.c  |   2 +-
 .../drm/amd/dal/dc/dce80/dce80_timing_generator.h  |   2 +-
 drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.h |   2 +-
 drivers/gpu/drm/amd/dal/dc/inc/hw/hw_shared.h      |  74 +++++
 drivers/gpu/drm/amd/dal/dc/inc/hw/ipp.h            | 126 ++++++++
 drivers/gpu/drm/amd/dal/dc/inc/hw/link_encoder.h   | 123 ++++++++
 drivers/gpu/drm/amd/dal/dc/inc/hw/mem_input.h      |  69 +++++
 drivers/gpu/drm/amd/dal/dc/inc/hw/opp.h            | 325 +++++++++++++++++++++
 drivers/gpu/drm/amd/dal/dc/inc/hw/stream_encoder.h |  88 ++++++
 .../gpu/drm/amd/dal/dc/inc/hw/timing_generator.h   | 153 ++++++++++
 drivers/gpu/drm/amd/dal/dc/inc/hw/transform.h      | 192 ++++++++++++
 drivers/gpu/drm/amd/dal/dc/inc/hw_shared.h         |  74 -----
 drivers/gpu/drm/amd/dal/dc/inc/ipp.h               | 126 --------
 drivers/gpu/drm/amd/dal/dc/inc/link_encoder.h      | 123 --------
 drivers/gpu/drm/amd/dal/dc/inc/mem_input.h         |  69 -----
 drivers/gpu/drm/amd/dal/dc/inc/opp.h               | 325 ---------------------
 drivers/gpu/drm/amd/dal/dc/inc/stream_encoder.h    |  88 ------
 drivers/gpu/drm/amd/dal/dc/inc/timing_generator.h  | 153 ----------
 drivers/gpu/drm/amd/dal/dc/inc/transform.h         | 192 ------------
 .../drm/amd/dal/dc/virtual/virtual_link_encoder.h  |   2 +-
 .../amd/dal/dc/virtual/virtual_stream_encoder.h    |   2 +-
 40 files changed, 1174 insertions(+), 1173 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/dal/dc/inc/hw/hw_shared.h
 create mode 100644 drivers/gpu/drm/amd/dal/dc/inc/hw/ipp.h
 create mode 100644 drivers/gpu/drm/amd/dal/dc/inc/hw/link_encoder.h
 create mode 100644 drivers/gpu/drm/amd/dal/dc/inc/hw/mem_input.h
 create mode 100644 drivers/gpu/drm/amd/dal/dc/inc/hw/opp.h
 create mode 100644 drivers/gpu/drm/amd/dal/dc/inc/hw/stream_encoder.h
 create mode 100644 drivers/gpu/drm/amd/dal/dc/inc/hw/timing_generator.h
 create mode 100644 drivers/gpu/drm/amd/dal/dc/inc/hw/transform.h
 delete mode 100644 drivers/gpu/drm/amd/dal/dc/inc/hw_shared.h
 delete mode 100644 drivers/gpu/drm/amd/dal/dc/inc/ipp.h
 delete mode 100644 drivers/gpu/drm/amd/dal/dc/inc/link_encoder.h
 delete mode 100644 drivers/gpu/drm/amd/dal/dc/inc/mem_input.h
 delete mode 100644 drivers/gpu/drm/amd/dal/dc/inc/opp.h
 delete mode 100644 drivers/gpu/drm/amd/dal/dc/inc/stream_encoder.h
 delete mode 100644 drivers/gpu/drm/amd/dal/dc/inc/timing_generator.h
 delete mode 100644 drivers/gpu/drm/amd/dal/dc/inc/transform.h

diff --git a/drivers/gpu/drm/amd/dal/Makefile b/drivers/gpu/drm/amd/dal/Makefile
index 25ae464..a140e0b 100644
--- a/drivers/gpu/drm/amd/dal/Makefile
+++ b/drivers/gpu/drm/amd/dal/Makefile
@@ -10,6 +10,7 @@ subdir-ccflags-y += -Werror
 subdir-ccflags-y += -I$(AMDDALPATH)/ -I$(AMDDALPATH)/include
 
 subdir-ccflags-y += -I$(FULL_AMD_DAL_PATH)/dc/inc/
+subdir-ccflags-y += -I$(FULL_AMD_DAL_PATH)/dc/inc/hw
 
 #TODO: remove when Timing Sync feature is complete
 subdir-ccflags-y += -DBUILD_FEATURE_TIMING_SYNC=0
diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c b/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c
index 7f6f1c3..967b106 100644
--- a/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c
+++ b/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c
@@ -29,7 +29,7 @@
 
 /* DC core (private) */
 #include "core_dc.h"
-#include "inc/transform.h"
+#include "transform.h"
 
 /*******************************************************************************
  * Private structures
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp.h
index 13b9100..0004d7a 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_ipp.h
@@ -26,7 +26,7 @@
 #ifndef __DC_IPP_DCE110_H__
 #define __DC_IPP_DCE110_H__
 
-#include "inc/ipp.h"
+#include "ipp.h"
 
 
 struct gamma_parameters;
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h
index bbddd0b..d1fa4a7 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.h
@@ -26,7 +26,7 @@
 #ifndef __DC_LINK_ENCODER__DCE110_H__
 #define __DC_LINK_ENCODER__DCE110_H__
 
-#include "inc/link_encoder.h"
+#include "link_encoder.h"
 
 #define TO_DCE110_LINK_ENC(link_encoder)\
 	container_of(link_encoder, struct dce110_link_encoder, base)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h
index 81b78fd..0383178 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input.h
@@ -25,7 +25,7 @@
 #ifndef __DC_MEM_INPUT_DCE110_H__
 #define __DC_MEM_INPUT_DCE110_H__
 
-#include "inc/mem_input.h"
+#include "mem_input.h"
 
 #define TO_DCE110_MEM_INPUT(mi)\
 	container_of(mi, struct dce110_mem_input, base)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input_v.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input_v.h
index 529aace..24b4211 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input_v.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_mem_input_v.h
@@ -25,7 +25,7 @@
 #ifndef __DC_MEM_INPUT_V_DCE110_H__
 #define __DC_MEM_INPUT_V_DCE110_H__
 
-#include "inc/mem_input.h"
+#include "mem_input.h"
 #include "dce110_mem_input.h"
 
 bool dce110_mem_input_v_construct(
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h
index 45778e6..abb5a5d 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp.h
@@ -26,7 +26,7 @@
 #define __DC_OPP_DCE110_H__
 
 #include "dc_types.h"
-#include "inc/opp.h"
+#include "opp.h"
 #include "core_types.h"
 
 #include "gamma_types.h" /* decprecated */
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_v.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_v.h
index cb257fb..d8d6910 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_v.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_opp_v.h
@@ -26,7 +26,7 @@
 #define __DC_OPP_DCE110_V_H__
 
 #include "dc_types.h"
-#include "inc/opp.h"
+#include "opp.h"
 #include "core_types.h"
 
 #include "gamma_types.h" /* decprecated */
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_stream_encoder.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_stream_encoder.h
index 5753a1b..f187ad3 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_stream_encoder.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_stream_encoder.h
@@ -26,7 +26,7 @@
 #ifndef __DC_STREAM_ENCODER_DCE110_H__
 #define __DC_STREAM_ENCODER_DCE110_H__
 
-#include "inc/stream_encoder.h"
+#include "stream_encoder.h"
 
 #define DCE110STRENC_FROM_STRENC(stream_encoder)\
 	container_of(stream_encoder, struct dce110_stream_encoder, base)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c
index d554332..59ec7f4 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c
@@ -37,7 +37,7 @@
 #include "include/logger_interface.h"
 #include "dce110_timing_generator.h"
 
-#include "../inc/timing_generator.h"
+#include "timing_generator.h"
 
 enum black_color_format {
 	BLACK_COLOR_FORMAT_RGB_FULLRANGE = 0,	/* used as index in array */
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h
index 9c5e390..d09af97 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h
@@ -27,7 +27,7 @@
 #define __DC_TIMING_GENERATOR_DCE110_H__
 
 
-#include "../inc/timing_generator.h"
+#include "timing_generator.h"
 #include "../include/grph_object_id.h"
 #include "../include/hw_sequencer_types.h"
 
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator_v.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator_v.c
index caf6631..a7ea52e 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator_v.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator_v.c
@@ -15,7 +15,7 @@
 #include "dce110_timing_generator.h"
 #include "dce110_timing_generator_v.h"
 
-#include "../inc/timing_generator.h"
+#include "timing_generator.h"
 
 
 /** ********************************************************************************
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.h
index 7acbabc..e906fbf 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform.h
@@ -25,7 +25,7 @@
 #ifndef __DAL_TRANSFORM_DCE110_H__
 #define __DAL_TRANSFORM_DCE110_H__
 
-#include "inc/transform.h"
+#include "transform.h"
 
 #define TO_DCE110_TRANSFORM(transform)\
 	container_of(transform, struct dce110_transform, base)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.h
index eec3872..1fdffac 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_transform_v.h
@@ -25,7 +25,7 @@
 #ifndef __DAL_TRANSFORM_V_DCE110_H__
 #define __DAL_TRANSFORM_V_DCE110_H__
 
-#include "inc/transform.h"
+#include "transform.h"
 
 bool dce110_transform_v_construct(
 	struct dce110_transform *xfm110,
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_ipp.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_ipp.h
index bd81693..adf33cd 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_ipp.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_ipp.h
@@ -26,7 +26,7 @@
 #ifndef __DC_IPP_DCE80_H__
 #define __DC_IPP_DCE80_H__
 
-#include "inc/ipp.h"
+#include "ipp.h"
 
 #define TO_DCE80_IPP(input_pixel_processor)\
 		container_of(input_pixel_processor, struct dce110_ipp, base)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_link_encoder.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_link_encoder.h
index b894643..06e2c37 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_link_encoder.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_link_encoder.h
@@ -26,7 +26,7 @@
 #ifndef __DC_LINK_ENCODER__DCE80_H__
 #define __DC_LINK_ENCODER__DCE80_H__
 
-#include "inc/link_encoder.h"
+#include "link_encoder.h"
 #include "../dce110/dce110_link_encoder.h"
 
 bool dce80_link_encoder_construct(
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_mem_input.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_mem_input.h
index 1d299da..f07e94a 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_mem_input.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_mem_input.h
@@ -25,7 +25,7 @@
 #ifndef __DC_MEM_INPUT_DCE80_H__
 #define __DC_MEM_INPUT_DCE80_H__
 
-#include "inc/mem_input.h"
+#include "mem_input.h"
 
 bool dce80_mem_input_construct(
 	struct dce110_mem_input *mem_input80,
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp.h
index e152306..a3b1c08 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_opp.h
@@ -26,7 +26,7 @@
 #define __DC_OPP_DCE80_H__
 
 #include "dc_types.h"
-#include "inc/opp.h"
+#include "opp.h"
 #include "gamma_types.h"
 
 struct gamma_parameters;
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_stream_encoder.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_stream_encoder.h
index f4645a8..8b7edb9 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_stream_encoder.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_stream_encoder.h
@@ -23,7 +23,7 @@
  *
  */
 
-#include "inc/stream_encoder.h"
+#include "stream_encoder.h"
 
 #ifndef __DC_STREAM_ENCODER_DCE80_H__
 #define __DC_STREAM_ENCODER_DCE80_H__
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_timing_generator.c b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_timing_generator.c
index 80391c2..24c1832 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_timing_generator.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_timing_generator.c
@@ -37,7 +37,7 @@
 #include "../dce110/dce110_timing_generator.h"
 #include "dce80_timing_generator.h"
 
-#include "../inc/timing_generator.h"
+#include "timing_generator.h"
 
 enum black_color_format {
 	BLACK_COLOR_FORMAT_RGB_FULLRANGE = 0,	/* used as index in array */
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_timing_generator.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_timing_generator.h
index 0b88686..06339ed 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_timing_generator.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_timing_generator.h
@@ -27,7 +27,7 @@
 #define __DC_TIMING_GENERATOR_DCE80_H__
 
 
-#include "../inc/timing_generator.h"
+#include "timing_generator.h"
 #include "../include/grph_object_id.h"
 
 /* DCE8.0 implementation inherits from DCE11.0 */
diff --git a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.h b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.h
index ac8e5c9..a0fb2d2 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.h
+++ b/drivers/gpu/drm/amd/dal/dc/dce80/dce80_transform.h
@@ -25,7 +25,7 @@
 #ifndef __DAL_TRANSFORM_DCE80_H__
 #define __DAL_TRANSFORM_DCE80_H__
 
-#include "inc/transform.h"
+#include "transform.h"
 
 #define TO_DCE80_TRANSFORM(transform)\
 	container_of(transform, struct dce80_transform, base)
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw/hw_shared.h b/drivers/gpu/drm/amd/dal/dc/inc/hw/hw_shared.h
new file mode 100644
index 0000000..3b0e616
--- /dev/null
+++ b/drivers/gpu/drm/amd/dal/dc/inc/hw/hw_shared.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright 2015 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#ifndef __DAL_HW_SHARED_H__
+#define __DAL_HW_SHARED_H__
+
+/******************************************************************************
+ * Data types shared between different Virtual HW blocks
+ ******************************************************************************/
+struct gamma_curve {
+	uint32_t offset;
+	uint32_t segments_num;
+};
+
+struct curve_points {
+	struct fixed31_32 x;
+	struct fixed31_32 y;
+	struct fixed31_32 offset;
+	struct fixed31_32 slope;
+
+	uint32_t custom_float_x;
+	uint32_t custom_float_y;
+	uint32_t custom_float_offset;
+	uint32_t custom_float_slope;
+};
+
+struct pwl_result_data {
+	struct fixed31_32 red;
+	struct fixed31_32 green;
+	struct fixed31_32 blue;
+
+	struct fixed31_32 delta_red;
+	struct fixed31_32 delta_green;
+	struct fixed31_32 delta_blue;
+
+	uint32_t red_reg;
+	uint32_t green_reg;
+	uint32_t blue_reg;
+
+	uint32_t delta_red_reg;
+	uint32_t delta_green_reg;
+	uint32_t delta_blue_reg;
+};
+
+struct pwl_params {
+	uint32_t *data;
+	struct gamma_curve arr_curve_points[16];
+	struct curve_points arr_points[3];
+	struct pwl_result_data rgb_resulted[256 + 3];
+	uint32_t hw_points_num;
+};
+#endif /* __DAL_HW_SHARED_H__ */
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw/ipp.h b/drivers/gpu/drm/amd/dal/dc/inc/hw/ipp.h
new file mode 100644
index 0000000..505bf72
--- /dev/null
+++ b/drivers/gpu/drm/amd/dal/dc/inc/hw/ipp.h
@@ -0,0 +1,126 @@
+
+/*
+ * Copyright 2015 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#ifndef __DAL_IPP_H__
+#define __DAL_IPP_H__
+
+#include "hw_shared.h"
+
+#define MAXTRIX_COEFFICIENTS_NUMBER 12
+#define MAXTRIX_COEFFICIENTS_WRAP_NUMBER (MAXTRIX_COEFFICIENTS_NUMBER + 4)
+#define MAX_OVL_MATRIX_COUNT 12
+
+/* IPP RELATED */
+struct input_pixel_processor {
+	struct  dc_context *ctx;
+	uint32_t inst;
+	struct ipp_funcs *funcs;
+};
+
+enum ipp_prescale_mode {
+	IPP_PRESCALE_MODE_BYPASS,
+	IPP_PRESCALE_MODE_FIXED_SIGNED,
+	IPP_PRESCALE_MODE_FLOAT_SIGNED,
+	IPP_PRESCALE_MODE_FIXED_UNSIGNED,
+	IPP_PRESCALE_MODE_FLOAT_UNSIGNED
+};
+
+struct ipp_prescale_params {
+	enum ipp_prescale_mode mode;
+	uint16_t bias;
+	uint16_t scale;
+};
+
+enum ipp_degamma_mode {
+	IPP_DEGAMMA_MODE_BYPASS,
+	IPP_DEGAMMA_MODE_HW_sRGB,
+	IPP_DEGAMMA_MODE_HW_xvYCC,
+	IPP_DEGAMMA_MODE_USER_PWL
+};
+
+
+enum ovl_color_space {
+	OVL_COLOR_SPACE_UNKNOWN = 0,
+	OVL_COLOR_SPACE_RGB,
+	OVL_COLOR_SPACE_YUV601,
+	OVL_COLOR_SPACE_YUV709
+};
+
+struct dcp_video_matrix {
+	enum ovl_color_space color_space;
+	int32_t value[MAXTRIX_COEFFICIENTS_NUMBER];
+};
+
+enum expansion_mode {
+	EXPANSION_MODE_ZERO,
+	EXPANSION_MODE_DYNAMIC
+};
+
+enum ipp_output_format {
+	IPP_OUTPUT_FORMAT_12_BIT_FIX,
+	IPP_OUTPUT_FORMAT_16_BIT_BYPASS,
+	IPP_OUTPUT_FORMAT_FLOAT
+};
+
+struct ipp_funcs {
+
+	/*** cursor ***/
+	void (*ipp_cursor_set_position)(
+		struct input_pixel_processor *ipp,
+		const struct dc_cursor_position *position);
+
+	bool (*ipp_cursor_set_attributes)(
+		struct input_pixel_processor *ipp,
+		const struct dc_cursor_attributes *attributes);
+
+	/*** setup input pixel processing ***/
+
+	/* put the entire pixel processor to bypass */
+	void (*ipp_full_bypass)(struct input_pixel_processor *ipp);
+
+	/* setup ipp to expand/convert input to pixel processor internal format */
+	void (*ipp_setup)(
+		enum surface_pixel_format input_format,
+		enum expansion_mode mode,
+		enum ipp_output_format output_format);
+
+	/* DCE function to setup IPP.  TODO: see if we can consolidate to setup */
+	void (*ipp_program_prescale)(
+			struct input_pixel_processor *ipp,
+			struct ipp_prescale_params *params);
+
+	/*** DEGAMMA RELATED ***/
+	bool (*ipp_set_degamma)(
+		struct input_pixel_processor *ipp,
+		enum ipp_degamma_mode mode);
+
+	bool (*ipp_program_degamma_pwl)(
+		struct input_pixel_processor *ipp,
+		const struct pwl_params *params);
+
+};
+
+#endif /* __DAL_IPP_H__ */
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw/link_encoder.h b/drivers/gpu/drm/amd/dal/dc/inc/hw/link_encoder.h
new file mode 100644
index 0000000..d11ef05
--- /dev/null
+++ b/drivers/gpu/drm/amd/dal/dc/inc/hw/link_encoder.h
@@ -0,0 +1,123 @@
+/*
+ * link_encoder.h
+ *
+ *  Created on: Oct 6, 2015
+ *      Author: yonsun
+ */
+
+#ifndef LINK_ENCODER_H_
+#define LINK_ENCODER_H_
+
+#include "grph_object_defs.h"
+#include "signal_types.h"
+#include "dc_types.h"
+
+struct dc_context;
+struct adapter_service;
+struct encoder_set_dp_phy_pattern_param;
+struct link_mst_stream_allocation_table;
+struct dc_link_settings;
+struct link_training_settings;
+struct core_stream;
+struct pipe_ctx;
+
+struct encoder_init_data {
+	struct adapter_service *adapter_service;
+	enum channel_id channel;
+	struct graphics_object_id connector;
+	enum hpd_source_id hpd_source;
+	/* TODO: in DAL2, here was pointer to EventManagerInterface */
+	struct graphics_object_id encoder;
+	struct dc_context *ctx;
+	enum transmitter transmitter;
+};
+
+struct encoder_feature_support {
+	union {
+		struct {
+			/* 1 - external encoder; 0 - internal encoder */
+			uint32_t EXTERNAL_ENCODER:1;
+			uint32_t ANALOG_ENCODER:1;
+			uint32_t STEREO_SYNC:1;
+			/* check the DDC data pin
+			 * when performing DP Sink detection */
+			uint32_t DP_SINK_DETECT_POLL_DATA_PIN:1;
+			/* CPLIB authentication
+			 * for external DP chip supported */
+			uint32_t CPLIB_DP_AUTHENTICATION:1;
+			uint32_t IS_HBR2_CAPABLE:1;
+			uint32_t IS_HBR3_CAPABLE:1;
+			uint32_t IS_HBR2_VALIDATED:1;
+			uint32_t IS_TPS3_CAPABLE:1;
+			uint32_t IS_TPS4_CAPABLE:1;
+			uint32_t IS_AUDIO_CAPABLE:1;
+			uint32_t IS_VCE_SUPPORTED:1;
+			uint32_t IS_CONVERTER:1;
+			uint32_t IS_Y_ONLY_CAPABLE:1;
+			uint32_t IS_YCBCR_CAPABLE:1;
+		} bits;
+		uint32_t raw;
+	} flags;
+	/* maximum supported deep color depth */
+	enum dc_color_depth max_deep_color;
+	/* maximum supported clock */
+	uint32_t max_pixel_clock;
+};
+
+struct link_enc_status {
+	int dummy; /*TODO*/
+};
+struct link_encoder {
+	struct link_encoder_funcs *funcs;
+	struct adapter_service *adapter_service;
+	int32_t aux_channel_offset;
+	struct dc_context *ctx;
+	struct graphics_object_id id;
+	struct graphics_object_id connector;
+	uint32_t input_signals;
+	uint32_t output_signals;
+	enum engine_id preferred_engine;
+	struct encoder_feature_support features;
+	enum transmitter transmitter;
+	enum hpd_source_id hpd_source;
+};
+
+struct link_encoder_funcs {
+	bool (*validate_output_with_stream)(
+		struct link_encoder *enc, struct pipe_ctx *pipe_ctx);
+	void (*hw_init)(struct link_encoder *enc);
+	void (*setup)(struct link_encoder *enc,
+		enum signal_type signal);
+	void (*enable_tmds_output)(struct link_encoder *enc,
+		enum clock_source_id clock_source,
+		enum dc_color_depth color_depth,
+		bool hdmi,
+		bool dual_link,
+		uint32_t pixel_clock);
+	void (*enable_dp_output)(struct link_encoder *enc,
+		const struct dc_link_settings *link_settings,
+		enum clock_source_id clock_source);
+	void (*enable_dp_mst_output)(struct link_encoder *enc,
+		const struct dc_link_settings *link_settings,
+		enum clock_source_id clock_source);
+	void (*disable_output)(struct link_encoder *link_enc,
+		enum signal_type signal);
+	void (*dp_set_lane_settings)(struct link_encoder *enc,
+		const struct link_training_settings *link_settings);
+	void (*dp_set_phy_pattern)(struct link_encoder *enc,
+		const struct encoder_set_dp_phy_pattern_param *para);
+	void (*update_mst_stream_allocation_table)(
+		struct link_encoder *enc,
+		const struct link_mst_stream_allocation_table *table);
+	void (*set_lcd_backlight_level) (struct link_encoder *enc,
+		uint32_t level);
+	void (*backlight_control) (struct link_encoder *enc,
+		bool enable);
+	void (*power_control) (struct link_encoder *enc,
+		bool power_up);
+	void (*connect_dig_be_to_fe)(struct link_encoder *enc,
+		enum engine_id engine,
+		bool connect);
+};
+
+#endif /* LINK_ENCODER_H_ */
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw/mem_input.h b/drivers/gpu/drm/amd/dal/dc/inc/hw/mem_input.h
new file mode 100644
index 0000000..8339d61
--- /dev/null
+++ b/drivers/gpu/drm/amd/dal/dc/inc/hw/mem_input.h
@@ -0,0 +1,69 @@
+/*
+ * Copyright 2012-15 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+#ifndef __DAL_MEM_INPUT_H__
+#define __DAL_MEM_INPUT_H__
+
+#include "include/grph_object_id.h"
+#include "dc.h"
+
+struct mem_input {
+	struct mem_input_funcs *funcs;
+	struct dc_context *ctx;
+	uint32_t inst;
+};
+
+struct mem_input_funcs {
+	void (*mem_input_program_display_marks)(
+		struct mem_input *mem_input,
+		struct bw_watermarks nbp,
+		struct bw_watermarks stutter,
+		struct bw_watermarks urgent,
+		uint32_t total_dest_line_time_ns);
+
+	void (*allocate_mem_input)(
+		struct mem_input *mem_input,
+		uint32_t h_total,/* for current target */
+		uint32_t v_total,/* for current target */
+		uint32_t pix_clk_khz,/* for current target */
+		uint32_t total_streams_num);
+
+	void (*free_mem_input)(
+		struct mem_input *mem_input,
+		uint32_t paths_num);
+
+	bool (*mem_input_program_surface_flip_and_addr)(
+		struct mem_input *mem_input,
+		const struct dc_plane_address *address,
+		bool flip_immediate);
+
+	bool (*mem_input_program_surface_config)(
+		struct mem_input *mem_input,
+		enum surface_pixel_format format,
+		struct dc_tiling_info *tiling_info,
+		union plane_size *plane_size,
+		enum dc_rotation_angle rotation);
+};
+
+#endif
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw/opp.h b/drivers/gpu/drm/amd/dal/dc/inc/hw/opp.h
new file mode 100644
index 0000000..1c9b732
--- /dev/null
+++ b/drivers/gpu/drm/amd/dal/dc/inc/hw/opp.h
@@ -0,0 +1,325 @@
+/*
+ * Copyright 2012-15 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#ifndef __DAL_OPP_H__
+#define __DAL_OPP_H__
+
+#include "hw_shared.h"
+
+struct fixed31_32;
+struct gamma_parameters;
+
+/* TODO: Need cleanup */
+enum clamping_range {
+	CLAMPING_FULL_RANGE = 0,	   /* No Clamping */
+	CLAMPING_LIMITED_RANGE_8BPC,   /* 8  bpc: Clamping 1  to FE */
+	CLAMPING_LIMITED_RANGE_10BPC, /* 10 bpc: Clamping 4  to 3FB */
+	CLAMPING_LIMITED_RANGE_12BPC, /* 12 bpc: Clamping 10 to FEF */
+	/* Use programmable clampping value on FMT_CLAMP_COMPONENT_R/G/B. */
+	CLAMPING_LIMITED_RANGE_PROGRAMMABLE
+};
+
+struct clamping_and_pixel_encoding_params {
+	enum dc_pixel_encoding pixel_encoding; /* Pixel Encoding */
+	enum clamping_range clamping_level; /* Clamping identifier */
+	enum dc_color_depth c_depth; /* Deep color use. */
+};
+
+struct bit_depth_reduction_params {
+	struct {
+		/* truncate/round */
+		/* trunc/round enabled*/
+		uint32_t TRUNCATE_ENABLED:1;
+		/* 2 bits: 0=6 bpc, 1=8 bpc, 2 = 10bpc*/
+		uint32_t TRUNCATE_DEPTH:2;
+		/* truncate or round*/
+		uint32_t TRUNCATE_MODE:1;
+
+		/* spatial dither */
+		/* Spatial Bit Depth Reduction enabled*/
+		uint32_t SPATIAL_DITHER_ENABLED:1;
+		/* 2 bits: 0=6 bpc, 1 = 8 bpc, 2 = 10bpc*/
+		uint32_t SPATIAL_DITHER_DEPTH:2;
+		/* 0-3 to select patterns*/
+		uint32_t SPATIAL_DITHER_MODE:2;
+		/* Enable RGB random dithering*/
+		uint32_t RGB_RANDOM:1;
+		/* Enable Frame random dithering*/
+		uint32_t FRAME_RANDOM:1;
+		/* Enable HighPass random dithering*/
+		uint32_t HIGHPASS_RANDOM:1;
+
+		/* temporal dither*/
+		 /* frame modulation enabled*/
+		uint32_t FRAME_MODULATION_ENABLED:1;
+		/* same as for trunc/spatial*/
+		uint32_t FRAME_MODULATION_DEPTH:2;
+		/* 2/4 gray levels*/
+		uint32_t TEMPORAL_LEVEL:1;
+		uint32_t FRC25:2;
+		uint32_t FRC50:2;
+		uint32_t FRC75:2;
+	} flags;
+
+	uint32_t r_seed_value;
+	uint32_t b_seed_value;
+	uint32_t g_seed_value;
+};
+
+
+
+enum wide_gamut_regamma_mode {
+	/*  0x0  - BITS2:0 Bypass */
+	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_BYPASS,
+	/*  0x1  - Fixed curve sRGB 2.4 */
+	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_SRGB24,
+	/*  0x2  - Fixed curve xvYCC 2.22 */
+	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_XYYCC22,
+	/*  0x3  - Programmable control A */
+	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_A,
+	/*  0x4  - Programmable control B */
+	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_B,
+	/*  0x0  - BITS6:4 Bypass */
+	WIDE_GAMUT_REGAMMA_MODE_OVL_BYPASS,
+	/*  0x1  - Fixed curve sRGB 2.4 */
+	WIDE_GAMUT_REGAMMA_MODE_OVL_SRGB24,
+	/*  0x2  - Fixed curve xvYCC 2.22 */
+	WIDE_GAMUT_REGAMMA_MODE_OVL_XYYCC22,
+	/*  0x3  - Programmable control A */
+	WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_A,
+	/*  0x4  - Programmable control B */
+	WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_B
+};
+
+struct gamma_pixel {
+	struct fixed31_32 r;
+	struct fixed31_32 g;
+	struct fixed31_32 b;
+};
+
+enum channel_name {
+	CHANNEL_NAME_RED,
+	CHANNEL_NAME_GREEN,
+	CHANNEL_NAME_BLUE
+};
+
+struct custom_float_format {
+	uint32_t mantissa_bits;
+	uint32_t exponenta_bits;
+	bool sign;
+};
+
+struct custom_float_value {
+	uint32_t mantissa;
+	uint32_t exponenta;
+	uint32_t value;
+	bool negative;
+};
+
+struct hw_x_point {
+	uint32_t custom_float_x;
+	uint32_t custom_float_x_adjusted;
+	struct fixed31_32 x;
+	struct fixed31_32 adjusted_x;
+	struct fixed31_32 regamma_y_red;
+	struct fixed31_32 regamma_y_green;
+	struct fixed31_32 regamma_y_blue;
+
+};
+
+struct pwl_float_data_ex {
+	struct fixed31_32 r;
+	struct fixed31_32 g;
+	struct fixed31_32 b;
+	struct fixed31_32 delta_r;
+	struct fixed31_32 delta_g;
+	struct fixed31_32 delta_b;
+};
+
+enum hw_point_position {
+	/* hw point sits between left and right sw points */
+	HW_POINT_POSITION_MIDDLE,
+	/* hw point lays left from left (smaller) sw point */
+	HW_POINT_POSITION_LEFT,
+	/* hw point lays stays from right (bigger) sw point */
+	HW_POINT_POSITION_RIGHT
+};
+
+struct gamma_point {
+	int32_t left_index;
+	int32_t right_index;
+	enum hw_point_position pos;
+	struct fixed31_32 coeff;
+};
+
+struct pixel_gamma_point {
+	struct gamma_point r;
+	struct gamma_point g;
+	struct gamma_point b;
+};
+
+struct gamma_coefficients {
+	struct fixed31_32 a0[3];
+	struct fixed31_32 a1[3];
+	struct fixed31_32 a2[3];
+	struct fixed31_32 a3[3];
+	struct fixed31_32 user_gamma[3];
+	struct fixed31_32 user_contrast;
+	struct fixed31_32 user_brightness;
+};
+
+struct csc_adjustments {
+	struct fixed31_32 contrast;
+	struct fixed31_32 saturation;
+	struct fixed31_32 brightness;
+	struct fixed31_32 hue;
+};
+
+struct pwl_float_data {
+	struct fixed31_32 r;
+	struct fixed31_32 g;
+	struct fixed31_32 b;
+};
+
+enum opp_regamma {
+	OPP_REGAMMA_BYPASS = 0,
+	OPP_REGAMMA_SRGB,
+	OPP_REGAMMA_3_6,
+	OPP_REGAMMA_USER,
+};
+
+struct output_pixel_processor {
+	struct dc_context *ctx;
+	uint32_t inst;
+	struct opp_funcs *funcs;
+};
+
+enum fmt_stereo_action {
+	FMT_STEREO_ACTION_ENABLE = 0,
+	FMT_STEREO_ACTION_DISABLE,
+	FMT_STEREO_ACTION_UPDATE_POLARITY
+};
+
+enum graphics_csc_adjust_type {
+	GRAPHICS_CSC_ADJUST_TYPE_BYPASS = 0,
+	GRAPHICS_CSC_ADJUST_TYPE_HW, /* without adjustments */
+	GRAPHICS_CSC_ADJUST_TYPE_SW  /*use adjustments */
+};
+
+struct default_adjustment {
+	uint32_t lb_color_depth;
+	enum dc_color_space out_color_space;
+	enum dc_color_space in_color_space;
+	enum dc_color_depth color_depth;
+	enum pixel_format surface_pixel_format;
+	enum graphics_csc_adjust_type csc_adjust_type;
+	bool force_hw_default;
+};
+
+enum grph_color_adjust_option {
+	GRPH_COLOR_MATRIX_HW_DEFAULT = 1,
+	GRPH_COLOR_MATRIX_SW
+};
+
+struct opp_grph_csc_adjustment {
+	enum grph_color_adjust_option color_adjust_option;
+	enum dc_color_space c_space;
+	enum dc_color_depth color_depth; /* clean up to uint32_t */
+	enum graphics_csc_adjust_type   csc_adjust_type;
+	int32_t adjust_divider;
+	int32_t grph_cont;
+	int32_t grph_sat;
+	int32_t grph_bright;
+	int32_t grph_hue;
+};
+
+
+/* Underlay related types */
+
+struct hw_adjustment_range {
+	int32_t hw_default;
+	int32_t min;
+	int32_t max;
+	int32_t step;
+	uint32_t divider; /* (actually HW range is min/divider; divider !=0) */
+};
+
+enum ovl_csc_adjust_item {
+	OVERLAY_BRIGHTNESS = 0,
+	OVERLAY_GAMMA,
+	OVERLAY_CONTRAST,
+	OVERLAY_SATURATION,
+	OVERLAY_HUE,
+	OVERLAY_ALPHA,
+	OVERLAY_ALPHA_PER_PIX,
+	OVERLAY_COLOR_TEMPERATURE
+};
+
+struct opp_funcs {
+	void (*opp_power_on_regamma_lut)(
+		struct output_pixel_processor *opp,
+		bool power_on);
+
+	bool (*opp_program_regamma_pwl)(
+		struct output_pixel_processor *opp,
+		const struct pwl_params *params);
+
+	void (*opp_set_regamma_mode)(struct output_pixel_processor *opp,
+			enum opp_regamma mode);
+
+	void (*opp_set_csc_adjustment)(
+		struct output_pixel_processor *opp,
+		const struct opp_grph_csc_adjustment *adjust);
+
+	void (*opp_set_csc_default)(
+		struct output_pixel_processor *opp,
+		const struct default_adjustment *default_adjust);
+
+	/* FORMATTER RELATED */
+	void (*opp_program_bit_depth_reduction)(
+		struct output_pixel_processor *opp,
+		const struct bit_depth_reduction_params *params);
+
+	void (*opp_program_clamping_and_pixel_encoding)(
+		struct output_pixel_processor *opp,
+		const struct clamping_and_pixel_encoding_params *params);
+
+	void (*opp_set_dyn_expansion)(
+		struct output_pixel_processor *opp,
+		enum dc_color_space color_sp,
+		enum dc_color_depth color_dpth,
+		enum signal_type signal);
+
+	/* underlay related */
+	void (*opp_get_underlay_adjustment_range)(
+			struct output_pixel_processor *opp,
+			enum ovl_csc_adjust_item overlay_adjust_item,
+			struct hw_adjustment_range *range);
+
+
+	void (*opp_destroy)(struct output_pixel_processor **opp);
+};
+
+#endif
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw/stream_encoder.h b/drivers/gpu/drm/amd/dal/dc/inc/hw/stream_encoder.h
new file mode 100644
index 0000000..47cf6de
--- /dev/null
+++ b/drivers/gpu/drm/amd/dal/dc/inc/hw/stream_encoder.h
@@ -0,0 +1,88 @@
+/*
+ * stream_encoder.h
+ *
+ */
+
+#ifndef STREAM_ENCODER_H_
+#define STREAM_ENCODER_H_
+
+#include "include/hw_sequencer_types.h"
+
+struct dc_bios;
+struct dc_context;
+struct dc_crtc_timing;
+
+
+struct encoder_info_packet {
+	bool valid;
+	uint8_t hb0;
+	uint8_t hb1;
+	uint8_t hb2;
+	uint8_t hb3;
+	uint8_t sb[28];
+};
+
+struct encoder_info_frame {
+	/* auxiliary video information */
+	struct encoder_info_packet avi;
+	struct encoder_info_packet gamut;
+	struct encoder_info_packet vendor;
+	/* source product description */
+	struct encoder_info_packet spd;
+	/* video stream configuration */
+	struct encoder_info_packet vsc;
+};
+
+struct encoder_unblank_param {
+	struct hw_crtc_timing crtc_timing;
+	struct dc_link_settings link_settings;
+};
+
+struct encoder_set_dp_phy_pattern_param {
+	enum dp_test_pattern dp_phy_pattern;
+	const uint8_t *custom_pattern;
+	uint32_t custom_pattern_size;
+	enum dp_panel_mode dp_panel_mode;
+};
+
+
+struct stream_encoder {
+	struct stream_encoder_funcs *funcs;
+	struct dc_context *ctx;
+	struct dc_bios *bp;
+	enum engine_id id;
+};
+
+struct stream_encoder_funcs {
+	void (*dp_set_stream_attribute)(
+		struct stream_encoder *enc,
+		struct dc_crtc_timing *crtc_timing);
+	void (*hdmi_set_stream_attribute)(
+		struct stream_encoder *enc,
+		struct dc_crtc_timing *crtc_timing,
+		bool enable_audio);
+	void (*dvi_set_stream_attribute)(
+		struct stream_encoder *enc,
+		struct dc_crtc_timing *crtc_timing,
+		bool is_dual_link);
+	void (*set_mst_bandwidth)(
+		struct stream_encoder *enc,
+		struct fixed31_32 avg_time_slots_per_mtp);
+	void (*update_hdmi_info_packets)(
+		struct stream_encoder *enc,
+		const struct encoder_info_frame *info_frame);
+	void (*stop_hdmi_info_packets)(
+		struct stream_encoder *enc);
+	void (*update_dp_info_packets)(
+		struct stream_encoder *enc,
+		const struct encoder_info_frame *info_frame);
+	void (*stop_dp_info_packets)(
+		struct stream_encoder *enc);
+	void (*dp_blank)(
+		struct stream_encoder *enc);
+	void (*dp_unblank)(
+		struct stream_encoder *enc,
+		const struct encoder_unblank_param *param);
+};
+
+#endif /* STREAM_ENCODER_H_ */
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw/timing_generator.h b/drivers/gpu/drm/amd/dal/dc/inc/hw/timing_generator.h
new file mode 100644
index 0000000..374e222
--- /dev/null
+++ b/drivers/gpu/drm/amd/dal/dc/inc/hw/timing_generator.h
@@ -0,0 +1,153 @@
+/*
+ * Copyright 2012-15 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#ifndef __DAL_TIMING_GENERATOR_TYPES_H__
+#define __DAL_TIMING_GENERATOR_TYPES_H__
+
+struct dc_bios;
+
+/**
+ *  These parameters are required as input when doing blanking/Unblanking
+*/
+struct crtc_black_color {
+	uint32_t black_color_r_cr;
+	uint32_t black_color_g_y;
+	uint32_t black_color_b_cb;
+};
+
+/* Contains CRTC vertical/horizontal pixel counters */
+struct crtc_position {
+	uint32_t vertical_count;
+	uint32_t horizontal_count;
+	uint32_t nominal_vcount;
+};
+
+
+enum dcp_gsl_purpose {
+	DCP_GSL_PURPOSE_SURFACE_FLIP = 0,
+	DCP_GSL_PURPOSE_STEREO3D_PHASE,
+	DCP_GSL_PURPOSE_UNDEFINED
+};
+
+struct dcp_gsl_params {
+	enum sync_source gsl_group;
+	enum dcp_gsl_purpose gsl_purpose;
+	bool timing_server;
+	bool overlay_present;
+	bool gsl_paused;
+};
+
+#define LEFT_EYE_3D_PRIMARY_SURFACE 1
+#define RIGHT_EYE_3D_PRIMARY_SURFACE 0
+
+enum test_pattern_dyn_range {
+	TEST_PATTERN_DYN_RANGE_VESA = 0,
+	TEST_PATTERN_DYN_RANGE_CEA
+};
+
+enum test_pattern_mode {
+	TEST_PATTERN_MODE_COLORSQUARES_RGB = 0,
+	TEST_PATTERN_MODE_COLORSQUARES_YCBCR601,
+	TEST_PATTERN_MODE_COLORSQUARES_YCBCR709,
+	TEST_PATTERN_MODE_VERTICALBARS,
+	TEST_PATTERN_MODE_HORIZONTALBARS,
+	TEST_PATTERN_MODE_SINGLERAMP_RGB,
+	TEST_PATTERN_MODE_DUALRAMP_RGB
+};
+
+enum test_pattern_color_format {
+	TEST_PATTERN_COLOR_FORMAT_BPC_6 = 0,
+	TEST_PATTERN_COLOR_FORMAT_BPC_8,
+	TEST_PATTERN_COLOR_FORMAT_BPC_10,
+	TEST_PATTERN_COLOR_FORMAT_BPC_12
+};
+
+enum controller_dp_test_pattern {
+	CONTROLLER_DP_TEST_PATTERN_D102 = 0,
+	CONTROLLER_DP_TEST_PATTERN_SYMBOLERROR,
+	CONTROLLER_DP_TEST_PATTERN_PRBS7,
+	CONTROLLER_DP_TEST_PATTERN_COLORSQUARES,
+	CONTROLLER_DP_TEST_PATTERN_VERTICALBARS,
+	CONTROLLER_DP_TEST_PATTERN_HORIZONTALBARS,
+	CONTROLLER_DP_TEST_PATTERN_COLORRAMP,
+	CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
+	CONTROLLER_DP_TEST_PATTERN_RESERVED_8,
+	CONTROLLER_DP_TEST_PATTERN_RESERVED_9,
+	CONTROLLER_DP_TEST_PATTERN_RESERVED_A,
+	CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA
+};
+
+enum crtc_state {
+	CRTC_STATE_VBLANK = 0,
+	CRTC_STATE_VACTIVE
+};
+
+struct timing_generator {
+	struct timing_generator_funcs *funcs;
+	struct dc_bios *bp;
+	struct dc_context *ctx;
+};
+
+
+struct dc_crtc_timing;
+
+struct timing_generator_funcs {
+	bool (*validate_timing)(struct timing_generator *tg,
+							const struct dc_crtc_timing *timing);
+	void (*program_timing)(struct timing_generator *tg,
+							const struct dc_crtc_timing *timing,
+							bool use_vbios);
+	bool (*enable_crtc)(struct timing_generator *tg);
+	bool (*disable_crtc)(struct timing_generator *tg);
+	bool (*is_counter_moving)(struct timing_generator *tg);
+	void (*get_position)(struct timing_generator *tg,
+								int32_t *h_position,
+								int32_t *v_position);
+	uint32_t (*get_frame_count)(struct timing_generator *tg);
+	void (*set_early_control)(struct timing_generator *tg,
+							   uint32_t early_cntl);
+	void (*wait_for_state)(struct timing_generator *tg,
+							enum crtc_state state);
+	bool (*set_blank)(struct timing_generator *tg,
+					   bool enable_blanking);
+	void (*set_overscan_blank_color) (struct timing_generator *tg, enum dc_color_space black_color);
+	void (*set_blank_color)(struct timing_generator *tg, enum dc_color_space black_color);
+	void (*set_colors)(struct timing_generator *tg,
+						const struct crtc_black_color *blank_color,
+						const struct crtc_black_color *overscan_color);
+
+	void (*disable_vga)(struct timing_generator *tg);
+	bool (*did_triggered_reset_occur)(struct timing_generator *tg);
+	void (*setup_global_swap_lock)(struct timing_generator *tg,
+							const struct dcp_gsl_params *gsl_params);
+	void (*enable_reset_trigger)(struct timing_generator *tg,
+						const struct trigger_params *trigger_params);
+	void (*disable_reset_trigger)(struct timing_generator *tg);
+	void (*tear_down_global_swap_lock)(struct timing_generator *tg);
+	void (*enable_advanced_request)(struct timing_generator *tg,
+					bool enable, const struct dc_crtc_timing *timing);
+};
+
+#endif
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw/transform.h b/drivers/gpu/drm/amd/dal/dc/inc/hw/transform.h
new file mode 100644
index 0000000..bf84f96
--- /dev/null
+++ b/drivers/gpu/drm/amd/dal/dc/inc/hw/transform.h
@@ -0,0 +1,192 @@
+/*
+ * Copyright 2012-15 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#ifndef __DAL_TRANSFORM_H__
+#define __DAL_TRANSFORM_H__
+
+#include "include/scaler_types.h"
+#include "calcs/scaler_filter.h"
+
+struct bit_depth_reduction_params;
+
+struct transform {
+	struct transform_funcs *funcs;
+	struct dc_context *ctx;
+	uint32_t inst;
+	struct scaler_filter *filter;
+};
+
+enum lb_pixel_depth {
+	/* do not change the values because it is used as bit vector */
+	LB_PIXEL_DEPTH_18BPP = 1,
+	LB_PIXEL_DEPTH_24BPP = 2,
+	LB_PIXEL_DEPTH_30BPP = 4,
+	LB_PIXEL_DEPTH_36BPP = 8
+};
+
+
+enum raw_gamma_ramp_type {
+       GAMMA_RAMP_TYPE_UNINITIALIZED,
+       GAMMA_RAMP_TYPE_DEFAULT,
+       GAMMA_RAMP_TYPE_RGB256,
+       GAMMA_RAMP_TYPE_FIXED_POINT
+};
+
+#define NUM_OF_RAW_GAMMA_RAMP_RGB_256 256
+
+/* Colorimetry */
+enum colorimetry {
+       COLORIMETRY_NO_DATA = 0,
+       COLORIMETRY_ITU601 = 1,
+       COLORIMETRY_ITU709 = 2,
+       COLORIMETRY_EXTENDED = 3
+};
+
+enum ds_color_space {
+       DS_COLOR_SPACE_UNKNOWN = 0,
+       DS_COLOR_SPACE_SRGB_FULLRANGE = 1,
+       DS_COLOR_SPACE_SRGB_LIMITEDRANGE,
+       DS_COLOR_SPACE_YPBPR601,
+       DS_COLOR_SPACE_YPBPR709,
+       DS_COLOR_SPACE_YCBCR601,
+       DS_COLOR_SPACE_YCBCR709,
+       DS_COLOR_SPACE_NMVPU_SUPERAA,
+       DS_COLOR_SPACE_YCBCR601_YONLY,
+       DS_COLOR_SPACE_YCBCR709_YONLY/*same as YCbCr, but Y in Full range*/
+};
+
+enum active_format_info {
+       ACTIVE_FORMAT_NO_DATA = 0,
+       ACTIVE_FORMAT_VALID = 1
+};
+
+/* Active format aspect ratio */
+enum active_format_aspect_ratio {
+       ACTIVE_FORMAT_ASPECT_RATIO_SAME_AS_PICTURE = 8,
+       ACTIVE_FORMAT_ASPECT_RATIO_4_3 = 9,
+       ACTIVE_FORMAT_ASPECT_RATIO_16_9 = 0XA,
+       ACTIVE_FORMAT_ASPECT_RATIO_14_9 = 0XB
+};
+
+enum bar_info {
+       BAR_INFO_NOT_VALID = 0,
+       BAR_INFO_VERTICAL_VALID = 1,
+       BAR_INFO_HORIZONTAL_VALID = 2,
+       BAR_INFO_BOTH_VALID = 3
+};
+
+enum picture_scaling {
+       PICTURE_SCALING_UNIFORM = 0,
+       PICTURE_SCALING_HORIZONTAL = 1,
+       PICTURE_SCALING_VERTICAL = 2,
+       PICTURE_SCALING_BOTH = 3
+};
+
+/* RGB quantization range */
+enum rgb_quantization_range {
+       RGB_QUANTIZATION_DEFAULT_RANGE = 0,
+       RGB_QUANTIZATION_LIMITED_RANGE = 1,
+       RGB_QUANTIZATION_FULL_RANGE = 2,
+       RGB_QUANTIZATION_RESERVED = 3
+};
+
+/* YYC quantization range */
+enum yyc_quantization_range {
+       YYC_QUANTIZATION_LIMITED_RANGE = 0,
+       YYC_QUANTIZATION_FULL_RANGE = 1,
+       YYC_QUANTIZATION_RESERVED2 = 2,
+       YYC_QUANTIZATION_RESERVED3 = 3
+};
+
+enum graphics_gamut_adjust_type {
+	GRAPHICS_GAMUT_ADJUST_TYPE_BYPASS = 0,
+	GRAPHICS_GAMUT_ADJUST_TYPE_HW, /* without adjustments */
+	GRAPHICS_GAMUT_ADJUST_TYPE_SW  /* use adjustments */
+};
+
+#define CSC_TEMPERATURE_MATRIX_SIZE 9
+
+struct xfm_grph_csc_adjustment {
+	int32_t temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
+	int32_t temperature_divider;
+	enum graphics_gamut_adjust_type gamut_adjust_type;
+};
+
+/*overscan or window*/
+struct overscan_info {
+	uint32_t left;
+	uint32_t right;
+	uint32_t top;
+	uint32_t bottom;
+};
+
+struct scaling_ratios {
+	struct fixed31_32 horz;
+	struct fixed31_32 vert;
+	struct fixed31_32 horz_c;
+	struct fixed31_32 vert_c;
+};
+
+struct scaler_data {
+	struct overscan_info overscan;
+	struct scaling_taps taps;
+	struct rect viewport;
+	struct scaling_ratios ratios;
+
+	enum pixel_format format;
+};
+
+struct transform_funcs {
+	bool (*transform_power_up)(
+		struct transform *xfm);
+
+	bool (*transform_set_scaler)(
+		struct transform *xfm,
+		const struct scaler_data *data);
+
+	void (*transform_set_scaler_bypass)(
+		struct transform *xfm);
+
+	void (*transform_set_scaler_filter)(
+		struct transform *xfm,
+		struct scaler_filter *filter);
+
+	void (*transform_set_gamut_remap)(
+		struct transform *xfm,
+		const struct xfm_grph_csc_adjustment *adjust);
+
+	bool (*transform_set_pixel_storage_depth)(
+		struct transform *xfm,
+		enum lb_pixel_depth depth,
+		const struct bit_depth_reduction_params *bit_depth_params);
+
+	bool (*transform_get_current_pixel_storage_depth)(
+		struct transform *xfm,
+		enum lb_pixel_depth *depth);
+
+	void (*transform_set_alpha)(struct transform *xfm, bool enable);
+};
+
+#endif
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/hw_shared.h b/drivers/gpu/drm/amd/dal/dc/inc/hw_shared.h
deleted file mode 100644
index 3b0e616..0000000
--- a/drivers/gpu/drm/amd/dal/dc/inc/hw_shared.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * Copyright 2015 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#ifndef __DAL_HW_SHARED_H__
-#define __DAL_HW_SHARED_H__
-
-/******************************************************************************
- * Data types shared between different Virtual HW blocks
- ******************************************************************************/
-struct gamma_curve {
-	uint32_t offset;
-	uint32_t segments_num;
-};
-
-struct curve_points {
-	struct fixed31_32 x;
-	struct fixed31_32 y;
-	struct fixed31_32 offset;
-	struct fixed31_32 slope;
-
-	uint32_t custom_float_x;
-	uint32_t custom_float_y;
-	uint32_t custom_float_offset;
-	uint32_t custom_float_slope;
-};
-
-struct pwl_result_data {
-	struct fixed31_32 red;
-	struct fixed31_32 green;
-	struct fixed31_32 blue;
-
-	struct fixed31_32 delta_red;
-	struct fixed31_32 delta_green;
-	struct fixed31_32 delta_blue;
-
-	uint32_t red_reg;
-	uint32_t green_reg;
-	uint32_t blue_reg;
-
-	uint32_t delta_red_reg;
-	uint32_t delta_green_reg;
-	uint32_t delta_blue_reg;
-};
-
-struct pwl_params {
-	uint32_t *data;
-	struct gamma_curve arr_curve_points[16];
-	struct curve_points arr_points[3];
-	struct pwl_result_data rgb_resulted[256 + 3];
-	uint32_t hw_points_num;
-};
-#endif /* __DAL_HW_SHARED_H__ */
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/ipp.h b/drivers/gpu/drm/amd/dal/dc/inc/ipp.h
deleted file mode 100644
index 505bf72..0000000
--- a/drivers/gpu/drm/amd/dal/dc/inc/ipp.h
+++ /dev/null
@@ -1,126 +0,0 @@
-
-/*
- * Copyright 2015 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#ifndef __DAL_IPP_H__
-#define __DAL_IPP_H__
-
-#include "hw_shared.h"
-
-#define MAXTRIX_COEFFICIENTS_NUMBER 12
-#define MAXTRIX_COEFFICIENTS_WRAP_NUMBER (MAXTRIX_COEFFICIENTS_NUMBER + 4)
-#define MAX_OVL_MATRIX_COUNT 12
-
-/* IPP RELATED */
-struct input_pixel_processor {
-	struct  dc_context *ctx;
-	uint32_t inst;
-	struct ipp_funcs *funcs;
-};
-
-enum ipp_prescale_mode {
-	IPP_PRESCALE_MODE_BYPASS,
-	IPP_PRESCALE_MODE_FIXED_SIGNED,
-	IPP_PRESCALE_MODE_FLOAT_SIGNED,
-	IPP_PRESCALE_MODE_FIXED_UNSIGNED,
-	IPP_PRESCALE_MODE_FLOAT_UNSIGNED
-};
-
-struct ipp_prescale_params {
-	enum ipp_prescale_mode mode;
-	uint16_t bias;
-	uint16_t scale;
-};
-
-enum ipp_degamma_mode {
-	IPP_DEGAMMA_MODE_BYPASS,
-	IPP_DEGAMMA_MODE_HW_sRGB,
-	IPP_DEGAMMA_MODE_HW_xvYCC,
-	IPP_DEGAMMA_MODE_USER_PWL
-};
-
-
-enum ovl_color_space {
-	OVL_COLOR_SPACE_UNKNOWN = 0,
-	OVL_COLOR_SPACE_RGB,
-	OVL_COLOR_SPACE_YUV601,
-	OVL_COLOR_SPACE_YUV709
-};
-
-struct dcp_video_matrix {
-	enum ovl_color_space color_space;
-	int32_t value[MAXTRIX_COEFFICIENTS_NUMBER];
-};
-
-enum expansion_mode {
-	EXPANSION_MODE_ZERO,
-	EXPANSION_MODE_DYNAMIC
-};
-
-enum ipp_output_format {
-	IPP_OUTPUT_FORMAT_12_BIT_FIX,
-	IPP_OUTPUT_FORMAT_16_BIT_BYPASS,
-	IPP_OUTPUT_FORMAT_FLOAT
-};
-
-struct ipp_funcs {
-
-	/*** cursor ***/
-	void (*ipp_cursor_set_position)(
-		struct input_pixel_processor *ipp,
-		const struct dc_cursor_position *position);
-
-	bool (*ipp_cursor_set_attributes)(
-		struct input_pixel_processor *ipp,
-		const struct dc_cursor_attributes *attributes);
-
-	/*** setup input pixel processing ***/
-
-	/* put the entire pixel processor to bypass */
-	void (*ipp_full_bypass)(struct input_pixel_processor *ipp);
-
-	/* setup ipp to expand/convert input to pixel processor internal format */
-	void (*ipp_setup)(
-		enum surface_pixel_format input_format,
-		enum expansion_mode mode,
-		enum ipp_output_format output_format);
-
-	/* DCE function to setup IPP.  TODO: see if we can consolidate to setup */
-	void (*ipp_program_prescale)(
-			struct input_pixel_processor *ipp,
-			struct ipp_prescale_params *params);
-
-	/*** DEGAMMA RELATED ***/
-	bool (*ipp_set_degamma)(
-		struct input_pixel_processor *ipp,
-		enum ipp_degamma_mode mode);
-
-	bool (*ipp_program_degamma_pwl)(
-		struct input_pixel_processor *ipp,
-		const struct pwl_params *params);
-
-};
-
-#endif /* __DAL_IPP_H__ */
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/link_encoder.h b/drivers/gpu/drm/amd/dal/dc/inc/link_encoder.h
deleted file mode 100644
index d11ef05..0000000
--- a/drivers/gpu/drm/amd/dal/dc/inc/link_encoder.h
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * link_encoder.h
- *
- *  Created on: Oct 6, 2015
- *      Author: yonsun
- */
-
-#ifndef LINK_ENCODER_H_
-#define LINK_ENCODER_H_
-
-#include "grph_object_defs.h"
-#include "signal_types.h"
-#include "dc_types.h"
-
-struct dc_context;
-struct adapter_service;
-struct encoder_set_dp_phy_pattern_param;
-struct link_mst_stream_allocation_table;
-struct dc_link_settings;
-struct link_training_settings;
-struct core_stream;
-struct pipe_ctx;
-
-struct encoder_init_data {
-	struct adapter_service *adapter_service;
-	enum channel_id channel;
-	struct graphics_object_id connector;
-	enum hpd_source_id hpd_source;
-	/* TODO: in DAL2, here was pointer to EventManagerInterface */
-	struct graphics_object_id encoder;
-	struct dc_context *ctx;
-	enum transmitter transmitter;
-};
-
-struct encoder_feature_support {
-	union {
-		struct {
-			/* 1 - external encoder; 0 - internal encoder */
-			uint32_t EXTERNAL_ENCODER:1;
-			uint32_t ANALOG_ENCODER:1;
-			uint32_t STEREO_SYNC:1;
-			/* check the DDC data pin
-			 * when performing DP Sink detection */
-			uint32_t DP_SINK_DETECT_POLL_DATA_PIN:1;
-			/* CPLIB authentication
-			 * for external DP chip supported */
-			uint32_t CPLIB_DP_AUTHENTICATION:1;
-			uint32_t IS_HBR2_CAPABLE:1;
-			uint32_t IS_HBR3_CAPABLE:1;
-			uint32_t IS_HBR2_VALIDATED:1;
-			uint32_t IS_TPS3_CAPABLE:1;
-			uint32_t IS_TPS4_CAPABLE:1;
-			uint32_t IS_AUDIO_CAPABLE:1;
-			uint32_t IS_VCE_SUPPORTED:1;
-			uint32_t IS_CONVERTER:1;
-			uint32_t IS_Y_ONLY_CAPABLE:1;
-			uint32_t IS_YCBCR_CAPABLE:1;
-		} bits;
-		uint32_t raw;
-	} flags;
-	/* maximum supported deep color depth */
-	enum dc_color_depth max_deep_color;
-	/* maximum supported clock */
-	uint32_t max_pixel_clock;
-};
-
-struct link_enc_status {
-	int dummy; /*TODO*/
-};
-struct link_encoder {
-	struct link_encoder_funcs *funcs;
-	struct adapter_service *adapter_service;
-	int32_t aux_channel_offset;
-	struct dc_context *ctx;
-	struct graphics_object_id id;
-	struct graphics_object_id connector;
-	uint32_t input_signals;
-	uint32_t output_signals;
-	enum engine_id preferred_engine;
-	struct encoder_feature_support features;
-	enum transmitter transmitter;
-	enum hpd_source_id hpd_source;
-};
-
-struct link_encoder_funcs {
-	bool (*validate_output_with_stream)(
-		struct link_encoder *enc, struct pipe_ctx *pipe_ctx);
-	void (*hw_init)(struct link_encoder *enc);
-	void (*setup)(struct link_encoder *enc,
-		enum signal_type signal);
-	void (*enable_tmds_output)(struct link_encoder *enc,
-		enum clock_source_id clock_source,
-		enum dc_color_depth color_depth,
-		bool hdmi,
-		bool dual_link,
-		uint32_t pixel_clock);
-	void (*enable_dp_output)(struct link_encoder *enc,
-		const struct dc_link_settings *link_settings,
-		enum clock_source_id clock_source);
-	void (*enable_dp_mst_output)(struct link_encoder *enc,
-		const struct dc_link_settings *link_settings,
-		enum clock_source_id clock_source);
-	void (*disable_output)(struct link_encoder *link_enc,
-		enum signal_type signal);
-	void (*dp_set_lane_settings)(struct link_encoder *enc,
-		const struct link_training_settings *link_settings);
-	void (*dp_set_phy_pattern)(struct link_encoder *enc,
-		const struct encoder_set_dp_phy_pattern_param *para);
-	void (*update_mst_stream_allocation_table)(
-		struct link_encoder *enc,
-		const struct link_mst_stream_allocation_table *table);
-	void (*set_lcd_backlight_level) (struct link_encoder *enc,
-		uint32_t level);
-	void (*backlight_control) (struct link_encoder *enc,
-		bool enable);
-	void (*power_control) (struct link_encoder *enc,
-		bool power_up);
-	void (*connect_dig_be_to_fe)(struct link_encoder *enc,
-		enum engine_id engine,
-		bool connect);
-};
-
-#endif /* LINK_ENCODER_H_ */
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/mem_input.h b/drivers/gpu/drm/amd/dal/dc/inc/mem_input.h
deleted file mode 100644
index 8339d61..0000000
--- a/drivers/gpu/drm/amd/dal/dc/inc/mem_input.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * Copyright 2012-15 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-#ifndef __DAL_MEM_INPUT_H__
-#define __DAL_MEM_INPUT_H__
-
-#include "include/grph_object_id.h"
-#include "dc.h"
-
-struct mem_input {
-	struct mem_input_funcs *funcs;
-	struct dc_context *ctx;
-	uint32_t inst;
-};
-
-struct mem_input_funcs {
-	void (*mem_input_program_display_marks)(
-		struct mem_input *mem_input,
-		struct bw_watermarks nbp,
-		struct bw_watermarks stutter,
-		struct bw_watermarks urgent,
-		uint32_t total_dest_line_time_ns);
-
-	void (*allocate_mem_input)(
-		struct mem_input *mem_input,
-		uint32_t h_total,/* for current target */
-		uint32_t v_total,/* for current target */
-		uint32_t pix_clk_khz,/* for current target */
-		uint32_t total_streams_num);
-
-	void (*free_mem_input)(
-		struct mem_input *mem_input,
-		uint32_t paths_num);
-
-	bool (*mem_input_program_surface_flip_and_addr)(
-		struct mem_input *mem_input,
-		const struct dc_plane_address *address,
-		bool flip_immediate);
-
-	bool (*mem_input_program_surface_config)(
-		struct mem_input *mem_input,
-		enum surface_pixel_format format,
-		struct dc_tiling_info *tiling_info,
-		union plane_size *plane_size,
-		enum dc_rotation_angle rotation);
-};
-
-#endif
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/opp.h b/drivers/gpu/drm/amd/dal/dc/inc/opp.h
deleted file mode 100644
index 1c9b732..0000000
--- a/drivers/gpu/drm/amd/dal/dc/inc/opp.h
+++ /dev/null
@@ -1,325 +0,0 @@
-/*
- * Copyright 2012-15 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#ifndef __DAL_OPP_H__
-#define __DAL_OPP_H__
-
-#include "hw_shared.h"
-
-struct fixed31_32;
-struct gamma_parameters;
-
-/* TODO: Need cleanup */
-enum clamping_range {
-	CLAMPING_FULL_RANGE = 0,	   /* No Clamping */
-	CLAMPING_LIMITED_RANGE_8BPC,   /* 8  bpc: Clamping 1  to FE */
-	CLAMPING_LIMITED_RANGE_10BPC, /* 10 bpc: Clamping 4  to 3FB */
-	CLAMPING_LIMITED_RANGE_12BPC, /* 12 bpc: Clamping 10 to FEF */
-	/* Use programmable clampping value on FMT_CLAMP_COMPONENT_R/G/B. */
-	CLAMPING_LIMITED_RANGE_PROGRAMMABLE
-};
-
-struct clamping_and_pixel_encoding_params {
-	enum dc_pixel_encoding pixel_encoding; /* Pixel Encoding */
-	enum clamping_range clamping_level; /* Clamping identifier */
-	enum dc_color_depth c_depth; /* Deep color use. */
-};
-
-struct bit_depth_reduction_params {
-	struct {
-		/* truncate/round */
-		/* trunc/round enabled*/
-		uint32_t TRUNCATE_ENABLED:1;
-		/* 2 bits: 0=6 bpc, 1=8 bpc, 2 = 10bpc*/
-		uint32_t TRUNCATE_DEPTH:2;
-		/* truncate or round*/
-		uint32_t TRUNCATE_MODE:1;
-
-		/* spatial dither */
-		/* Spatial Bit Depth Reduction enabled*/
-		uint32_t SPATIAL_DITHER_ENABLED:1;
-		/* 2 bits: 0=6 bpc, 1 = 8 bpc, 2 = 10bpc*/
-		uint32_t SPATIAL_DITHER_DEPTH:2;
-		/* 0-3 to select patterns*/
-		uint32_t SPATIAL_DITHER_MODE:2;
-		/* Enable RGB random dithering*/
-		uint32_t RGB_RANDOM:1;
-		/* Enable Frame random dithering*/
-		uint32_t FRAME_RANDOM:1;
-		/* Enable HighPass random dithering*/
-		uint32_t HIGHPASS_RANDOM:1;
-
-		/* temporal dither*/
-		 /* frame modulation enabled*/
-		uint32_t FRAME_MODULATION_ENABLED:1;
-		/* same as for trunc/spatial*/
-		uint32_t FRAME_MODULATION_DEPTH:2;
-		/* 2/4 gray levels*/
-		uint32_t TEMPORAL_LEVEL:1;
-		uint32_t FRC25:2;
-		uint32_t FRC50:2;
-		uint32_t FRC75:2;
-	} flags;
-
-	uint32_t r_seed_value;
-	uint32_t b_seed_value;
-	uint32_t g_seed_value;
-};
-
-
-
-enum wide_gamut_regamma_mode {
-	/*  0x0  - BITS2:0 Bypass */
-	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_BYPASS,
-	/*  0x1  - Fixed curve sRGB 2.4 */
-	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_SRGB24,
-	/*  0x2  - Fixed curve xvYCC 2.22 */
-	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_XYYCC22,
-	/*  0x3  - Programmable control A */
-	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_A,
-	/*  0x4  - Programmable control B */
-	WIDE_GAMUT_REGAMMA_MODE_GRAPHICS_MATRIX_B,
-	/*  0x0  - BITS6:4 Bypass */
-	WIDE_GAMUT_REGAMMA_MODE_OVL_BYPASS,
-	/*  0x1  - Fixed curve sRGB 2.4 */
-	WIDE_GAMUT_REGAMMA_MODE_OVL_SRGB24,
-	/*  0x2  - Fixed curve xvYCC 2.22 */
-	WIDE_GAMUT_REGAMMA_MODE_OVL_XYYCC22,
-	/*  0x3  - Programmable control A */
-	WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_A,
-	/*  0x4  - Programmable control B */
-	WIDE_GAMUT_REGAMMA_MODE_OVL_MATRIX_B
-};
-
-struct gamma_pixel {
-	struct fixed31_32 r;
-	struct fixed31_32 g;
-	struct fixed31_32 b;
-};
-
-enum channel_name {
-	CHANNEL_NAME_RED,
-	CHANNEL_NAME_GREEN,
-	CHANNEL_NAME_BLUE
-};
-
-struct custom_float_format {
-	uint32_t mantissa_bits;
-	uint32_t exponenta_bits;
-	bool sign;
-};
-
-struct custom_float_value {
-	uint32_t mantissa;
-	uint32_t exponenta;
-	uint32_t value;
-	bool negative;
-};
-
-struct hw_x_point {
-	uint32_t custom_float_x;
-	uint32_t custom_float_x_adjusted;
-	struct fixed31_32 x;
-	struct fixed31_32 adjusted_x;
-	struct fixed31_32 regamma_y_red;
-	struct fixed31_32 regamma_y_green;
-	struct fixed31_32 regamma_y_blue;
-
-};
-
-struct pwl_float_data_ex {
-	struct fixed31_32 r;
-	struct fixed31_32 g;
-	struct fixed31_32 b;
-	struct fixed31_32 delta_r;
-	struct fixed31_32 delta_g;
-	struct fixed31_32 delta_b;
-};
-
-enum hw_point_position {
-	/* hw point sits between left and right sw points */
-	HW_POINT_POSITION_MIDDLE,
-	/* hw point lays left from left (smaller) sw point */
-	HW_POINT_POSITION_LEFT,
-	/* hw point lays stays from right (bigger) sw point */
-	HW_POINT_POSITION_RIGHT
-};
-
-struct gamma_point {
-	int32_t left_index;
-	int32_t right_index;
-	enum hw_point_position pos;
-	struct fixed31_32 coeff;
-};
-
-struct pixel_gamma_point {
-	struct gamma_point r;
-	struct gamma_point g;
-	struct gamma_point b;
-};
-
-struct gamma_coefficients {
-	struct fixed31_32 a0[3];
-	struct fixed31_32 a1[3];
-	struct fixed31_32 a2[3];
-	struct fixed31_32 a3[3];
-	struct fixed31_32 user_gamma[3];
-	struct fixed31_32 user_contrast;
-	struct fixed31_32 user_brightness;
-};
-
-struct csc_adjustments {
-	struct fixed31_32 contrast;
-	struct fixed31_32 saturation;
-	struct fixed31_32 brightness;
-	struct fixed31_32 hue;
-};
-
-struct pwl_float_data {
-	struct fixed31_32 r;
-	struct fixed31_32 g;
-	struct fixed31_32 b;
-};
-
-enum opp_regamma {
-	OPP_REGAMMA_BYPASS = 0,
-	OPP_REGAMMA_SRGB,
-	OPP_REGAMMA_3_6,
-	OPP_REGAMMA_USER,
-};
-
-struct output_pixel_processor {
-	struct dc_context *ctx;
-	uint32_t inst;
-	struct opp_funcs *funcs;
-};
-
-enum fmt_stereo_action {
-	FMT_STEREO_ACTION_ENABLE = 0,
-	FMT_STEREO_ACTION_DISABLE,
-	FMT_STEREO_ACTION_UPDATE_POLARITY
-};
-
-enum graphics_csc_adjust_type {
-	GRAPHICS_CSC_ADJUST_TYPE_BYPASS = 0,
-	GRAPHICS_CSC_ADJUST_TYPE_HW, /* without adjustments */
-	GRAPHICS_CSC_ADJUST_TYPE_SW  /*use adjustments */
-};
-
-struct default_adjustment {
-	uint32_t lb_color_depth;
-	enum dc_color_space out_color_space;
-	enum dc_color_space in_color_space;
-	enum dc_color_depth color_depth;
-	enum pixel_format surface_pixel_format;
-	enum graphics_csc_adjust_type csc_adjust_type;
-	bool force_hw_default;
-};
-
-enum grph_color_adjust_option {
-	GRPH_COLOR_MATRIX_HW_DEFAULT = 1,
-	GRPH_COLOR_MATRIX_SW
-};
-
-struct opp_grph_csc_adjustment {
-	enum grph_color_adjust_option color_adjust_option;
-	enum dc_color_space c_space;
-	enum dc_color_depth color_depth; /* clean up to uint32_t */
-	enum graphics_csc_adjust_type   csc_adjust_type;
-	int32_t adjust_divider;
-	int32_t grph_cont;
-	int32_t grph_sat;
-	int32_t grph_bright;
-	int32_t grph_hue;
-};
-
-
-/* Underlay related types */
-
-struct hw_adjustment_range {
-	int32_t hw_default;
-	int32_t min;
-	int32_t max;
-	int32_t step;
-	uint32_t divider; /* (actually HW range is min/divider; divider !=0) */
-};
-
-enum ovl_csc_adjust_item {
-	OVERLAY_BRIGHTNESS = 0,
-	OVERLAY_GAMMA,
-	OVERLAY_CONTRAST,
-	OVERLAY_SATURATION,
-	OVERLAY_HUE,
-	OVERLAY_ALPHA,
-	OVERLAY_ALPHA_PER_PIX,
-	OVERLAY_COLOR_TEMPERATURE
-};
-
-struct opp_funcs {
-	void (*opp_power_on_regamma_lut)(
-		struct output_pixel_processor *opp,
-		bool power_on);
-
-	bool (*opp_program_regamma_pwl)(
-		struct output_pixel_processor *opp,
-		const struct pwl_params *params);
-
-	void (*opp_set_regamma_mode)(struct output_pixel_processor *opp,
-			enum opp_regamma mode);
-
-	void (*opp_set_csc_adjustment)(
-		struct output_pixel_processor *opp,
-		const struct opp_grph_csc_adjustment *adjust);
-
-	void (*opp_set_csc_default)(
-		struct output_pixel_processor *opp,
-		const struct default_adjustment *default_adjust);
-
-	/* FORMATTER RELATED */
-	void (*opp_program_bit_depth_reduction)(
-		struct output_pixel_processor *opp,
-		const struct bit_depth_reduction_params *params);
-
-	void (*opp_program_clamping_and_pixel_encoding)(
-		struct output_pixel_processor *opp,
-		const struct clamping_and_pixel_encoding_params *params);
-
-	void (*opp_set_dyn_expansion)(
-		struct output_pixel_processor *opp,
-		enum dc_color_space color_sp,
-		enum dc_color_depth color_dpth,
-		enum signal_type signal);
-
-	/* underlay related */
-	void (*opp_get_underlay_adjustment_range)(
-			struct output_pixel_processor *opp,
-			enum ovl_csc_adjust_item overlay_adjust_item,
-			struct hw_adjustment_range *range);
-
-
-	void (*opp_destroy)(struct output_pixel_processor **opp);
-};
-
-#endif
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/stream_encoder.h b/drivers/gpu/drm/amd/dal/dc/inc/stream_encoder.h
deleted file mode 100644
index 47cf6de..0000000
--- a/drivers/gpu/drm/amd/dal/dc/inc/stream_encoder.h
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * stream_encoder.h
- *
- */
-
-#ifndef STREAM_ENCODER_H_
-#define STREAM_ENCODER_H_
-
-#include "include/hw_sequencer_types.h"
-
-struct dc_bios;
-struct dc_context;
-struct dc_crtc_timing;
-
-
-struct encoder_info_packet {
-	bool valid;
-	uint8_t hb0;
-	uint8_t hb1;
-	uint8_t hb2;
-	uint8_t hb3;
-	uint8_t sb[28];
-};
-
-struct encoder_info_frame {
-	/* auxiliary video information */
-	struct encoder_info_packet avi;
-	struct encoder_info_packet gamut;
-	struct encoder_info_packet vendor;
-	/* source product description */
-	struct encoder_info_packet spd;
-	/* video stream configuration */
-	struct encoder_info_packet vsc;
-};
-
-struct encoder_unblank_param {
-	struct hw_crtc_timing crtc_timing;
-	struct dc_link_settings link_settings;
-};
-
-struct encoder_set_dp_phy_pattern_param {
-	enum dp_test_pattern dp_phy_pattern;
-	const uint8_t *custom_pattern;
-	uint32_t custom_pattern_size;
-	enum dp_panel_mode dp_panel_mode;
-};
-
-
-struct stream_encoder {
-	struct stream_encoder_funcs *funcs;
-	struct dc_context *ctx;
-	struct dc_bios *bp;
-	enum engine_id id;
-};
-
-struct stream_encoder_funcs {
-	void (*dp_set_stream_attribute)(
-		struct stream_encoder *enc,
-		struct dc_crtc_timing *crtc_timing);
-	void (*hdmi_set_stream_attribute)(
-		struct stream_encoder *enc,
-		struct dc_crtc_timing *crtc_timing,
-		bool enable_audio);
-	void (*dvi_set_stream_attribute)(
-		struct stream_encoder *enc,
-		struct dc_crtc_timing *crtc_timing,
-		bool is_dual_link);
-	void (*set_mst_bandwidth)(
-		struct stream_encoder *enc,
-		struct fixed31_32 avg_time_slots_per_mtp);
-	void (*update_hdmi_info_packets)(
-		struct stream_encoder *enc,
-		const struct encoder_info_frame *info_frame);
-	void (*stop_hdmi_info_packets)(
-		struct stream_encoder *enc);
-	void (*update_dp_info_packets)(
-		struct stream_encoder *enc,
-		const struct encoder_info_frame *info_frame);
-	void (*stop_dp_info_packets)(
-		struct stream_encoder *enc);
-	void (*dp_blank)(
-		struct stream_encoder *enc);
-	void (*dp_unblank)(
-		struct stream_encoder *enc,
-		const struct encoder_unblank_param *param);
-};
-
-#endif /* STREAM_ENCODER_H_ */
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/timing_generator.h b/drivers/gpu/drm/amd/dal/dc/inc/timing_generator.h
deleted file mode 100644
index 374e222..0000000
--- a/drivers/gpu/drm/amd/dal/dc/inc/timing_generator.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * Copyright 2012-15 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#ifndef __DAL_TIMING_GENERATOR_TYPES_H__
-#define __DAL_TIMING_GENERATOR_TYPES_H__
-
-struct dc_bios;
-
-/**
- *  These parameters are required as input when doing blanking/Unblanking
-*/
-struct crtc_black_color {
-	uint32_t black_color_r_cr;
-	uint32_t black_color_g_y;
-	uint32_t black_color_b_cb;
-};
-
-/* Contains CRTC vertical/horizontal pixel counters */
-struct crtc_position {
-	uint32_t vertical_count;
-	uint32_t horizontal_count;
-	uint32_t nominal_vcount;
-};
-
-
-enum dcp_gsl_purpose {
-	DCP_GSL_PURPOSE_SURFACE_FLIP = 0,
-	DCP_GSL_PURPOSE_STEREO3D_PHASE,
-	DCP_GSL_PURPOSE_UNDEFINED
-};
-
-struct dcp_gsl_params {
-	enum sync_source gsl_group;
-	enum dcp_gsl_purpose gsl_purpose;
-	bool timing_server;
-	bool overlay_present;
-	bool gsl_paused;
-};
-
-#define LEFT_EYE_3D_PRIMARY_SURFACE 1
-#define RIGHT_EYE_3D_PRIMARY_SURFACE 0
-
-enum test_pattern_dyn_range {
-	TEST_PATTERN_DYN_RANGE_VESA = 0,
-	TEST_PATTERN_DYN_RANGE_CEA
-};
-
-enum test_pattern_mode {
-	TEST_PATTERN_MODE_COLORSQUARES_RGB = 0,
-	TEST_PATTERN_MODE_COLORSQUARES_YCBCR601,
-	TEST_PATTERN_MODE_COLORSQUARES_YCBCR709,
-	TEST_PATTERN_MODE_VERTICALBARS,
-	TEST_PATTERN_MODE_HORIZONTALBARS,
-	TEST_PATTERN_MODE_SINGLERAMP_RGB,
-	TEST_PATTERN_MODE_DUALRAMP_RGB
-};
-
-enum test_pattern_color_format {
-	TEST_PATTERN_COLOR_FORMAT_BPC_6 = 0,
-	TEST_PATTERN_COLOR_FORMAT_BPC_8,
-	TEST_PATTERN_COLOR_FORMAT_BPC_10,
-	TEST_PATTERN_COLOR_FORMAT_BPC_12
-};
-
-enum controller_dp_test_pattern {
-	CONTROLLER_DP_TEST_PATTERN_D102 = 0,
-	CONTROLLER_DP_TEST_PATTERN_SYMBOLERROR,
-	CONTROLLER_DP_TEST_PATTERN_PRBS7,
-	CONTROLLER_DP_TEST_PATTERN_COLORSQUARES,
-	CONTROLLER_DP_TEST_PATTERN_VERTICALBARS,
-	CONTROLLER_DP_TEST_PATTERN_HORIZONTALBARS,
-	CONTROLLER_DP_TEST_PATTERN_COLORRAMP,
-	CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
-	CONTROLLER_DP_TEST_PATTERN_RESERVED_8,
-	CONTROLLER_DP_TEST_PATTERN_RESERVED_9,
-	CONTROLLER_DP_TEST_PATTERN_RESERVED_A,
-	CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA
-};
-
-enum crtc_state {
-	CRTC_STATE_VBLANK = 0,
-	CRTC_STATE_VACTIVE
-};
-
-struct timing_generator {
-	struct timing_generator_funcs *funcs;
-	struct dc_bios *bp;
-	struct dc_context *ctx;
-};
-
-
-struct dc_crtc_timing;
-
-struct timing_generator_funcs {
-	bool (*validate_timing)(struct timing_generator *tg,
-							const struct dc_crtc_timing *timing);
-	void (*program_timing)(struct timing_generator *tg,
-							const struct dc_crtc_timing *timing,
-							bool use_vbios);
-	bool (*enable_crtc)(struct timing_generator *tg);
-	bool (*disable_crtc)(struct timing_generator *tg);
-	bool (*is_counter_moving)(struct timing_generator *tg);
-	void (*get_position)(struct timing_generator *tg,
-								int32_t *h_position,
-								int32_t *v_position);
-	uint32_t (*get_frame_count)(struct timing_generator *tg);
-	void (*set_early_control)(struct timing_generator *tg,
-							   uint32_t early_cntl);
-	void (*wait_for_state)(struct timing_generator *tg,
-							enum crtc_state state);
-	bool (*set_blank)(struct timing_generator *tg,
-					   bool enable_blanking);
-	void (*set_overscan_blank_color) (struct timing_generator *tg, enum dc_color_space black_color);
-	void (*set_blank_color)(struct timing_generator *tg, enum dc_color_space black_color);
-	void (*set_colors)(struct timing_generator *tg,
-						const struct crtc_black_color *blank_color,
-						const struct crtc_black_color *overscan_color);
-
-	void (*disable_vga)(struct timing_generator *tg);
-	bool (*did_triggered_reset_occur)(struct timing_generator *tg);
-	void (*setup_global_swap_lock)(struct timing_generator *tg,
-							const struct dcp_gsl_params *gsl_params);
-	void (*enable_reset_trigger)(struct timing_generator *tg,
-						const struct trigger_params *trigger_params);
-	void (*disable_reset_trigger)(struct timing_generator *tg);
-	void (*tear_down_global_swap_lock)(struct timing_generator *tg);
-	void (*enable_advanced_request)(struct timing_generator *tg,
-					bool enable, const struct dc_crtc_timing *timing);
-};
-
-#endif
diff --git a/drivers/gpu/drm/amd/dal/dc/inc/transform.h b/drivers/gpu/drm/amd/dal/dc/inc/transform.h
deleted file mode 100644
index bf84f96..0000000
--- a/drivers/gpu/drm/amd/dal/dc/inc/transform.h
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * Copyright 2012-15 Advanced Micro Devices, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: AMD
- *
- */
-
-#ifndef __DAL_TRANSFORM_H__
-#define __DAL_TRANSFORM_H__
-
-#include "include/scaler_types.h"
-#include "calcs/scaler_filter.h"
-
-struct bit_depth_reduction_params;
-
-struct transform {
-	struct transform_funcs *funcs;
-	struct dc_context *ctx;
-	uint32_t inst;
-	struct scaler_filter *filter;
-};
-
-enum lb_pixel_depth {
-	/* do not change the values because it is used as bit vector */
-	LB_PIXEL_DEPTH_18BPP = 1,
-	LB_PIXEL_DEPTH_24BPP = 2,
-	LB_PIXEL_DEPTH_30BPP = 4,
-	LB_PIXEL_DEPTH_36BPP = 8
-};
-
-
-enum raw_gamma_ramp_type {
-       GAMMA_RAMP_TYPE_UNINITIALIZED,
-       GAMMA_RAMP_TYPE_DEFAULT,
-       GAMMA_RAMP_TYPE_RGB256,
-       GAMMA_RAMP_TYPE_FIXED_POINT
-};
-
-#define NUM_OF_RAW_GAMMA_RAMP_RGB_256 256
-
-/* Colorimetry */
-enum colorimetry {
-       COLORIMETRY_NO_DATA = 0,
-       COLORIMETRY_ITU601 = 1,
-       COLORIMETRY_ITU709 = 2,
-       COLORIMETRY_EXTENDED = 3
-};
-
-enum ds_color_space {
-       DS_COLOR_SPACE_UNKNOWN = 0,
-       DS_COLOR_SPACE_SRGB_FULLRANGE = 1,
-       DS_COLOR_SPACE_SRGB_LIMITEDRANGE,
-       DS_COLOR_SPACE_YPBPR601,
-       DS_COLOR_SPACE_YPBPR709,
-       DS_COLOR_SPACE_YCBCR601,
-       DS_COLOR_SPACE_YCBCR709,
-       DS_COLOR_SPACE_NMVPU_SUPERAA,
-       DS_COLOR_SPACE_YCBCR601_YONLY,
-       DS_COLOR_SPACE_YCBCR709_YONLY/*same as YCbCr, but Y in Full range*/
-};
-
-enum active_format_info {
-       ACTIVE_FORMAT_NO_DATA = 0,
-       ACTIVE_FORMAT_VALID = 1
-};
-
-/* Active format aspect ratio */
-enum active_format_aspect_ratio {
-       ACTIVE_FORMAT_ASPECT_RATIO_SAME_AS_PICTURE = 8,
-       ACTIVE_FORMAT_ASPECT_RATIO_4_3 = 9,
-       ACTIVE_FORMAT_ASPECT_RATIO_16_9 = 0XA,
-       ACTIVE_FORMAT_ASPECT_RATIO_14_9 = 0XB
-};
-
-enum bar_info {
-       BAR_INFO_NOT_VALID = 0,
-       BAR_INFO_VERTICAL_VALID = 1,
-       BAR_INFO_HORIZONTAL_VALID = 2,
-       BAR_INFO_BOTH_VALID = 3
-};
-
-enum picture_scaling {
-       PICTURE_SCALING_UNIFORM = 0,
-       PICTURE_SCALING_HORIZONTAL = 1,
-       PICTURE_SCALING_VERTICAL = 2,
-       PICTURE_SCALING_BOTH = 3
-};
-
-/* RGB quantization range */
-enum rgb_quantization_range {
-       RGB_QUANTIZATION_DEFAULT_RANGE = 0,
-       RGB_QUANTIZATION_LIMITED_RANGE = 1,
-       RGB_QUANTIZATION_FULL_RANGE = 2,
-       RGB_QUANTIZATION_RESERVED = 3
-};
-
-/* YYC quantization range */
-enum yyc_quantization_range {
-       YYC_QUANTIZATION_LIMITED_RANGE = 0,
-       YYC_QUANTIZATION_FULL_RANGE = 1,
-       YYC_QUANTIZATION_RESERVED2 = 2,
-       YYC_QUANTIZATION_RESERVED3 = 3
-};
-
-enum graphics_gamut_adjust_type {
-	GRAPHICS_GAMUT_ADJUST_TYPE_BYPASS = 0,
-	GRAPHICS_GAMUT_ADJUST_TYPE_HW, /* without adjustments */
-	GRAPHICS_GAMUT_ADJUST_TYPE_SW  /* use adjustments */
-};
-
-#define CSC_TEMPERATURE_MATRIX_SIZE 9
-
-struct xfm_grph_csc_adjustment {
-	int32_t temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
-	int32_t temperature_divider;
-	enum graphics_gamut_adjust_type gamut_adjust_type;
-};
-
-/*overscan or window*/
-struct overscan_info {
-	uint32_t left;
-	uint32_t right;
-	uint32_t top;
-	uint32_t bottom;
-};
-
-struct scaling_ratios {
-	struct fixed31_32 horz;
-	struct fixed31_32 vert;
-	struct fixed31_32 horz_c;
-	struct fixed31_32 vert_c;
-};
-
-struct scaler_data {
-	struct overscan_info overscan;
-	struct scaling_taps taps;
-	struct rect viewport;
-	struct scaling_ratios ratios;
-
-	enum pixel_format format;
-};
-
-struct transform_funcs {
-	bool (*transform_power_up)(
-		struct transform *xfm);
-
-	bool (*transform_set_scaler)(
-		struct transform *xfm,
-		const struct scaler_data *data);
-
-	void (*transform_set_scaler_bypass)(
-		struct transform *xfm);
-
-	void (*transform_set_scaler_filter)(
-		struct transform *xfm,
-		struct scaler_filter *filter);
-
-	void (*transform_set_gamut_remap)(
-		struct transform *xfm,
-		const struct xfm_grph_csc_adjustment *adjust);
-
-	bool (*transform_set_pixel_storage_depth)(
-		struct transform *xfm,
-		enum lb_pixel_depth depth,
-		const struct bit_depth_reduction_params *bit_depth_params);
-
-	bool (*transform_get_current_pixel_storage_depth)(
-		struct transform *xfm,
-		enum lb_pixel_depth *depth);
-
-	void (*transform_set_alpha)(struct transform *xfm, bool enable);
-};
-
-#endif
diff --git a/drivers/gpu/drm/amd/dal/dc/virtual/virtual_link_encoder.h b/drivers/gpu/drm/amd/dal/dc/virtual/virtual_link_encoder.h
index c34bd04..e44713f 100644
--- a/drivers/gpu/drm/amd/dal/dc/virtual/virtual_link_encoder.h
+++ b/drivers/gpu/drm/amd/dal/dc/virtual/virtual_link_encoder.h
@@ -26,7 +26,7 @@
 #ifndef __DC_VIRTUAL_LINK_ENCODER_H__
 #define __DC_VIRTUAL_LINK_ENCODER_H__
 
-#include "inc/link_encoder.h"
+#include "link_encoder.h"
 
 bool virtual_link_encoder_construct(
 	struct link_encoder *enc, const struct encoder_init_data *init_data);
diff --git a/drivers/gpu/drm/amd/dal/dc/virtual/virtual_stream_encoder.h b/drivers/gpu/drm/amd/dal/dc/virtual/virtual_stream_encoder.h
index dce8425..bf3422c 100644
--- a/drivers/gpu/drm/amd/dal/dc/virtual/virtual_stream_encoder.h
+++ b/drivers/gpu/drm/amd/dal/dc/virtual/virtual_stream_encoder.h
@@ -26,7 +26,7 @@
 #ifndef __DC_VIRTUAL_STREAM_ENCODER_H__
 #define __DC_VIRTUAL_STREAM_ENCODER_H__
 
-#include "inc/stream_encoder.h"
+#include "stream_encoder.h"
 
 struct stream_encoder *virtual_stream_encoder_create(
 	struct dc_context *ctx, struct dc_bios *bp);
-- 
2.7.4