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From 514f76d9dcfd503d00c0905303a4fb580f566dd9 Mon Sep 17 00:00:00 2001
From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Date: Fri, 26 Feb 2016 15:42:45 -0500
Subject: [PATCH 0846/1110] drm/amd/dal: Prevent underflow lock
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c
index d4c5944..d554332 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c
@@ -273,17 +273,13 @@ bool dce110_timing_generator_enable_crtc(struct timing_generator *tg)
uint32_t value;
struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg);
- value = dm_read_reg(tg->ctx,
- CRTC_REG(mmCRTC_MASTER_UPDATE_MODE));
- set_reg_field_value(value, 0,
- CRTC_MASTER_UPDATE_MODE, MASTER_UPDATE_MODE);
- dm_write_reg(tg->ctx,
- CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value);
-
- /* TODO: may want this on for looking for underflow */
value = 0;
dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value);
+ /* TODO: may want this on to catch underflow */
+ value = 0;
+ dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_LOCK), value);
+
result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true);
return result == BP_RESULT_OK;
--
2.7.4
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