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From 738f0b087301175de753eb1a10825b50c191749a Mon Sep 17 00:00:00 2001
From: David Rokhvarg <David.Rokhvarg@amd.com>
Date: Thu, 18 Feb 2016 17:03:07 -0500
Subject: [PATCH 0815/1110] drm/amd/dal: Ungate Underlay pipe clock.
Signed-off-by: David Rokhvarg <David.Rokhvarg@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
---
.../drm/amd/dal/dc/gpu/dce110/dc_clock_gating_dce110.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/amd/dal/dc/gpu/dce110/dc_clock_gating_dce110.c b/drivers/gpu/drm/amd/dal/dc/gpu/dce110/dc_clock_gating_dce110.c
index 4c307f6..a54cc25 100644
--- a/drivers/gpu/drm/amd/dal/dc/gpu/dce110/dc_clock_gating_dce110.c
+++ b/drivers/gpu/drm/amd/dal/dc/gpu/dce110/dc_clock_gating_dce110.c
@@ -62,6 +62,21 @@ static void force_hw_base_light_sleep(struct dc_context *ctx)
}
+static void underlay_clock_enable(struct dc_context *ctx)
+{
+ uint32_t value = 0;
+
+ value = dm_read_reg(ctx, mmDCFEV_CLOCK_CONTROL);
+
+ set_reg_field_value(
+ value,
+ 1,
+ DCFEV_CLOCK_CONTROL,
+ DCFEV_CLOCK_ENABLE);
+
+ dm_write_reg(ctx, mmDCFEV_CLOCK_CONTROL, value);
+}
+
static void enable_hw_base_light_sleep(struct dc_context *ctx)
{
NOT_IMPLEMENTED();
@@ -86,5 +101,6 @@ void dal_dc_clock_gating_dce110_power_up(
disable_sw_manual_control_light_sleep(ctx);
} else {
force_hw_base_light_sleep(ctx);
+ underlay_clock_enable(ctx);
}
}
--
2.7.4
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