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From 2205d2e6213fc8890b47a8e1b1d7bddeaddf3e41 Mon Sep 17 00:00:00 2001
From: Harry Wentland <harry.wentland@amd.com>
Date: Mon, 30 Nov 2015 16:06:40 -0500
Subject: [PATCH 0539/1110] drm/amd/dal: Fix engine_id usage in
update_mst_stream_allocation_table
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
---
drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
index bd3962e..91796ac 100644
--- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
+++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_link_encoder.c
@@ -26,6 +26,7 @@
#include "dal_services.h"
#include "core_types.h"
#include "link_encoder_types.h"
+#include "stream_encoder_types.h"
#include "dce110_link_encoder.h"
#include "i2caux_interface.h"
#include "dce/dce_11_0_d.h"
@@ -1594,6 +1595,7 @@ void dce110_link_encoder_update_mst_stream_allocation_table(
uint32_t value0;
uint32_t value1;
uint32_t retries = 0;
+ struct core_stream *core_stream = NULL;
/* For CZ, there are only 3 pipes. So Virtual channel is up 3.*/
@@ -1605,9 +1607,11 @@ void dce110_link_encoder_update_mst_stream_allocation_table(
value1 = dal_read_reg(enc->ctx, mmDP_MSE_SAT1 + addr_offset);
if (table->stream_count >= 1) {
+ core_stream = DC_STREAM_TO_CORE(table->stream_allocations[0].engine);
+
set_reg_field_value(
value0,
- table->stream_allocations[0].engine,
+ core_stream->stream_enc->id,
DP_MSE_SAT0,
DP_MSE_SAT_SRC0);
@@ -1619,9 +1623,11 @@ void dce110_link_encoder_update_mst_stream_allocation_table(
}
if (table->stream_count >= 2) {
+ core_stream = DC_STREAM_TO_CORE(table->stream_allocations[1].engine);
+
set_reg_field_value(
value0,
- table->stream_allocations[1].engine,
+ core_stream->stream_enc->id,
DP_MSE_SAT0,
DP_MSE_SAT_SRC1);
@@ -1633,9 +1639,11 @@ void dce110_link_encoder_update_mst_stream_allocation_table(
}
if (table->stream_count >= 3) {
+ core_stream = DC_STREAM_TO_CORE(table->stream_allocations[2].engine);
+
set_reg_field_value(
value1,
- table->stream_allocations[2].engine,
+ core_stream->stream_enc->id,
DP_MSE_SAT1,
DP_MSE_SAT_SRC2);
--
2.7.4
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