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From 8fa4dfddd15bd915d66dae88aba8326df2189d32 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
Date: Wed, 10 Feb 2016 14:35:19 +0100
Subject: [PATCH 0306/1110] drm/amdgpu: use separate scheduler entity for UVD
 submissions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

This allows us to remove the kernel context and use a better
priority for the submissions.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Kalyan Alle <kalyan.alle@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 12 ++++++++++++
 2 files changed, 13 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a6b4b03..5db8e71 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1608,6 +1608,7 @@ struct amdgpu_uvd {
 	struct amdgpu_ring	ring;
 	struct amdgpu_irq_src	irq;
 	bool			address_64_bit;
+        struct amd_sched_entity entity;
 };
 
 /*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
index 4acfddf..726f0cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
@@ -91,6 +91,8 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work);
 
 int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
 {
+        struct amdgpu_ring *ring;
+        struct amd_sched_rq *rq;
 	unsigned long bo_size;
 	const char *fw_name;
 	const struct common_firmware_header *hdr;
@@ -193,6 +195,15 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
 	}
 
 	amdgpu_bo_unreserve(adev->uvd.vcpu_bo);
+ 
+        ring = &adev->uvd.ring;
+        rq = &ring->sched.sched_rq[AMD_SCHED_PRIORITY_NORMAL];
+        r = amd_sched_entity_init(&ring->sched, &adev->uvd.entity,
+                                  rq, amdgpu_sched_jobs);
+        if (r != 0) {
+                DRM_ERROR("Failed setting up UVD run queue.\n");
+                return r;
+        }
 
 	for (i = 0; i < AMDGPU_MAX_UVD_HANDLES; ++i) {
 		atomic_set(&adev->uvd.handles[i], 0);
@@ -212,6 +223,7 @@ int amdgpu_uvd_sw_fini(struct amdgpu_device *adev)
 
 	if (adev->uvd.vcpu_bo == NULL)
 		return 0;
+        amd_sched_entity_fini(&adev->uvd.ring.sched, &adev->uvd.entity);
 
 	r = amdgpu_bo_reserve(adev->uvd.vcpu_bo, false);
 	if (!r) {
-- 
2.7.4