From abae7b4195096fb0c2e55d8da6b495e86453b566 Mon Sep 17 00:00:00 2001 From: Rex Zhu Date: Tue, 12 Sep 2017 13:18:13 +0800 Subject: [PATCH 1054/4131] drm/amd/powerplay: fix pcie max lane define error Change-Id: I307465ec2fe8fe02e19c76d979be0a1af30fed0c Signed-off-by: Rex Zhu --- drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h index 629990f..57a0467 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h @@ -297,7 +297,7 @@ typedef enum PP_PCIEGen PP_PCIEGen; #define PP_Min_PCIEGen PP_PCIEGen1 #define PP_Max_PCIEGen PP_PCIEGen3 #define PP_Min_PCIELane 1 -#define PP_Max_PCIELane 32 +#define PP_Max_PCIELane 16 enum phm_clock_Type { PHM_DispClock = 1, -- 2.7.4