From 4907055d5afaa258b6d9f47e70aa585841393cf5 Mon Sep 17 00:00:00 2001 From: Dmytro Laktyushkin Date: Fri, 28 Jul 2017 08:16:27 -0400 Subject: [PATCH 0989/4131] drm/amd/display: fix hubp mpcc and opp tracking This should be handled by mi and mpc only Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Harry Wentland --- drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c | 2 ++ drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 6 ++---- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c | 3 +-- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c index 6276697..83d9caa 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c @@ -686,6 +686,8 @@ void dce_mem_input_construct( dce_mi->shifts = mi_shift; dce_mi->masks = mi_mask; + dce_mi->base.mpcc_id = 0xf; + dce_mi->base.opp_id = 0xf; } void dce112_mem_input_construct( diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c index ddfa6a8..69f67f6 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c @@ -1066,9 +1066,6 @@ static void plane_atomic_disable(struct dc *dc, fe_idx);*/ mi->funcs->set_blank(mi, true); - /*todo: unhack this*/ - mi->opp_id = 0xf; - mi->mpcc_id = 0xf; if (dc->debug.sanity_checks) verify_allow_pstate_change_high(dc->hwseq); @@ -2304,7 +2301,8 @@ static void update_dchubp_dpp( &plane_state->dcc, plane_state->horizontal_mirror); - mi->funcs->set_blank(mi, !is_pipe_tree_visible(pipe_ctx)); + if (is_pipe_tree_visible(pipe_ctx)) + mi->funcs->set_blank(mi, false); } diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c index 11daf6b..0a47e6a 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mem_input.c @@ -51,9 +51,8 @@ static void min10_set_blank(struct mem_input *mem_input, bool blank) REG_WAIT(DCHUBP_CNTL, HUBP_NO_OUTSTANDING_REQ, 1, 1, 200); - /*todo: unhack this mem_input->mpcc_id = 0xf; - mem_input->opp_id = 0xf;*/ + mem_input->opp_id = 0xf; } } -- 2.7.4