From d9b1b3232c2ea10392185c79c16e75caa0c55749 Mon Sep 17 00:00:00 2001
From: Charlene Liu <charlene.liu@amd.com>
Date: Fri, 31 Mar 2017 17:40:15 -0400
Subject: [PATCH 0335/4131] drm/amd/display: adding FCLK and DPPCLK clock types

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dm_services_types.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dm_services_types.h b/drivers/gpu/drm/amd/display/dc/dm_services_types.h
index f89395e..408141c 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_services_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_services_types.h
@@ -71,7 +71,9 @@ enum dm_pp_clock_type {
 	DM_PP_CLOCK_TYPE_DCFCLK,
 	DM_PP_CLOCK_TYPE_SOCCLK,
 	DM_PP_CLOCK_TYPE_PIXELCLK,
-	DM_PP_CLOCK_TYPE_DISPLAYPHYCLK
+	DM_PP_CLOCK_TYPE_DISPLAYPHYCLK,
+	DM_PP_CLOCK_TYPE_DPPCLK,
+	DM_PP_CLOCK_TYPE_FCLK,
 };
 
 #define DC_DECODE_PP_CLOCK_TYPE(clk_type) \
-- 
2.7.4