From 364a43d0d1df5552c3dad34026ef81a90d10c8b7 Mon Sep 17 00:00:00 2001 From: Jordan Lazare Date: Thu, 23 Feb 2017 14:07:29 -0500 Subject: [PATCH 0234/4131] drm/amd/display: Fix gamma colour corruption for 10 bit surfaces Gamma LUT shouldn't be used for 10-bit and above. Should instead be using prescale and bypassing input gamma. Signed-off-by: Jordan Lazare Acked-by: Harry Wentland Reviewed-by: Tony Cheng Signed-off-by: Alex Deucher --- .../amd/display/dc/dce110/dce110_hw_sequencer.c | 15 ++++- drivers/gpu/drm/amd/display/dc/dce80/Makefile | 3 +- .../gpu/drm/amd/display/dc/dce80/dce80_ipp_gamma.c | 71 ---------------------- 3 files changed, 15 insertions(+), 74 deletions(-) delete mode 100644 drivers/gpu/drm/amd/display/dc/dce80/dce80_ipp_gamma.c diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c index 2f68bf2..2d2daa6 100644 --- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c @@ -233,6 +233,19 @@ static void build_prescale_params(struct ipp_prescale_params *prescale_params, } } + +/* Only use LUT for 8 bit formats */ +static bool use_lut(const struct core_surface *surface) +{ + switch (surface->public.format) { + case SURFACE_PIXEL_FORMAT_GRPH_ARGB8888: + case SURFACE_PIXEL_FORMAT_GRPH_ABGR8888: + return true; + default: + return false; + } +} + static bool dce110_set_input_transfer_func( struct pipe_ctx *pipe_ctx, const struct core_surface *surface) @@ -251,7 +264,7 @@ static bool dce110_set_input_transfer_func( build_prescale_params(&prescale_params, surface); ipp->funcs->ipp_program_prescale(ipp, &prescale_params); - if (surface->public.gamma_correction) + if (surface->public.gamma_correction && use_lut(surface)) ipp->funcs->ipp_program_input_lut(ipp, surface->public.gamma_correction); if (tf == NULL) { diff --git a/drivers/gpu/drm/amd/display/dc/dce80/Makefile b/drivers/gpu/drm/amd/display/dc/dce80/Makefile index 0261d1b..8d2c3db 100644 --- a/drivers/gpu/drm/amd/display/dc/dce80/Makefile +++ b/drivers/gpu/drm/amd/display/dc/dce80/Makefile @@ -2,8 +2,7 @@ # Makefile for the 'controller' sub-component of DAL. # It provides the control and status of HW CRTC block. -DCE80 = dce80_ipp.o dce80_ipp_gamma.o \ - dce80_timing_generator.o \ +DCE80 = dce80_ipp.o dce80_timing_generator.o \ dce80_compressor.o dce80_mem_input.o dce80_hw_sequencer.o \ dce80_resource.o diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_ipp_gamma.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_ipp_gamma.c deleted file mode 100644 index 760168d..0000000 --- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_ipp_gamma.c +++ /dev/null @@ -1,71 +0,0 @@ -/* - * Copyright 2012-15 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: AMD - * - */ - -#include "dm_services.h" - -#include "include/logger_interface.h" -#include "include/fixed31_32.h" -#include "basics/conversion.h" - -#include "dce/dce_8_0_d.h" -#include "dce/dce_8_0_sh_mask.h" - -#include "dce80_ipp.h" -#include "dce110/dce110_ipp.h" - -#define DCP_REG(reg)\ - (reg + ipp80->offsets.dcp_offset) - -/*PROTOTYPE DECLARATIONS*/ - -static void set_legacy_input_gamma_mode( - struct dce110_ipp *ipp80, - bool is_legacy); - -void dce80_ipp_set_legacy_input_gamma_mode( - struct input_pixel_processor *ipp, - bool is_legacy) -{ - struct dce110_ipp *ipp80 = TO_DCE80_IPP(ipp); - - set_legacy_input_gamma_mode(ipp80, is_legacy); -} - -static void set_legacy_input_gamma_mode( - struct dce110_ipp *ipp80, - bool is_legacy) -{ - const uint32_t addr = DCP_REG(mmINPUT_GAMMA_CONTROL); - uint32_t value = dm_read_reg(ipp80->base.ctx, addr); - - set_reg_field_value( - value, - !is_legacy, - INPUT_GAMMA_CONTROL, - GRPH_INPUT_GAMMA_MODE); - - dm_write_reg(ipp80->base.ctx, addr, value); -} - -- 2.7.4