From 9b256c64ca4a1f3822e89708f712abedf1844cfb Mon Sep 17 00:00:00 2001 From: Hersen Wu Date: Wed, 4 Jan 2017 10:22:35 -0500 Subject: [PATCH 0118/4131] drm/amd/display: Fix DP PHY test pre-emphasis not set properly Signed-off-by: Hersen Wu Reviewed-by: Hersen Wu Acked-by: Harry Wentland Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/core/dc.c | 15 +++++++++++---- drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 9 +++++---- drivers/gpu/drm/amd/display/dc/dc.h | 3 ++- drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c | 2 +- 4 files changed, 19 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index a7c6c98..25e7d7b 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -332,14 +332,21 @@ static bool setup_psr(struct dc *dc, const struct dc_stream *stream) } static void set_drive_settings(struct dc *dc, - struct link_training_settings *lt_settings) + struct link_training_settings *lt_settings, + const struct dc_link *link) { struct core_dc *core_dc = DC_TO_CORE(dc); int i; - for (i = 0; i < core_dc->link_count; i++) - dc_link_dp_set_drive_settings(&core_dc->links[i]->public, - lt_settings); + for (i = 0; i < core_dc->link_count; i++) { + if (&core_dc->links[i]->public == link) + break; + } + + if (i >= core_dc->link_count) + ASSERT_CRITICAL(false); + + dc_link_dp_set_drive_settings(&core_dc->links[i]->public, lt_settings); } static void perform_link_training(struct dc *dc, diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c index e287584..da49be0 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c @@ -229,10 +229,9 @@ void dp_retrain_link_dp_test(struct core_link *link, link->link_enc, SIGNAL_TYPE_DISPLAY_PORT); - /* Clear current link setting. - * memset(&link->public.cur_link_settings, 0, - * sizeof(link->public.cur_link_settings)); - */ + /* Clear current link setting. */ + memset(&link->public.cur_link_settings, 0, + sizeof(link->public.cur_link_settings)); link->link_enc->funcs->enable_dp_output( link->link_enc, @@ -246,6 +245,8 @@ void dp_retrain_link_dp_test(struct core_link *link, link_setting, skip_video_pattern); + link->public.cur_link_settings = *link_setting; + link->dc->hwss.unblank_stream(&pipes[i], link_setting); } diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 83d78c2..6400226 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -112,7 +112,8 @@ struct link_training_settings; struct dc_link_funcs { void (*set_drive_settings)(struct dc *dc, - struct link_training_settings *lt_settings); + struct link_training_settings *lt_settings, + const struct dc_link *link); void (*perform_link_training)(struct dc *dc, struct dc_link_settings *link_setting, bool skip_video_pattern); diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c index 323493b..cb5e595 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c @@ -1363,7 +1363,7 @@ void dce110_link_encoder_dp_set_lane_settings( cntl.pixel_clock = link_settings->link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ; - for (lane = 0; lane < link_settings->link_settings.lane_count; ++lane) { + for (lane = 0; lane < link_settings->link_settings.lane_count; lane++) { /* translate lane settings */ training_lane_set.bits.VOLTAGE_SWING_SET = -- 2.7.4