From 30d45858fa810be5867635c857070f5cac0d1a92 Mon Sep 17 00:00:00 2001 From: Zeyu Fan Date: Mon, 12 Dec 2016 13:54:56 -0500 Subject: [PATCH 0060/4131] drm/amd/display: Fix HDMI scaling corruption issue. Signed-off-by: Zeyu Fan Reviewed-by: Tony Cheng Acked-by: Harry Wentland Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/display/dc/dce/dce_transform.c | 5 +++++ drivers/gpu/drm/amd/display/dc/dce/dce_transform.h | 8 +++++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c index bbf4d97..50a6a25 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.c @@ -83,6 +83,8 @@ static bool setup_scaling_configuration( struct dce_transform *xfm_dce, const struct scaler_data *data) { + REG_SET(SCL_BYPASS_CONTROL, 0, SCL_BYPASS_MODE, 0); + if (data->taps.h_taps + data->taps.v_taps <= 2) { /* Set bypass */ REG_UPDATE_2(SCL_MODE, SCL_MODE, 0, SCL_PSCL_EN, 0); @@ -285,6 +287,9 @@ static void dce_transform_set_scaler( LB_MEMORY_CONFIG, 0, LB_MEMORY_SIZE, xfm_dce->lb_memory_size); + /* Clear SCL_F_SHARP_CONTROL value to 0 */ + REG_WRITE(SCL_F_SHARP_CONTROL, 0); + /* 1. Program overscan */ program_overscan(xfm_dce, data); diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h index 897645e..b2cf9bf 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h @@ -53,6 +53,7 @@ SRI(SCL_MODE, SCL, id), \ SRI(SCL_TAP_CONTROL, SCL, id), \ SRI(SCL_CONTROL, SCL, id), \ + SRI(SCL_BYPASS_CONTROL, SCL, id), \ SRI(EXT_OVERSCAN_LEFT_RIGHT, SCL, id), \ SRI(EXT_OVERSCAN_TOP_BOTTOM, SCL, id), \ SRI(SCL_VERT_FILTER_CONTROL, SCL, id), \ @@ -67,7 +68,8 @@ SRI(SCL_VERT_FILTER_INIT, SCL, id), \ SRI(SCL_AUTOMATIC_MODE_CONTROL, SCL, id), \ SRI(LB_MEMORY_CTRL, LB, id), \ - SRI(SCL_UPDATE, SCL, id) + SRI(SCL_UPDATE, SCL, id), \ + SRI(SCL_F_SHARP_CONTROL, SCL, id) #define XFM_COMMON_REG_LIST_DCE100(id) \ XFM_COMMON_REG_LIST_DCE_BASE(id), \ @@ -116,6 +118,7 @@ XFM_SF(SCL_TAP_CONTROL, SCL_H_NUM_OF_TAPS, mask_sh), \ XFM_SF(SCL_TAP_CONTROL, SCL_V_NUM_OF_TAPS, mask_sh), \ XFM_SF(SCL_CONTROL, SCL_BOUNDARY_MODE, mask_sh), \ + XFM_SF(SCL_BYPASS_CONTROL, SCL_BYPASS_MODE, mask_sh), \ XFM_SF(EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_LEFT, mask_sh), \ XFM_SF(EXT_OVERSCAN_LEFT_RIGHT, EXT_OVERSCAN_RIGHT, mask_sh), \ XFM_SF(EXT_OVERSCAN_TOP_BOTTOM, EXT_OVERSCAN_TOP, mask_sh), \ @@ -181,6 +184,7 @@ type GAMUT_REMAP_C34; \ type GRPH_GAMUT_REMAP_MODE; \ type SCL_MODE; \ + type SCL_BYPASS_MODE; \ type SCL_PSCL_EN; \ type SCL_H_NUM_OF_TAPS; \ type SCL_V_NUM_OF_TAPS; \ @@ -241,6 +245,7 @@ struct dce_transform_registers { uint32_t SCL_MODE; uint32_t SCL_TAP_CONTROL; uint32_t SCL_CONTROL; + uint32_t SCL_BYPASS_CONTROL; uint32_t EXT_OVERSCAN_LEFT_RIGHT; uint32_t EXT_OVERSCAN_TOP_BOTTOM; uint32_t SCL_VERT_FILTER_CONTROL; @@ -258,6 +263,7 @@ struct dce_transform_registers { uint32_t SCL_AUTOMATIC_MODE_CONTROL; uint32_t LB_MEMORY_CTRL; uint32_t SCL_UPDATE; + uint32_t SCL_F_SHARP_CONTROL; }; struct init_int_and_frac { -- 2.7.4