From 594b416da693a34ae9e024bb49c3e148121d87d9 Mon Sep 17 00:00:00 2001 From: Eric Huang Date: Fri, 15 Apr 2016 16:33:20 -0400 Subject: [PATCH 1028/1110] drm/amd/powerplay: revise reading/writing pptable on Fiji Reviewed-by: Alex Deucher Signed-off-by: Eric Huang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c | 40 ++++++++++++++++++++---- drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h | 4 ++- 2 files changed, 37 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c index 623ec80..3334a89 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c @@ -579,6 +579,18 @@ static int fiji_patch_boot_state(struct pp_hwmgr *hwmgr, return 0; } +static int fiji_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) +{ + struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend); + + if (data->soft_pp_table) { + kfree(data->soft_pp_table); + data->soft_pp_table = NULL; + } + + return phm_hwmgr_backend_fini(hwmgr); +} + static int fiji_hwmgr_backend_init(struct pp_hwmgr *hwmgr) { struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend); @@ -734,7 +746,7 @@ static int fiji_hwmgr_backend_init(struct pp_hwmgr *hwmgr) data->pcie_lane_cap = (uint32_t)sys_info.value; } else { /* Ignore return value in here, we are cleaning up a mess. */ - tonga_hwmgr_backend_fini(hwmgr); + fiji_hwmgr_backend_fini(hwmgr); } return 0; @@ -5096,18 +5108,34 @@ static int fiji_get_pp_table(struct pp_hwmgr *hwmgr, char **table) { struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend); - *table = (char *)&data->smc_state_table; + if (!data->soft_pp_table) { + data->soft_pp_table = kzalloc(hwmgr->soft_pp_table_size, GFP_KERNEL); + if (!data->soft_pp_table) + return -ENOMEM; + memcpy(data->soft_pp_table, hwmgr->soft_pp_table, + hwmgr->soft_pp_table_size); + } + + *table = (char *)&data->soft_pp_table; - return sizeof(struct SMU73_Discrete_DpmTable); + return hwmgr->soft_pp_table_size; } static int fiji_set_pp_table(struct pp_hwmgr *hwmgr, const char *buf, size_t size) { struct fiji_hwmgr *data = (struct fiji_hwmgr *)(hwmgr->backend); - void *table = (void *)&data->smc_state_table; + if (!data->soft_pp_table) { + data->soft_pp_table = kzalloc(hwmgr->soft_pp_table_size, GFP_KERNEL); + if (!data->soft_pp_table) + return -ENOMEM; + } + + memcpy(data->soft_pp_table, buf, size); + + hwmgr->soft_pp_table = data->soft_pp_table; - memcpy(table, buf, size); + /* TODO: re-init powerplay to implement modified pptable */ return 0; } @@ -5274,7 +5302,7 @@ bool fiji_check_smc_update_required_for_display_configuration(struct pp_hwmgr *h static const struct pp_hwmgr_func fiji_hwmgr_funcs = { .backend_init = &fiji_hwmgr_backend_init, - .backend_fini = &tonga_hwmgr_backend_fini, + .backend_fini = &fiji_hwmgr_backend_fini, .asic_setup = &fiji_setup_asic_task, .dynamic_state_management_enable = &fiji_enable_dpm_tasks, .force_dpm_level = &fiji_dpm_force_dpm_level, diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h index 4b29d9e..170edf5 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.h @@ -302,6 +302,9 @@ struct fiji_hwmgr { bool pg_acp_init; bool frtc_enabled; bool frtc_status_changed; + + /* soft pptable for re-uploading into smu */ + void *soft_pp_table; }; /* To convert to Q8.8 format for firmware */ @@ -338,7 +341,6 @@ enum Fiji_I2CLineID { #define FIJI_UNUSED_GPIO_PIN 0x7F extern int tonga_initializa_dynamic_state_adjustment_rule_settings(struct pp_hwmgr *hwmgr); -extern int tonga_hwmgr_backend_fini(struct pp_hwmgr *hwmgr); extern int tonga_get_mc_microcode_version (struct pp_hwmgr *hwmgr); extern int tonga_notify_smc_display_config_after_ps_adjustment(struct pp_hwmgr *hwmgr); extern int tonga_notify_smc_display_change(struct pp_hwmgr *hwmgr, bool has_display); -- 2.7.4