From 442eebcea42c660b5339c9856e34bde1d2e9a4cf Mon Sep 17 00:00:00 2001 From: Dmytro Laktyushkin Date: Thu, 17 Mar 2016 11:18:42 -0400 Subject: [PATCH 0977/1110] drm/amd/dal: unhardcode refresh rate for pplib Signed-off-by: Dmytro Laktyushkin Acked-by: Harry Wentland Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/dal/dc/core/dc.c | 7 +++++-- drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.c | 2 +- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc.c b/drivers/gpu/drm/amd/dal/dc/core/dc.c index 3f28446..011dbaf 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc.c @@ -599,8 +599,11 @@ static void fill_display_configs( default: break; } - /* TODO: unhardcode*/ - cfg->v_refresh = 60; + /* Round v_refresh*/ + cfg->v_refresh = stream->public.timing.pix_clk_khz * 1000; + cfg->v_refresh /= stream->public.timing.h_total; + cfg->v_refresh = (cfg->v_refresh + stream->public.timing.v_total / 2) + / stream->public.timing.v_total; } } pp_display_cfg->display_count = num_cfgs; diff --git a/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.c b/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.c index e559f95..875bf22 100644 --- a/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.c +++ b/drivers/gpu/drm/amd/dal/dc/gpu/dce112/display_clock_dce112.c @@ -50,7 +50,7 @@ static struct state_dependent_clocks max_clks_by_state[] = { /*ClocksStateNominal*/ { .display_clk_khz = 467000, .pixel_clk_khz = 400000 }, /*ClocksStatePerformance*/ -{ .display_clk_khz = 643000, .pixel_clk_khz = 4000000 } }; +{ .display_clk_khz = 643000, .pixel_clk_khz = 400000 } }; /* Starting point for each divider range.*/ enum divider_range_start { -- 2.7.4