From 93c0370877ada6230c6fab7687f299aca2f9495b Mon Sep 17 00:00:00 2001 From: Jordan Lazare Date: Thu, 21 Jan 2016 18:04:08 -0500 Subject: [PATCH 0722/1110] drm/amd/dal: Clean up set_mode_interface and adjustment structs Signed-off-by: Jordan Lazare Acked-by: Harry Wentland --- drivers/gpu/drm/amd/dal/dc/core/dc_resource.c | 2 +- drivers/gpu/drm/amd/dal/dc/core/dc_surface.c | 3 +- .../drm/amd/dal/dc/dce110/dce110_hw_sequencer.c | 7 - .../amd/dal/dc/dce110/dce110_timing_generator.h | 1 + drivers/gpu/drm/amd/dal/dc/inc/core_dc.h | 2 +- drivers/gpu/drm/amd/dal/dc/inc/transform.h | 99 +++++ drivers/gpu/drm/amd/dal/include/adjustment_types.h | 420 --------------------- .../gpu/drm/amd/dal/include/hw_adjustment_types.h | 205 ---------- drivers/gpu/drm/amd/dal/include/set_mode_types.h | 144 +------ 9 files changed, 104 insertions(+), 779 deletions(-) delete mode 100644 drivers/gpu/drm/amd/dal/include/adjustment_types.h delete mode 100644 drivers/gpu/drm/amd/dal/include/hw_adjustment_types.h diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c index c52a1e2..2aa8db1 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc_resource.c @@ -29,7 +29,7 @@ #include "link_encoder.h" #include "stream_encoder.h" #include "opp.h" - +#include "transform.h" void unreference_clock_source( struct resource_context *res_ctx, diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c b/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c index 41a5feb..ce60e9d 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc_surface.c @@ -29,8 +29,7 @@ /* DC core (private) */ #include "core_dc.h" -#include "adjustment_types.h" - +#include "inc/transform.h" /******************************************************************************* * Private structures diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c index 74d437e..f899565 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_hw_sequencer.c @@ -1498,13 +1498,6 @@ static bool set_plane_config( controller_idx, BLENDER_MODE_CURRENT_PIPE); -#if 0 - program_alpha_mode( - crtc, - &pl_cfg->attributes.blend_flags, - path_mode->mode.timing.pixel_encoding); -#endif - mi->funcs->mem_input_program_surface_config( mi, surface->public.format, diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h index 0ef4708..0a57052 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h @@ -29,6 +29,7 @@ #include "inc/timing_generator_types.h" #include "../include/grph_object_id.h" +#include "../include/hw_sequencer_types.h" /* overscan in blank for YUV color space. For RGB, it is zero for black. */ #define CRTC_OVERSCAN_COLOR_BLACK_COLOR_B_CB_YUV_4CV 0x1f4 diff --git a/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h b/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h index 9d62a24..2d5644c 100644 --- a/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h +++ b/drivers/gpu/drm/amd/dal/dc/inc/core_dc.h @@ -10,7 +10,7 @@ #include "core_types.h" #include "hw_sequencer.h" - +#include "dal_services.h" struct dc { struct dc_context *ctx; diff --git a/drivers/gpu/drm/amd/dal/dc/inc/transform.h b/drivers/gpu/drm/amd/dal/dc/inc/transform.h index 7b882ec..50dde2d 100644 --- a/drivers/gpu/drm/amd/dal/dc/inc/transform.h +++ b/drivers/gpu/drm/amd/dal/dc/inc/transform.h @@ -81,6 +81,105 @@ enum lb_pixel_depth { LB_PIXEL_DEPTH_36BPP = 8 }; + +struct raw_gamma_ramp_rgb { + uint32_t red; + uint32_t green; + uint32_t blue; +}; + +enum raw_gamma_ramp_type { + GAMMA_RAMP_TYPE_UNINITIALIZED, + GAMMA_RAMP_TYPE_DEFAULT, + GAMMA_RAMP_TYPE_RGB256, + GAMMA_RAMP_TYPE_FIXED_POINT +}; + +#define NUM_OF_RAW_GAMMA_RAMP_RGB_256 256 +struct raw_gamma_ramp { + enum raw_gamma_ramp_type type; + struct raw_gamma_ramp_rgb rgb_256[NUM_OF_RAW_GAMMA_RAMP_RGB_256]; + uint32_t size; +}; + + +/* Colorimetry */ +enum colorimetry { + COLORIMETRY_NO_DATA = 0, + COLORIMETRY_ITU601 = 1, + COLORIMETRY_ITU709 = 2, + COLORIMETRY_EXTENDED = 3 +}; + +/* ColorimetryEx */ +enum colorimetry_ex { + COLORIMETRY_EX_XVYCC601 = 0, + COLORIMETRY_EX_XVYCC709 = 1, + COLORIMETRY_EX_SYCC601 = 2, + COLORIMETRY_EX_ADOBEYCC601 = 3, + COLORIMETRY_EX_ADOBERGB = 4, + COLORIMETRY_EX_RESERVED5 = 5, + COLORIMETRY_EX_RESERVED6 = 6, + COLORIMETRY_EX_RESERVED7 = 7 +}; + +enum ds_color_space { + DS_COLOR_SPACE_UNKNOWN = 0, + DS_COLOR_SPACE_SRGB_FULLRANGE = 1, + DS_COLOR_SPACE_SRGB_LIMITEDRANGE, + DS_COLOR_SPACE_YPBPR601, + DS_COLOR_SPACE_YPBPR709, + DS_COLOR_SPACE_YCBCR601, + DS_COLOR_SPACE_YCBCR709, + DS_COLOR_SPACE_NMVPU_SUPERAA, + DS_COLOR_SPACE_YCBCR601_YONLY, + DS_COLOR_SPACE_YCBCR709_YONLY/*same as YCbCr, but Y in Full range*/ +}; + + +enum active_format_info { + ACTIVE_FORMAT_NO_DATA = 0, + ACTIVE_FORMAT_VALID = 1 +}; + +/* Active format aspect ratio */ +enum active_format_aspect_ratio { + ACTIVE_FORMAT_ASPECT_RATIO_SAME_AS_PICTURE = 8, + ACTIVE_FORMAT_ASPECT_RATIO_4_3 = 9, + ACTIVE_FORMAT_ASPECT_RATIO_16_9 = 0XA, + ACTIVE_FORMAT_ASPECT_RATIO_14_9 = 0XB +}; + +enum bar_info { + BAR_INFO_NOT_VALID = 0, + BAR_INFO_VERTICAL_VALID = 1, + BAR_INFO_HORIZONTAL_VALID = 2, + BAR_INFO_BOTH_VALID = 3 +}; + +enum picture_scaling { + PICTURE_SCALING_UNIFORM = 0, + PICTURE_SCALING_HORIZONTAL = 1, + PICTURE_SCALING_VERTICAL = 2, + PICTURE_SCALING_BOTH = 3 +}; + +/* RGB quantization range */ +enum rgb_quantization_range { + RGB_QUANTIZATION_DEFAULT_RANGE = 0, + RGB_QUANTIZATION_LIMITED_RANGE = 1, + RGB_QUANTIZATION_FULL_RANGE = 2, + RGB_QUANTIZATION_RESERVED = 3 +}; + +/* YYC quantization range */ +enum yyc_quantization_range { + YYC_QUANTIZATION_LIMITED_RANGE = 0, + YYC_QUANTIZATION_FULL_RANGE = 1, + YYC_QUANTIZATION_RESERVED2 = 2, + YYC_QUANTIZATION_RESERVED3 = 3 +}; + struct transform_funcs { bool (*transform_power_up)(struct transform *xfm); diff --git a/drivers/gpu/drm/amd/dal/include/adjustment_types.h b/drivers/gpu/drm/amd/dal/include/adjustment_types.h deleted file mode 100644 index f6c0d61..0000000 --- a/drivers/gpu/drm/amd/dal/include/adjustment_types.h +++ /dev/null @@ -1,420 +0,0 @@ -/* - * Copyright 2012-15 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: AMD - * - */ - -#ifndef __DAL_ADJUSTMENT_TYPES_H__ -#define __DAL_ADJUSTMENT_TYPES_H__ - -#include "dal_services.h" - -/* make sure to update this when updating adj_global_info_array */ -#define CURRENT_ADJUSTMENT_NUM 12 -#define MAX_ADJUSTMENT_NUM (ADJ_ID_END - ADJ_ID_BEGIN) -#define REGAMMA_VALUE 256 -#define REGAMMA_RANGE (REGAMMA_VALUE*3) -#define ADJUST_DIVIDER 100 -#define GAMUT_DIVIDER 10000 - - -enum adjustment_id { - - /*this useful type when i need to indicate unknown adjustment and code - look if not the specific type*/ - ADJ_ID_INVALID, - - ADJ_ID_CONTRAST, - ADJ_ID_BRIGHTNESS, - ADJ_ID_HUE, - ADJ_ID_SATURATION, - ADJ_ID_GAMMA_RAMP, - ADJ_ID_GAMMA_RAMP_REGAMMA_UPDATE, - ADJ_ID_TEMPERATURE, - ADJ_ID_NOMINAL_RANGE_RGB_LIMITED, - - ADJ_ID_LP_FILTER_DEFLICKER, - ADJ_ID_HP_FILTER_DEFLICKER, - ADJ_ID_SHARPNESS_GAIN, /*0 - 10*/ - - ADJ_ID_REDUCED_BLANKING, - ADJ_ID_COHERENT, - ADJ_ID_MULTIMEDIA_PASS_THROUGH, - - ADJ_ID_VERTICAL_POSITION, - ADJ_ID_HORIZONTA_LPOSITION, - ADJ_ID_VERTICAL_SIZE, - ADJ_ID_HORIZONTAL_SIZE, - ADJ_ID_VERTICAL_SYNC, - ADJ_ID_HORIZONTAL_SYNC, - ADJ_ID_OVERSCAN, - ADJ_ID_COMPOSITE_SYNC, - - ADJ_ID_BIT_DEPTH_REDUCTION,/*CWDDEDI_DISPLAY_ADJINFOTYPE_BITVECTOR*/ - ADJ_ID_UNDERSCAN,/*CWDDEDI_DISPLAY_ADJINFOTYPE_RANGE*/ - ADJ_ID_UNDERSCAN_TYPE,/*CWDDEDI_DISPLAY_ADJINFOTYPE_RANGE*/ - ADJ_ID_TEMPERATURE_SOURCE,/*CWDDEDI_DISPLAY_ADJINFOTYPE_BITVECTOR*/ - - ADJ_ID_OVERLAY_BRIGHTNESS, - ADJ_ID_OVERLAY_CONTRAST, - ADJ_ID_OVERLAY_SATURATION, - ADJ_ID_OVERLAY_HUE, - ADJ_ID_OVERLAY_GAMMA, - ADJ_ID_OVERLAY_ALPHA, - ADJ_ID_OVERLAY_ALPHA_PER_PIX, - ADJ_ID_OVERLAY_INV_GAMMA, - ADJ_ID_OVERLAY_TEMPERATURE,/*done ,but code is commented*/ - ADJ_ID_OVERLAY_NOMINAL_RANGE_RGB_LIMITED, - - - ADJ_ID_UNDERSCAN_TV_INTERNAL,/*internal usage only for HDMI*/ - /*custom TV modes*/ - ADJ_ID_DRIVER_REQUESTED_GAMMA,/*used to get current gamma*/ - ADJ_ID_GAMUT_SOURCE_GRPH,/*logical adjustment visible for DS and CDB*/ - ADJ_ID_GAMUT_SOURCE_OVL,/*logical adjustment visible for DS and CDB*/ - ADJ_ID_GAMUT_DESTINATION,/*logical adjustment visible for DS and CDB*/ - ADJ_ID_REGAMMA,/*logical adjustment visible for DS and CDB*/ - ADJ_ID_ITC_ENABLE,/*ITC flag enable by default*/ - ADJ_ID_CNC_CONTENT,/*display image content*/ - /*internal adjustment, in order to provide backward compatibility - gamut with color temperature*/ - - /* Backlight Adjustment Group*/ - ADJ_ID_BACKLIGHT, - ADJ_ID_BACKLIGHT_OPTIMIZATION, - - /* flag the first and last*/ - ADJ_ID_BEGIN = ADJ_ID_CONTRAST, - ADJ_ID_END = ADJ_ID_BACKLIGHT_OPTIMIZATION, -}; - -enum adjustment_data_type { - ADJ_RANGED, - ADJ_BITVECTOR, - ADJ_LUT /* not handled currently */ -}; - -union adjustment_property { - uint32_t u32all; - struct { - /*per mode adjustment*/ - uint32_t SAVED_WITHMODE:1; - /*per edid adjustment*/ - uint32_t SAVED_WITHEDID:1; - /*adjustment not visible to HWSS*/ - uint32_t CALCULATE:1; - /*explisit adjustment applied by HWSS*/ - uint32_t INC_IN_SET_MODE:1; - /*adjustment requires set mode to be applied*/ - uint32_t SETMODE_REQ:1; - /*adjustment is applied at the end of set mode*/ - uint32_t POST_SET:1; -/*when adjustment is applied its value should be stored -in place and not wait for flush call*/ - uint32_t SAVE_IN_PLACE:1; - /*adjustment is always apply*/ - uint32_t FORCE_SET:1; - /*this adjustment is specific to individual display path.*/ - uint32_t SAVED_WITH_DISPLAY_IDX:1; - uint32_t RESERVED_23:23; - } bits; -}; - -enum adjustment_state { - ADJUSTMENT_STATE_INVALID, - ADJUSTMENT_STATE_VALID, - ADJUSTMENT_STATE_REQUESTED, - ADJUSTMENT_STATE_COMMITTED_TO_HW, -}; - -/* AdjustmentInfo structure - it keeps either ranged data or discrete*/ -struct adjustment_info { - enum adjustment_data_type adj_data_type; - union adjustment_property adj_prop; - enum adjustment_state adj_state; - enum adjustment_id adj_id; - - union data { - struct ranged { - int32_t min; - int32_t max; - int32_t def; - int32_t step; - int32_t cur; - } ranged; - struct bit_vector { - int32_t system_supported; - int32_t current_supported; - int32_t default_val; - } bit_vector; - } adj_data; -}; - -/* adjustment category -this should be a MASK struct with the bitfileds!!! -since it could be crt and cv and dfp!!! -the only fit is for overlay!!!*/ -enum adjustment_category { - CAT_ALL, - CAT_CRT, - CAT_DFP, - CAT_LCD, - CAT_OVERLAY, - CAT_INVALID -}; - -enum raw_gamma_ramp_type { - GAMMA_RAMP_TYPE_UNINITIALIZED, - GAMMA_RAMP_TYPE_DEFAULT, - GAMMA_RAMP_TYPE_RGB256, - GAMMA_RAMP_TYPE_FIXED_POINT -}; - -struct raw_gamma_ramp_rgb { - uint32_t red; - uint32_t green; - uint32_t blue; -}; - -#define NUM_OF_RAW_GAMMA_RAMP_RGB_256 256 -struct raw_gamma_ramp { - enum raw_gamma_ramp_type type; - struct raw_gamma_ramp_rgb rgb_256[NUM_OF_RAW_GAMMA_RAMP_RGB_256]; - uint32_t size; -}; - -struct ds_underscan_info { - uint32_t default_width; - uint32_t default_height; - uint32_t max_width; - uint32_t max_height; - uint32_t min_width; - uint32_t min_height; - uint32_t h_step; - uint32_t v_step; - uint32_t default_x_pos; - uint32_t default_y_pos; -}; - -struct ds_overscan { - uint32_t left; - uint32_t right; - uint32_t top; - uint32_t bottom; -}; - -enum ds_color_space { - DS_COLOR_SPACE_UNKNOWN = 0, - DS_COLOR_SPACE_SRGB_FULLRANGE = 1, - DS_COLOR_SPACE_SRGB_LIMITEDRANGE, - DS_COLOR_SPACE_YPBPR601, - DS_COLOR_SPACE_YPBPR709, - DS_COLOR_SPACE_YCBCR601, - DS_COLOR_SPACE_YCBCR709, - DS_COLOR_SPACE_NMVPU_SUPERAA, - DS_COLOR_SPACE_YCBCR601_YONLY, - DS_COLOR_SPACE_YCBCR709_YONLY/*same as YCbCr, but Y in Full range*/ -}; - -enum ds_underscan_options { - DS_UNDERSCAN_OPTION_DEFAULT = 0, - DS_UNDERSCAN_OPTION_USECEA861D -}; - -enum dpms_state { - DPMS_NONE = 0, - DPMS_ON, - DPMS_OFF, -}; - -enum ds_gamut_reference { - DS_GAMUT_REFERENCE_DESTINATION = 0, - DS_GAMUT_REFERENCE_SOURCE, -}; - -enum ds_gamut_content { - DS_GAMUT_CONTENT_GRAPHICS = 0, - DS_GAMUT_CONTENT_VIDEO, -}; - -struct ds_gamut_reference_data { - enum ds_gamut_reference gamut_ref; - enum ds_gamut_content gamut_content; -}; - -union ds_custom_gamut_type { - uint32_t u32all; - struct { - uint32_t CUSTOM_WHITE_POINT:1; - uint32_t CUSTOM_GAMUT_SPACE:1; - uint32_t reserved:30; - } bits; -}; - -union ds_gamut_spaces { - uint32_t u32all; - struct { - uint32_t GAMUT_SPACE_CCIR709:1; - uint32_t GAMUT_SPACE_CCIR601:1; - uint32_t GAMUT_SPACE_ADOBERGB:1; - uint32_t GAMUT_SPACE_CIERGB:1; - uint32_t GAMUT_SPACE_CUSTOM:1; - uint32_t reserved:27; - } bits; -}; - -union ds_gamut_white_point { - uint32_t u32all; - struct { - uint32_t GAMUT_WHITE_POINT_5000:1; - uint32_t GAMUT_WHITE_POINT_6500:1; - uint32_t GAMUT_WHITE_POINT_7500:1; - uint32_t GAMUT_WHITE_POINT_9300:1; - uint32_t GAMUT_WHITE_POINT_CUSTOM:1; - uint32_t reserved:27; - } bits; -}; - -struct ds_gamut_space_coordinates { - int32_t red_x; - int32_t red_y; - int32_t green_x; - int32_t green_y; - int32_t blue_x; - int32_t blue_y; - -}; - -struct ds_white_point_coordinates { - int32_t white_x; - int32_t white_y; -}; - -struct ds_gamut_data { - union ds_custom_gamut_type feature; - union { - uint32_t predefined; - struct ds_white_point_coordinates custom; - - } white_point; - - union { - uint32_t predefined; - struct ds_gamut_space_coordinates custom; - - } gamut; -}; - -struct ds_set_gamut_data { - struct ds_gamut_reference_data ref; - struct ds_gamut_data gamut; - -}; - -struct ds_get_gamut_data { - struct ds_gamut_data gamut; -}; - -struct ds_gamut_info { -/*mask of supported predefined gamuts ,started from DI_GAMUT_SPACE_CCIR709 ...*/ - union ds_gamut_spaces gamut_space; -/*mask of supported predefined white points,started from DI_WHITE_POINT_5000K */ - union ds_gamut_white_point white_point; - -}; - -union ds_regamma_flags { - uint32_t u32all; - struct { - /*custom/user gamam array is in use*/ - uint32_t GAMMA_RAMP_ARRAY:1; - /*gamma from edid is in use*/ - uint32_t GAMMA_FROM_EDID:1; - /*gamma from edid is in use , but only for Display Id 1.2*/ - uint32_t GAMMA_FROM_EDID_EX:1; - /*user custom gamma is in use*/ - uint32_t GAMMA_FROM_USER:1; - /*coeff. A0-A3 from user is in use*/ - uint32_t COEFF_FROM_USER:1; - /*coeff. A0-A3 from edid is in use only for Display Id 1.2*/ - uint32_t COEFF_FROM_EDID:1; - /*which ROM to choose for graphics*/ - uint32_t GRAPHICS_DEGAMMA_SRGB:1; - /*which ROM to choose for video overlay*/ - uint32_t OVERLAY_DEGAMMA_SRGB:1; - /*apply degamma removal in driver*/ - uint32_t APPLY_DEGAMMA:1; - - uint32_t reserved:23; - } bits; -}; - -struct ds_regamma_ramp { - uint16_t gamma[256 * 3]; /* gamma ramp packed as RGB */ - -}; - -struct ds_regamma_coefficients_ex { - int32_t gamma[3];/*2400 use divider 1 000*/ - int32_t coeff_a0[3];/*31308 divider 10 000 000,0-red, 1-green, 2-blue*/ - int32_t coeff_a1[3];/*12920 use divider 1 000*/ - int32_t coeff_a2[3];/*55 use divider 1 000*/ - int32_t coeff_a3[3];/*55 use divider 1 000*/ -}; - -struct ds_regamma_lut { - union ds_regamma_flags flags; - union { - struct ds_regamma_ramp gamma; - struct ds_regamma_coefficients_ex coeff; - }; -}; - -enum ds_backlight_optimization { - DS_BACKLIGHT_OPTIMIZATION_DISABLE = 0, - DS_BACKLIGHT_OPTIMIZATION_DESKTOP, - DS_BACKLIGHT_OPTIMIZATION_DYNAMIC, - DS_BACKLIGHT_OPTIMIZATION_DIMMED -}; - -struct ds_adj_id_value { - enum adjustment_id adj_id; - enum adjustment_data_type adj_type; - union adjustment_property adj_prop; - int32_t value; -}; - -struct gamut_data { - union ds_custom_gamut_type option; - union { - union ds_gamut_white_point predefined; - struct ds_white_point_coordinates custom; - - } white_point; - - union { - union ds_gamut_spaces predefined; - struct ds_gamut_space_coordinates custom; - - } gamut; -}; -#endif /* __DAL_ADJUSTMENT_TYPES_H__ */ diff --git a/drivers/gpu/drm/amd/dal/include/hw_adjustment_types.h b/drivers/gpu/drm/amd/dal/include/hw_adjustment_types.h deleted file mode 100644 index cfae832..0000000 --- a/drivers/gpu/drm/amd/dal/include/hw_adjustment_types.h +++ /dev/null @@ -1,205 +0,0 @@ -#ifndef __DAL_HW_ADJUSTMENT_TYPES_H__ -#define __DAL_HW_ADJUSTMENT_TYPES_H__ - -#include "hw_sequencer_types.h" - -enum hw_adjustment_id { - HW_ADJUSTMENT_ID_COLOR_CONTROL, - HW_ADJUSTMENT_ID_GAMMA_LUT, - HW_ADJUSTMENT_ID_GAMMA_RAMP, - HW_ADJUSTMENT_ID_DEFLICKER, - HW_ADJUSTMENT_ID_SHARPNESS_CONTROL, - HW_ADJUSTMENT_ID_TIMING, - HW_ADJUSTMENT_ID_TIMING_AND_PIXEL_CLOCK, - HW_ADJUSTMENT_ID_OVERSCAN, - HW_ADJUSTMENT_ID_UNDERSCAN_TYPE, - HW_ADJUSTMENT_ID_VERTICAL_SYNC, - HW_ADJUSTMENT_ID_HORIZONTAL_SYNC, - HW_ADJUSTMENT_ID_COMPOSITE_SYNC, - HW_ADJUSTMENT_ID_VIDEO_STANDARD, - HW_ADJUSTMENT_ID_BACKLIGHT, - HW_ADJUSTMENT_ID_BIT_DEPTH_REDUCTION, - HW_ADJUSTMENT_ID_REDUCED_BLANKING, - HW_ADJUSTMENT_ID_COHERENT, - /* OVERLAY ADJUSTMENTS*/ - HW_ADJUSTMENT_ID_OVERLAY, - HW_ADJUSTMENT_ID_OVERLAY_ALPHA, - HW_ADJUSTMENT_ID_OVERLAY_VARIABLE_GAMMA, - HW_ADJUSTMENT_ID_COUNT, - HW_ADJUSTMENT_ID_UNDEFINED, -}; - -struct hw_adjustment_deflicker { - int32_t hp_factor; - uint32_t hp_divider; - int32_t lp_factor; - uint32_t lp_divider; - int32_t sharpness; - bool enable_sharpening; -}; - -struct hw_adjustment_value { - union { - uint32_t ui_value; - int32_t i_value; - }; -}; - -enum hw_color_adjust_option { - HWS_COLOR_MATRIX_HW_DEFAULT = 1, - HWS_COLOR_MATRIX_SW -}; - -enum { - HW_TEMPERATURE_MATRIX_SIZE = 9, - HW_TEMPERATURE_MATRIX_SIZE_WITH_OFFSET = 12 -}; - -struct hw_adjustment_color_control { - enum hw_color_space color_space; - enum hw_color_adjust_option option; - enum pixel_format surface_pixel_format; - enum dc_color_depth color_depth; - uint32_t lb_color_depth; - int32_t contrast; - int32_t saturation; - int32_t brightness; - int32_t hue; - uint32_t adjust_divider; - uint32_t temperature_divider; - uint32_t temperature_matrix[HW_TEMPERATURE_MATRIX_SIZE]; -}; - -struct hw_underscan_adjustment { - struct hw_adjustment_deflicker deflicker; - struct overscan_info hw_overscan; -}; - -struct hw_underscan_adjustment_data { - enum hw_adjustment_id hw_adj_id; - struct hw_underscan_adjustment hw_underscan_adj; -}; - -union hw_adjustment_bit_depth_reduction { - uint32_t raw; - struct { - uint32_t TRUNCATE_ENABLED:1; - uint32_t TRUNCATE_DEPTH:2; - uint32_t TRUNCATE_MODE:1; - uint32_t SPATIAL_DITHER_ENABLED:1; - uint32_t SPATIAL_DITHER_DEPTH:2; - uint32_t SPATIAL_DITHER_MODE:2; - uint32_t RGB_RANDOM:1; - uint32_t FRAME_RANDOM:1; - uint32_t HIGHPASS_RANDOM:1; - uint32_t FRAME_MODULATION_ENABLED:1; - uint32_t FRAME_MODULATION_DEPTH:2; - uint32_t TEMPORAL_LEVEL:1; - uint32_t FRC_25:2; - uint32_t FRC_50:2; - uint32_t FRC_75:2; - } bits; -}; - -struct hw_color_control_range { - struct hw_adjustment_range contrast; - struct hw_adjustment_range saturation; - struct hw_adjustment_range brightness; - struct hw_adjustment_range hue; - struct hw_adjustment_range temperature; -}; - -enum hw_surface_type { - HW_OVERLAY_SURFACE = 1, - HW_GRAPHIC_SURFACE -}; - -/* LUT type for GammaCorrection */ -struct hw_gamma_lut { - uint32_t red; - uint32_t green; - uint32_t blue; -}; - -struct hw_devc_lut { - uint8_t red; - uint8_t green; - uint8_t blue; - uint8_t reserved; -}; - -struct hw_adjustment_gamma_lut { - struct hw_gamma_lut *pGammaLut; - uint32_t size_in_elements; - enum pixel_format surface_pixel_format; -}; - - -enum hw_gamma_ramp_type { - HW_GAMMA_RAMP_UNITIALIZED = 0, - HW_GAMMA_RAMP_DEFAULT, - HW_GAMMA_RAMP_RBG_256x3x16, - HW_GAMMA_RAMP_RBG_DXGI_1 -}; - -#define HW_GAMMA_RAMP_RBG_256 256 - -struct hw_gamma_ramp_rgb256x3x16 { - unsigned short red[HW_GAMMA_RAMP_RBG_256]; - unsigned short green[HW_GAMMA_RAMP_RBG_256]; - unsigned short blue[HW_GAMMA_RAMP_RBG_256]; -}; - -union hw_gamma_flags { - uint32_t raw; - struct { - uint32_t gamma_ramp_array :1; - uint32_t graphics_degamma_srgb :1; - uint32_t overlay_degamma_srgb :1; - uint32_t apply_degamma :1; - uint32_t reserved :28; - } bits; -}; - -struct hw_regamma_coefficients { - int32_t gamma[3]; - int32_t a0[3]; - int32_t a1[3]; - int32_t a2[3]; - int32_t a3[3]; -}; - -struct hw_regamma_ramp { - /* Gamma ramp packed as RGB */ - unsigned short gamma[256 * 3]; -}; - -struct hw_regamma_lut { - union hw_gamma_flags flags; - union { - struct hw_regamma_ramp gamma; - struct hw_regamma_coefficients coeff; - }; -}; - -union hw_gamma_flag { - uint32_t uint; - struct { - uint32_t config_is_changed :1; - uint32_t regamma_update :1; - uint32_t gamma_update :1; - uint32_t reserved :29; - } bits; -}; - -struct hw_adjustment_gamma_ramp { - uint32_t size; - enum hw_gamma_ramp_type type; - enum pixel_format surface_pixel_format; - enum hw_color_space color_space; - struct hw_regamma_lut regamma; - union hw_gamma_flag flag; - struct hw_gamma_ramp_rgb256x3x16 gamma_ramp_rgb256x3x16; -}; - -#endif diff --git a/drivers/gpu/drm/amd/dal/include/set_mode_types.h b/drivers/gpu/drm/amd/dal/include/set_mode_types.h index 3647815..a7d8119 100644 --- a/drivers/gpu/drm/amd/dal/include/set_mode_types.h +++ b/drivers/gpu/drm/amd/dal/include/set_mode_types.h @@ -26,21 +26,9 @@ #ifndef __DAL_SET_MODE_TYPES_H__ #define __DAL_SET_MODE_TYPES_H__ -#include "adjustment_types.h" -#include "hw_adjustment_types.h" #include "include/plane_types.h" #include "dc_types.h" -/* Forward declaration */ -struct dc_mode_timing; -struct display_path; - -/* State of stereo 3D for workstation */ -enum ws_stereo_state { - WS_STEREO_STATE_INACTIVE = 0, - WS_STEREO_STATE_ACTIVE, - WS_STEREO_STATE_ACTIVE_MASTER -}; /* GTC group number */ enum gtc_group { @@ -54,26 +42,6 @@ enum gtc_group { GTC_GROUP_MAX }; -/* Adjustment action*/ -enum adjustment_action { - ADJUSTMENT_ACTION_UNDEFINED = 0, - ADJUSTMENT_ACTION_VALIDATE, - ADJUSTMENT_ACTION_SET_ADJUSTMENT -}; - -/* Type of adjustment parameters*/ -enum adjustment_par_type { - ADJUSTMENT_PAR_TYPE_NONE = 0, - ADJUSTMENT_PAR_TYPE_TIMING, - ADJUSTMENT_PAR_TYPE_MODE -}; - -/* Method of validation */ -enum validation_method { - VALIDATION_METHOD_STATIC = 0, - VALIDATION_METHOD_DYNAMIC -}; - /* Info frame packet status */ enum info_frame_flag { INFO_PACKET_PACKET_INVALID = 0, @@ -103,102 +71,6 @@ enum info_frame_size { INFO_FRAME_SIZE_AUDIO = 10 }; -/* Active format */ -enum active_format_info { - ACTIVE_FORMAT_NO_DATA = 0, - ACTIVE_FORMAT_VALID = 1 -}; -/* Bar info */ -enum bar_info { - BAR_INFO_NOT_VALID = 0, - BAR_INFO_VERTICAL_VALID = 1, - BAR_INFO_HORIZONTAL_VALID = 2, - BAR_INFO_BOTH_VALID = 3 -}; - -/* Picture scaling */ -enum picture_scaling { - PICTURE_SCALING_UNIFORM = 0, - PICTURE_SCALING_HORIZONTAL = 1, - PICTURE_SCALING_VERTICAL = 2, - PICTURE_SCALING_BOTH = 3 -}; - -/* Colorimetry */ -enum colorimetry { - COLORIMETRY_NO_DATA = 0, - COLORIMETRY_ITU601 = 1, - COLORIMETRY_ITU709 = 2, - COLORIMETRY_EXTENDED = 3 -}; - -/* ColorimetryEx */ -enum colorimetry_ex { - COLORIMETRY_EX_XVYCC601 = 0, - COLORIMETRY_EX_XVYCC709 = 1, - COLORIMETRY_EX_SYCC601 = 2, - COLORIMETRY_EX_ADOBEYCC601 = 3, - COLORIMETRY_EX_ADOBERGB = 4, - COLORIMETRY_EX_RESERVED5 = 5, - COLORIMETRY_EX_RESERVED6 = 6, - COLORIMETRY_EX_RESERVED7 = 7 -}; - -/* Active format aspect ratio */ -enum active_format_aspect_ratio { - ACTIVE_FORMAT_ASPECT_RATIO_SAME_AS_PICTURE = 8, - ACTIVE_FORMAT_ASPECT_RATIO_4_3 = 9, - ACTIVE_FORMAT_ASPECT_RATIO_16_9 = 0XA, - ACTIVE_FORMAT_ASPECT_RATIO_14_9 = 0XB -}; - -/* RGB quantization range */ -enum rgb_quantization_range { - RGB_QUANTIZATION_DEFAULT_RANGE = 0, - RGB_QUANTIZATION_LIMITED_RANGE = 1, - RGB_QUANTIZATION_FULL_RANGE = 2, - RGB_QUANTIZATION_RESERVED = 3 -}; - -/* YYC quantization range */ -enum yyc_quantization_range { - YYC_QUANTIZATION_LIMITED_RANGE = 0, - YYC_QUANTIZATION_FULL_RANGE = 1, - YYC_QUANTIZATION_RESERVED2 = 2, - YYC_QUANTIZATION_RESERVED3 = 3 -}; - -/* Rotation capability */ -struct rotation_capability { - bool ROTATION_ANGLE_0_CAP:1; - bool ROTATION_ANGLE_90_CAP:1; - bool ROTATION_ANGLE_180_CAP:1; - bool ROTATION_ANGLE_270_CAP:1; -}; - -/* Underscan position and size */ -struct ds_underscan_desc { - uint32_t x; - uint32_t y; - uint32_t width; - uint32_t height; -}; - -/* View, timing and other mode related information */ -struct path_mode { - struct view view; - struct rect_position view_position; - enum view_3d_format view_3d_format; - const struct dc_mode_timing *mode_timing; - enum scaling_transformation scaling; - enum pixel_format pixel_format; - uint32_t display_path_index; - enum tiling_mode tiling_mode; - enum dc_rotation_angle rotation_angle; - bool is_tiling_rotated; - struct rotation_capability rotation_capability; -}; - struct hdmi_info_frame_header { uint8_t info_frame_type; uint8_t version; @@ -207,6 +79,7 @@ struct hdmi_info_frame_header { #pragma pack(push) #pragma pack(1) + struct info_packet_raw_data { uint8_t hb0; uint8_t hb1; @@ -264,21 +137,6 @@ struct info_frame { }; -/* Adjustment parameter */ -struct adjustment_parameters { - enum adjustment_par_type type; - struct { - enum adjustment_id ajd_id; - enum hw_adjustment_id adj_id_hw; - } timings; -}; - -/* Parameters for adjustments*/ -struct adjustment_params { - enum adjustment_action action; - struct adjustment_parameters params; - const struct display_path *affected_path; -}; #pragma pack(pop) -- 2.7.4