From d5cfe6c222d46b7bec5153c86657e0bde6de3efc Mon Sep 17 00:00:00 2001 From: Jordan Lazare Date: Thu, 21 Jan 2016 16:31:43 -0500 Subject: [PATCH 0720/1110] drm/amd/dal: Clean up unused TG types, move to dc/inc Signed-off-by: Jordan Lazare Acked-by: Harry Wentland --- drivers/gpu/drm/amd/dal/dc/core/dc.c | 1 - .../gpu/drm/amd/dal/dc/dce110/dce110_resource.c | 2 +- .../amd/dal/dc/dce110/dce110_timing_generator.c | 13 +- .../amd/dal/dc/dce110/dce110_timing_generator.h | 2 +- .../drm/amd/dal/dc/inc/timing_generator_types.h | 155 +++++++++++++++++ .../gpu/drm/amd/dal/include/hw_sequencer_types.h | 4 +- .../amd/dal/include/timing_generator_interface.h | 30 ---- .../drm/amd/dal/include/timing_generator_types.h | 190 --------------------- 8 files changed, 160 insertions(+), 237 deletions(-) create mode 100644 drivers/gpu/drm/amd/dal/dc/inc/timing_generator_types.h delete mode 100644 drivers/gpu/drm/amd/dal/include/timing_generator_interface.h delete mode 100644 drivers/gpu/drm/amd/dal/include/timing_generator_types.h diff --git a/drivers/gpu/drm/amd/dal/dc/core/dc.c b/drivers/gpu/drm/amd/dal/dc/core/dc.c index 71df979..0664af2 100644 --- a/drivers/gpu/drm/amd/dal/dc/core/dc.c +++ b/drivers/gpu/drm/amd/dal/dc/core/dc.c @@ -36,7 +36,6 @@ #include "clock_source_interface.h" #include "dc_bios_types.h" -#include "include/irq_service_interface.h" #include "bandwidth_calcs.h" #include "include/irq_service_interface.h" #include "inc/transform.h" diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c index 823926c..d2970f8 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_resource.c @@ -29,8 +29,8 @@ #include "resource.h" #include "include/irq_service_interface.h" -#include "include/timing_generator_interface.h" #include "../virtual/virtual_stream_encoder.h" +#include "inc/timing_generator_types.h" #include "dce110/dce110_timing_generator.h" #include "dce110/dce110_link_encoder.h" diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c index 5dc3605..1bb89d8 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.c @@ -35,7 +35,7 @@ #include "include/grph_object_id.h" #include "include/adapter_service_interface.h" #include "include/logger_interface.h" -#include "include/timing_generator_types.h" +#include "inc/timing_generator_types.h" #include "dce110_timing_generator.h" enum black_color_format { @@ -582,17 +582,6 @@ bool dce110_timing_generator_program_timing_generator( /* Enable stereo - only when we need to pack 3D frame. Other types * of stereo handled in explicit call */ - /* TODOSTEREO - if (hw_crtc_timing->flags.PACK_3D_FRAME) { - struct crtc_stereo_parameters stereo_params = { false }; - stereo_params.PROGRAM_STEREO = true; - stereo_params.PROGRAM_POLARITY = true; - stereo_params.FRAME_PACKED = true; - stereo_params.RIGHT_EYE_POLARITY = - hw_crtc_timing->flags.RIGHT_EYE_3D_POLARITY; - tg->funcs->enable_stereo(tg, &stereo_params); - }*/ - return result == BP_RESULT_OK; } diff --git a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h index e6aaacc..0ef4708 100644 --- a/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h +++ b/drivers/gpu/drm/amd/dal/dc/dce110/dce110_timing_generator.h @@ -27,7 +27,7 @@ #define __DC_TIMING_GENERATOR_DCE110_H__ -#include "../include/timing_generator_types.h" +#include "inc/timing_generator_types.h" #include "../include/grph_object_id.h" /* overscan in blank for YUV color space. For RGB, it is zero for black. */ diff --git a/drivers/gpu/drm/amd/dal/dc/inc/timing_generator_types.h b/drivers/gpu/drm/amd/dal/dc/inc/timing_generator_types.h new file mode 100644 index 0000000..e9ca169 --- /dev/null +++ b/drivers/gpu/drm/amd/dal/dc/inc/timing_generator_types.h @@ -0,0 +1,155 @@ +/* + * Copyright 2012-15 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: AMD + * + */ + +#ifndef __DAL_TIMING_GENERATOR_TYPES_H__ +#define __DAL_TIMING_GENERATOR_TYPES_H__ + +#include "include/grph_csc_types.h" + +struct dc_bios; + +/** + * These parameters are required as input when doing blanking/Unblanking +*/ +struct crtc_black_color { + uint32_t black_color_r_cr; + uint32_t black_color_g_y; + uint32_t black_color_b_cb; +}; + +/* Contains CRTC vertical/horizontal pixel counters */ +struct crtc_position { + uint32_t vertical_count; + uint32_t horizontal_count; + uint32_t nominal_vcount; +}; + + +enum dcp_gsl_purpose { + DCP_GSL_PURPOSE_SURFACE_FLIP = 0, + DCP_GSL_PURPOSE_STEREO3D_PHASE, + DCP_GSL_PURPOSE_UNDEFINED +}; + +struct dcp_gsl_params { + enum sync_source gsl_group; + enum dcp_gsl_purpose gsl_purpose; + bool timing_server; + bool overlay_present; + bool gsl_paused; +}; + +#define LEFT_EYE_3D_PRIMARY_SURFACE 1 +#define RIGHT_EYE_3D_PRIMARY_SURFACE 0 + +enum test_pattern_dyn_range { + TEST_PATTERN_DYN_RANGE_VESA = 0, + TEST_PATTERN_DYN_RANGE_CEA +}; + +enum test_pattern_mode { + TEST_PATTERN_MODE_COLORSQUARES_RGB = 0, + TEST_PATTERN_MODE_COLORSQUARES_YCBCR601, + TEST_PATTERN_MODE_COLORSQUARES_YCBCR709, + TEST_PATTERN_MODE_VERTICALBARS, + TEST_PATTERN_MODE_HORIZONTALBARS, + TEST_PATTERN_MODE_SINGLERAMP_RGB, + TEST_PATTERN_MODE_DUALRAMP_RGB +}; + +enum test_pattern_color_format { + TEST_PATTERN_COLOR_FORMAT_BPC_6 = 0, + TEST_PATTERN_COLOR_FORMAT_BPC_8, + TEST_PATTERN_COLOR_FORMAT_BPC_10, + TEST_PATTERN_COLOR_FORMAT_BPC_12 +}; + +enum controller_dp_test_pattern { + CONTROLLER_DP_TEST_PATTERN_D102 = 0, + CONTROLLER_DP_TEST_PATTERN_SYMBOLERROR, + CONTROLLER_DP_TEST_PATTERN_PRBS7, + CONTROLLER_DP_TEST_PATTERN_COLORSQUARES, + CONTROLLER_DP_TEST_PATTERN_VERTICALBARS, + CONTROLLER_DP_TEST_PATTERN_HORIZONTALBARS, + CONTROLLER_DP_TEST_PATTERN_COLORRAMP, + CONTROLLER_DP_TEST_PATTERN_VIDEOMODE, + CONTROLLER_DP_TEST_PATTERN_RESERVED_8, + CONTROLLER_DP_TEST_PATTERN_RESERVED_9, + CONTROLLER_DP_TEST_PATTERN_RESERVED_A, + CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA +}; + +enum crtc_state { + CRTC_STATE_VBLANK = 0, + CRTC_STATE_VACTIVE +}; + +struct timing_generator { + struct timing_generator_funcs *funcs; + struct dc_bios *bp; + struct dc_context *ctx; +}; + + +struct dc_crtc_timing; + +struct timing_generator_funcs { + bool (*validate_timing)(struct timing_generator *tg, + const struct dc_crtc_timing *timing); + void (*program_timing)(struct timing_generator *tg, + const struct dc_crtc_timing *timing, + bool use_vbios); + bool (*enable_crtc)(struct timing_generator *tg); + bool (*disable_crtc)(struct timing_generator *tg); + bool (*is_counter_moving)(struct timing_generator *tg); + void (*get_position)(struct timing_generator *tg, + int32_t *h_position, + int32_t *v_position); + uint32_t (*get_frame_count)(struct timing_generator *tg); + void (*set_early_control)(struct timing_generator *tg, + uint32_t early_cntl); + void (*wait_for_state)(struct timing_generator *tg, + enum crtc_state state); + bool (*set_blank)(struct timing_generator *tg, + bool enable_blanking); + void (*set_overscan_blank_color) (struct timing_generator *tg, enum color_space black_color); + void (*set_blank_color)(struct timing_generator *tg, enum color_space black_color); + void (*set_colors)(struct timing_generator *tg, + const struct crtc_black_color *blank_color, + const struct crtc_black_color *overscan_color); + + void (*disable_vga)(struct timing_generator *tg); + bool (*did_triggered_reset_occur)(struct timing_generator *tg); + void (*setup_global_swap_lock)(struct timing_generator *tg, + const struct dcp_gsl_params *gsl_params); + void (*enable_reset_trigger)(struct timing_generator *tg, + const struct trigger_params *trigger_params); + void (*disable_reset_trigger)(struct timing_generator *tg); + void (*tear_down_global_swap_lock)(struct timing_generator *tg); + void (*enable_advanced_request)(struct timing_generator *tg, + bool enable, const struct dc_crtc_timing *timing); +}; + +#endif diff --git a/drivers/gpu/drm/amd/dal/include/hw_sequencer_types.h b/drivers/gpu/drm/amd/dal/include/hw_sequencer_types.h index d5d7059..e9e1124 100644 --- a/drivers/gpu/drm/amd/dal/include/hw_sequencer_types.h +++ b/drivers/gpu/drm/amd/dal/include/hw_sequencer_types.h @@ -74,8 +74,8 @@ enum hw_timing_standard { HW_TIMING_STANDARD_EXPLICIT }; -/* identical to struct crtc_ranged_timing_control - * defined in controller\timing_generator_types.h */ +/* TODO: identical to struct crtc_ranged_timing_control + * defined in inc\timing_generator_types.h */ struct hw_ranged_timing_control { /* set to 1 to force dynamic counter V_COUNT * to lock to constant rate counter V_COUNT_NOM diff --git a/drivers/gpu/drm/amd/dal/include/timing_generator_interface.h b/drivers/gpu/drm/amd/dal/include/timing_generator_interface.h deleted file mode 100644 index 32d545d..0000000 --- a/drivers/gpu/drm/amd/dal/include/timing_generator_interface.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright 2012-15 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: AMD - * - */ - -#ifndef __DAL_TIMING_GENERATOR_INTERFACE_H__ -#define __DAL_TIMING_GENERATOR_INTERFACE_H__ -#include "timing_generator_types.h" - -#endif /* AMD_DAL_DEV_INCLUDE_TIMING_GENERATOR_INTERFACE_H_ */ diff --git a/drivers/gpu/drm/amd/dal/include/timing_generator_types.h b/drivers/gpu/drm/amd/dal/include/timing_generator_types.h deleted file mode 100644 index 75dfbab..0000000 --- a/drivers/gpu/drm/amd/dal/include/timing_generator_types.h +++ /dev/null @@ -1,190 +0,0 @@ -/* - * Copyright 2012-15 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: AMD - * - */ - -#ifndef __DAL_TIMING_GENERATOR_TYPES_H__ -#define __DAL_TIMING_GENERATOR_TYPES_H__ - -#include "include/grph_csc_types.h" - -struct dc_bios; - -/** - * These parameters are required as input when doing blanking/Unblanking -*/ -struct crtc_black_color { - uint32_t black_color_r_cr; - uint32_t black_color_g_y; - uint32_t black_color_b_cb; -}; - -/* Contains CRTC vertical/horizontal pixel counters */ -struct crtc_position { - uint32_t vertical_count; - uint32_t horizontal_count; - uint32_t nominal_vcount; -}; - -/* - * Parameters to enable/disable stereo 3D mode on CRTC - * - rightEyePolarity: if true, '0' means left eye image and '1' means right - * eye image. - * if false, '0' means right eye image and '1' means left eye image - * - framePacked: true when HDMI 1.4a FramePacking 3D format - * enabled/disabled - */ -struct crtc_stereo_parameters { - uint8_t PROGRAM_STEREO:1; - uint8_t PROGRAM_POLARITY:1; - uint8_t RIGHT_EYE_POLARITY:1; - uint8_t FRAME_PACKED:1; -}; - -struct crtc_stereo_status { - uint8_t ENABLED:1; - uint8_t CURRENT_FRAME_IS_RIGHT_EYE:1; - uint8_t CURRENT_FRAME_IS_ODD_FIELD:1; - uint8_t FRAME_PACKED:1; - uint8_t PENDING_RESET:1; -}; - -enum dcp_gsl_purpose { - DCP_GSL_PURPOSE_SURFACE_FLIP = 0, - DCP_GSL_PURPOSE_STEREO3D_PHASE, - DCP_GSL_PURPOSE_UNDEFINED -}; - -struct dcp_gsl_params { - enum sync_source gsl_group; - enum dcp_gsl_purpose gsl_purpose; - bool timing_server; - bool overlay_present; - bool gsl_paused; -}; - -struct vbi_end_signal_setup { - uint32_t minimum_interval_in_us; /* microseconds */ - uint32_t pixel_clock; /* in KHz */ - bool scaler_enabled; - bool interlace; - uint32_t src_height; - uint32_t overscan_top; - uint32_t overscan_bottom; - uint32_t v_total; - uint32_t v_addressable; - uint32_t h_total; -}; - -#define LEFT_EYE_3D_PRIMARY_SURFACE 1 -#define RIGHT_EYE_3D_PRIMARY_SURFACE 0 - -enum test_pattern_dyn_range { - TEST_PATTERN_DYN_RANGE_VESA = 0, - TEST_PATTERN_DYN_RANGE_CEA -}; - -enum test_pattern_mode { - TEST_PATTERN_MODE_COLORSQUARES_RGB = 0, - TEST_PATTERN_MODE_COLORSQUARES_YCBCR601, - TEST_PATTERN_MODE_COLORSQUARES_YCBCR709, - TEST_PATTERN_MODE_VERTICALBARS, - TEST_PATTERN_MODE_HORIZONTALBARS, - TEST_PATTERN_MODE_SINGLERAMP_RGB, - TEST_PATTERN_MODE_DUALRAMP_RGB -}; - -enum test_pattern_color_format { - TEST_PATTERN_COLOR_FORMAT_BPC_6 = 0, - TEST_PATTERN_COLOR_FORMAT_BPC_8, - TEST_PATTERN_COLOR_FORMAT_BPC_10, - TEST_PATTERN_COLOR_FORMAT_BPC_12 -}; - -enum controller_dp_test_pattern { - CONTROLLER_DP_TEST_PATTERN_D102 = 0, - CONTROLLER_DP_TEST_PATTERN_SYMBOLERROR, - CONTROLLER_DP_TEST_PATTERN_PRBS7, - CONTROLLER_DP_TEST_PATTERN_COLORSQUARES, - CONTROLLER_DP_TEST_PATTERN_VERTICALBARS, - CONTROLLER_DP_TEST_PATTERN_HORIZONTALBARS, - CONTROLLER_DP_TEST_PATTERN_COLORRAMP, - CONTROLLER_DP_TEST_PATTERN_VIDEOMODE, - CONTROLLER_DP_TEST_PATTERN_RESERVED_8, - CONTROLLER_DP_TEST_PATTERN_RESERVED_9, - CONTROLLER_DP_TEST_PATTERN_RESERVED_A, - CONTROLLER_DP_TEST_PATTERN_COLORSQUARES_CEA -}; - -enum crtc_state { - CRTC_STATE_VBLANK = 0, - CRTC_STATE_VACTIVE -}; - -struct timing_generator { - struct timing_generator_funcs *funcs; - struct dc_bios *bp; - struct dc_context *ctx; -}; - - -struct dc_crtc_timing; - -struct timing_generator_funcs { - bool (*validate_timing)(struct timing_generator *tg, - const struct dc_crtc_timing *timing); - void (*program_timing)(struct timing_generator *tg, - const struct dc_crtc_timing *timing, - bool use_vbios); - bool (*enable_crtc)(struct timing_generator *tg); - bool (*disable_crtc)(struct timing_generator *tg); - bool (*is_counter_moving)(struct timing_generator *tg); - void (*get_position)(struct timing_generator *tg, - int32_t *h_position, - int32_t *v_position); - uint32_t (*get_frame_count)(struct timing_generator *tg); - void (*set_early_control)(struct timing_generator *tg, - uint32_t early_cntl); - void (*wait_for_state)(struct timing_generator *tg, - enum crtc_state state); - bool (*set_blank)(struct timing_generator *tg, - bool enable_blanking); - void (*set_overscan_blank_color) (struct timing_generator *tg, enum color_space black_color); - void (*set_blank_color)(struct timing_generator *tg, enum color_space black_color); - void (*set_colors)(struct timing_generator *tg, - const struct crtc_black_color *blank_color, - const struct crtc_black_color *overscan_color); - - void (*disable_vga)(struct timing_generator *tg); - bool (*did_triggered_reset_occur)(struct timing_generator *tg); - void (*setup_global_swap_lock)(struct timing_generator *tg, - const struct dcp_gsl_params *gsl_params); - void (*enable_reset_trigger)(struct timing_generator *tg, - const struct trigger_params *trigger_params); - void (*disable_reset_trigger)(struct timing_generator *tg); - void (*tear_down_global_swap_lock)(struct timing_generator *tg); - void (*enable_advanced_request)(struct timing_generator *tg, - bool enable, const struct dc_crtc_timing *timing); -}; - -#endif -- 2.7.4