From bdbf80d471e3752b2a725f52e81531a1ddddadf4 Mon Sep 17 00:00:00 2001 From: Tom St Denis Date: Wed, 23 Mar 2016 13:16:13 -0400 Subject: [PATCH 0456/1110] drm/amd/amdgpu: Enable clockgating for UVD5 on Tonga This patch enables clock gating for the UVD5 block with Tonga. Signed-off-by: Tom St Denis Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/vi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index a145556..5c39470 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c @@ -1081,7 +1081,7 @@ static int vi_common_early_init(void *handle) adev->external_rev_id = adev->rev_id + 0x3c; break; case CHIP_TONGA: - adev->cg_flags = 0; + adev->cg_flags = AMD_CG_SUPPORT_UVD_MGCG; adev->pg_flags = 0; adev->external_rev_id = adev->rev_id + 0x14; break; -- 2.7.4