diff options
Diffstat (limited to 'meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1661-drm-amdgpu-Program-HIQ-field-of-RLC_CP_SCHEDULER.patch')
-rw-r--r-- | meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1661-drm-amdgpu-Program-HIQ-field-of-RLC_CP_SCHEDULER.patch | 75 |
1 files changed, 0 insertions, 75 deletions
diff --git a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1661-drm-amdgpu-Program-HIQ-field-of-RLC_CP_SCHEDULER.patch b/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1661-drm-amdgpu-Program-HIQ-field-of-RLC_CP_SCHEDULER.patch deleted file mode 100644 index e0fa17c1..00000000 --- a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1661-drm-amdgpu-Program-HIQ-field-of-RLC_CP_SCHEDULER.patch +++ /dev/null @@ -1,75 +0,0 @@ -From 2fbaa0e796d3a9f00222fc19bd25294f2bda3bb1 Mon Sep 17 00:00:00 2001 -From: shaoyunl <Shaoyun.Liu@amd.com> -Date: Fri, 8 Jul 2016 17:29:51 -0400 -Subject: [PATCH 1661/4131] drm/amdgpu: Program HIQ field of RLC_CP_SCHEDULER - -RLC need to get HIQ mapping form RLC_CP_SCHEDULER register. - -HIQ is set during KFD driver initialize period with VMID set to 0, other -queue will load to HQD with none-zero vmid. - -Change-Id: I9a2bdab25609bf86ac622b6b9b0b9771a2db3a70 -Signed-off-by: shaoyunl <Shaoyun.Liu@amd.com> - -Conflicts: - drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c ---- - drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c | 15 +++++++++++++++ - drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 15 +++++++++++++++ - 2 files changed, 30 insertions(+) - -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c -index 3a17429..d92dce7 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c -@@ -381,6 +381,21 @@ static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, - - acquire_queue(kgd, pipe_id, queue_id); - -+ /* HIQ is set during driver init period with vmid set to 0*/ -+ if (m->cp_hqd_vmid == 0) { -+ uint32_t value, mec, pipe; -+ -+ mec = (++pipe_id / VI_PIPE_PER_MEC) + 1; -+ pipe = (pipe_id % VI_PIPE_PER_MEC); -+ -+ pr_debug("kfd: set HIQ, mec:%d, pipe:%d, queue:%d.\n", -+ mec, pipe, queue_id); -+ value = RREG32(mmRLC_CP_SCHEDULERS); -+ value = REG_SET_FIELD(value, RLC_CP_SCHEDULERS, scheduler1, -+ ((mec << 5) | (pipe << 3) | queue_id | 0x80)); -+ WREG32(mmRLC_CP_SCHEDULERS, value); -+ } -+ - /* HQD registers extend from CP_MQD_BASE_ADDR to CP_HQD_EOP_WPTR_MEM. */ - mqd_hqd = &m->cp_mqd_base_addr_lo; - -diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c -index c109244..796dc44 100644 ---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c -+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c -@@ -486,6 +486,21 @@ static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id, - - acquire_queue(kgd, pipe_id, queue_id); - -+ /* HIQ is set during driver init period with vmid set to 0*/ -+ if (m->cp_hqd_vmid == 0) { -+ uint32_t value, mec, pipe; -+ -+ mec = (++pipe_id / V9_PIPE_PER_MEC) + 1; -+ pipe = (pipe_id % V9_PIPE_PER_MEC); -+ -+ pr_debug("kfd: set HIQ, mec:%d, pipe:%d, queue:%d.\n", -+ mec, pipe, queue_id); -+ value = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS)); -+ value = REG_SET_FIELD(value, RLC_CP_SCHEDULERS, scheduler1, -+ ((mec << 5) | (pipe << 3) | queue_id | 0x80)); -+ WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_CP_SCHEDULERS), value); -+ } -+ - /* HQD registers extend from CP_MQD_BASE_ADDR to CP_HQD_EOP_WPTR_MEM. */ - mqd_hqd = &m->cp_mqd_base_addr_lo; - hqd_base = SOC15_REG_OFFSET(GC, 0, mmCP_MQD_BASE_ADDR); --- -2.7.4 - |