aboutsummaryrefslogtreecommitdiffstats
path: root/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1042-drm-amd-powerplay-get-raven-sclk-and-mclk-levels.patch
diff options
context:
space:
mode:
Diffstat (limited to 'meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1042-drm-amd-powerplay-get-raven-sclk-and-mclk-levels.patch')
-rw-r--r--meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1042-drm-amd-powerplay-get-raven-sclk-and-mclk-levels.patch75
1 files changed, 0 insertions, 75 deletions
diff --git a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1042-drm-amd-powerplay-get-raven-sclk-and-mclk-levels.patch b/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1042-drm-amd-powerplay-get-raven-sclk-and-mclk-levels.patch
deleted file mode 100644
index 43cd603a..00000000
--- a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/1042-drm-amd-powerplay-get-raven-sclk-and-mclk-levels.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-From 2e122a6a579276073b72c1c3bcf5b07213145ca9 Mon Sep 17 00:00:00 2001
-From: Evan Quan <evan.quan@amd.com>
-Date: Tue, 26 Sep 2017 11:51:58 +0800
-Subject: [PATCH 1042/4131] drm/amd/powerplay: get raven sclk and mclk levels
-
-Change-Id: I40fa698cd9a25df43aa4bf476c4aa0a8b043edf9
-Signed-off-by: Evan Quan <evan.quan@amd.com>
-Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
----
- drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c | 48 +++++++++++++++++++++++++-
- 1 file changed, 47 insertions(+), 1 deletion(-)
-
-diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
-index 9ece560..4976bd3 100644
---- a/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
-+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/rv_hwmgr.c
-@@ -699,7 +699,53 @@ static int rv_force_clock_level(struct pp_hwmgr *hwmgr,
- static int rv_print_clock_levels(struct pp_hwmgr *hwmgr,
- enum pp_clock_type type, char *buf)
- {
-- return 0;
-+ struct rv_hwmgr *data = (struct rv_hwmgr *)(hwmgr->backend);
-+ struct rv_voltage_dependency_table *mclk_table =
-+ data->clock_vol_info.vdd_dep_on_fclk;
-+ int i, now, size = 0;
-+
-+ switch (type) {
-+ case PP_SCLK:
-+ PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr->smumgr,
-+ PPSMC_MSG_GetGfxclkFrequency),
-+ "Attempt to get current GFXCLK Failed!",
-+ return -1);
-+ PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr->smumgr,
-+ &now),
-+ "Attempt to get current GFXCLK Failed!",
-+ return -1);
-+
-+ size += sprintf(buf + size, "0: %uMhz %s\n",
-+ data->gfx_min_freq_limit / 100,
-+ ((data->gfx_min_freq_limit / 100)
-+ == now) ? "*" : "");
-+ size += sprintf(buf + size, "1: %uMhz %s\n",
-+ data->gfx_max_freq_limit / 100,
-+ ((data->gfx_max_freq_limit / 100)
-+ == now) ? "*" : "");
-+ break;
-+ case PP_MCLK:
-+ PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr->smumgr,
-+ PPSMC_MSG_GetFclkFrequency),
-+ "Attempt to get current MEMCLK Failed!",
-+ return -1);
-+ PP_ASSERT_WITH_CODE(!rv_read_arg_from_smc(hwmgr->smumgr,
-+ &now),
-+ "Attempt to get current MEMCLK Failed!",
-+ return -1);
-+
-+ for (i = 0; i < mclk_table->count; i++)
-+ size += sprintf(buf + size, "%d: %uMhz %s\n",
-+ i,
-+ mclk_table->entries[i].clk / 100,
-+ ((mclk_table->entries[i].clk / 100)
-+ == now) ? "*" : "");
-+ break;
-+ default:
-+ break;
-+ }
-+
-+ return size;
- }
-
- static int rv_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
---
-2.7.4
-