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Diffstat (limited to 'meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0960-drm-amd-display-fix-gamma-distortion-on-Vega.patch')
-rw-r--r--meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0960-drm-amd-display-fix-gamma-distortion-on-Vega.patch52
1 files changed, 0 insertions, 52 deletions
diff --git a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0960-drm-amd-display-fix-gamma-distortion-on-Vega.patch b/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0960-drm-amd-display-fix-gamma-distortion-on-Vega.patch
deleted file mode 100644
index 6a384c61..00000000
--- a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0960-drm-amd-display-fix-gamma-distortion-on-Vega.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From 51d1bc961d77049d50c476578f0b2c52a7e39a30 Mon Sep 17 00:00:00 2001
-From: Roman Li <Roman.Li@amd.com>
-Date: Thu, 10 Aug 2017 16:11:10 -0400
-Subject: [PATCH 0960/4131] drm/amd/display: fix gamma distortion on Vega
-
-Added missing reg shift/masks to soc base
-
-Signed-off-by: Roman Li <Roman.Li@amd.com>
-Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
-
- Conflicts:
- drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
-
-Change-Id: I3c0397f19906a6b2b82b7fa44bf9b7a05c606098
----
- drivers/gpu/drm/amd/display/dc/dce/dce_transform.h | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
-diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
-index 8632d8f..9d8c5e1 100644
---- a/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
-+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_transform.h
-@@ -196,6 +196,17 @@
- XFM_SF(DCP0_OUTPUT_CSC_C11_C12, OUTPUT_CSC_C11, mask_sh),\
- XFM_SF(DCP0_OUTPUT_CSC_C11_C12, OUTPUT_CSC_C12, mask_sh),\
- XFM_SF(DCP0_OUTPUT_CSC_CONTROL, OUTPUT_CSC_GRPH_MODE, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CNTLA_START_CNTL, REGAMMA_CNTLA_EXP_REGION_START_SEGMENT, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CNTLA_SLOPE_CNTL, REGAMMA_CNTLA_EXP_REGION_LINEAR_SLOPE, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CNTLA_END_CNTL1, REGAMMA_CNTLA_EXP_REGION_END, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_BASE, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CNTLA_END_CNTL2, REGAMMA_CNTLA_EXP_REGION_END_SLOPE, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_LUT_OFFSET, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION0_NUM_SEGMENTS, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_LUT_OFFSET, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CNTLA_REGION_0_1, REGAMMA_CNTLA_EXP_REGION1_NUM_SEGMENTS, mask_sh),\
-+ XFM_SF(DCP0_REGAMMA_CONTROL, GRPH_REGAMMA_MODE, mask_sh),\
- XFM_SF(SCL0_SCL_MODE, SCL_MODE, mask_sh), \
- XFM_SF(SCL0_SCL_TAP_CONTROL, SCL_H_NUM_OF_TAPS, mask_sh), \
- XFM_SF(SCL0_SCL_TAP_CONTROL, SCL_V_NUM_OF_TAPS, mask_sh), \
-@@ -229,6 +240,8 @@
- XFM_SF(SCL0_SCL_UPDATE, SCL_COEF_UPDATE_COMPLETE, mask_sh), \
- XFM_SF(LB0_LB_DATA_FORMAT, ALPHA_EN, mask_sh), \
- XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, SCL_COEFF_MEM_PWR_DIS, mask_sh), \
-+ XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, DCP_REGAMMA_MEM_PWR_DIS, mask_sh),\
-+ XFM_SF(DCFE0_DCFE_MEM_PWR_CTRL, DCP_LUT_MEM_PWR_DIS, mask_sh),\
- XFM_SF(DCFE0_DCFE_MEM_PWR_STATUS, SCL_COEFF_MEM_PWR_STATE, mask_sh), \
- XFM_SF(SCL0_SCL_MODE, SCL_PSCL_EN, mask_sh)
-
---
-2.7.4
-