diff options
Diffstat (limited to 'meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0888-drm-amd-amdgpu-Tidy-up-gfx_v9_0_enable_sck_slow_down.patch')
-rw-r--r-- | meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0888-drm-amd-amdgpu-Tidy-up-gfx_v9_0_enable_sck_slow_down.patch | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0888-drm-amd-amdgpu-Tidy-up-gfx_v9_0_enable_sck_slow_down.patch b/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0888-drm-amd-amdgpu-Tidy-up-gfx_v9_0_enable_sck_slow_down.patch deleted file mode 100644 index 15973dd4..00000000 --- a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0888-drm-amd-amdgpu-Tidy-up-gfx_v9_0_enable_sck_slow_down.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 6d9083e2d488dee85e139a28968d35b239615e47 Mon Sep 17 00:00:00 2001 -From: Tom St Denis <tom.stdenis@amd.com> -Date: Thu, 31 Aug 2017 09:01:11 -0400 -Subject: [PATCH 0888/4131] drm/amd/amdgpu: Tidy up - gfx_v9_0_enable_sck_slow_down_on_power_up() - -Signed-off-by: Tom St Denis <tom.stdenis@amd.com> -Reviewed-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 15 +++++---------- - 1 file changed, 5 insertions(+), 10 deletions(-) - -diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c -index 4bae178..81a3f55 100644 ---- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c -+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c -@@ -1842,16 +1842,11 @@ static void gfx_v9_0_enable_sck_slow_down_on_power_up(struct amdgpu_device *adev - uint32_t default_data = 0; - - default_data = data = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL)); -- -- if (enable == true) { -- data |= RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PU_ENABLE_MASK; -- if (default_data != data) -- WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data); -- } else { -- data &= ~RLC_PG_CNTL__SMU_CLK_SLOWDOWN_ON_PU_ENABLE_MASK; -- if(default_data != data) -- WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data); -- } -+ data = REG_SET_FIELD(data, RLC_PG_CNTL, -+ SMU_CLK_SLOWDOWN_ON_PU_ENABLE, -+ enable ? 1 : 0); -+ if (default_data != data) -+ WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data); - } - - static void gfx_v9_0_enable_sck_slow_down_on_power_down(struct amdgpu_device *adev, --- -2.7.4 - |