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Diffstat (limited to 'meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0780-drm-amdgpu-return-bo-itself-if-userptr-is-cpu-addr-o.patch')
-rw-r--r--meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0780-drm-amdgpu-return-bo-itself-if-userptr-is-cpu-addr-o.patch161
1 files changed, 0 insertions, 161 deletions
diff --git a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0780-drm-amdgpu-return-bo-itself-if-userptr-is-cpu-addr-o.patch b/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0780-drm-amdgpu-return-bo-itself-if-userptr-is-cpu-addr-o.patch
deleted file mode 100644
index 50e30bd7..00000000
--- a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0780-drm-amdgpu-return-bo-itself-if-userptr-is-cpu-addr-o.patch
+++ /dev/null
@@ -1,161 +0,0 @@
-From ab8e9e706b7103b65d7fdc01c899ea45dc701411 Mon Sep 17 00:00:00 2001
-From: Chunming Zhou <David1.Zhou@amd.com>
-Date: Wed, 25 Nov 2015 18:09:10 +0800
-Subject: [PATCH 0780/4131] drm/amdgpu: return bo itself if userptr is cpu addr
- of bo V2
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-V2: get original gem handle from gobj
-
-Change-Id: I705eadfe03cd85c75bff252563d69f3c8a536868
-Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
-Reviewed-by: Christian König <christian.koenig@amd.com>
-Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
-Signed-off-by: Kalyan Alle <kalyan.alle@amd.com>
-
-Conflicts:
- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
- drivers/gpu/drm/amd/include/uapi/drm/amdgpu_drm.h
----
- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
- drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 59 +++++++++++++++++++++++++++++++++
- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 +
- include/uapi/drm/amdgpu_drm.h | 11 ++++++
- 4 files changed, 73 insertions(+)
-
-diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
-index 31738e5..ceb1223 100644
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
-@@ -1298,6 +1298,8 @@ int amdgpu_gem_info_ioctl(struct drm_device *dev, void *data,
- struct drm_file *filp);
- int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
- struct drm_file *filp);
-+int amdgpu_gem_find_bo_by_cpu_mapping_ioctl(struct drm_device *dev, void *data,
-+ struct drm_file *filp);
- int amdgpu_gem_mmap_ioctl(struct drm_device *dev, void *data,
- struct drm_file *filp);
- int amdgpu_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
-diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
-index 53f25c1..5aba940 100644
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
-@@ -238,6 +238,65 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
- return 0;
- }
-
-+static int amdgpu_gem_get_handle_from_object(struct drm_file *filp,
-+ struct drm_gem_object *obj)
-+{
-+ int i;
-+ struct drm_gem_object *tmp;
-+ spin_lock(&filp->table_lock);
-+ idr_for_each_entry(&filp->object_idr, tmp, i) {
-+ if (obj == tmp) {
-+ drm_gem_object_reference(obj);
-+ spin_unlock(&filp->table_lock);
-+ return i;
-+ }
-+ }
-+ spin_unlock(&filp->table_lock);
-+ return 0;
-+}
-+
-+
-+int amdgpu_gem_find_bo_by_cpu_mapping_ioctl(struct drm_device *dev, void *data,
-+ struct drm_file *filp)
-+{
-+ struct drm_amdgpu_gem_find_bo *args = data;
-+ struct drm_gem_object *gobj;
-+ struct amdgpu_bo *bo;
-+ struct ttm_buffer_object *tbo;
-+ struct vm_area_struct *vma;
-+ uint32_t handle;
-+ int r;
-+
-+ if (offset_in_page(args->addr | args->size))
-+ return -EINVAL;
-+
-+ down_read(&current->mm->mmap_sem);
-+ vma = find_vma(current->mm, args->addr);
-+ if (!vma || vma->vm_file != filp->filp ||
-+ (args->size > (vma->vm_end - args->addr))) {
-+ args->handle = 0;
-+ up_read(&current->mm->mmap_sem);
-+ return -EINVAL;
-+ }
-+ tbo = vma->vm_private_data;
-+ bo = container_of(tbo, struct amdgpu_bo, tbo);
-+ amdgpu_bo_ref(bo);
-+ gobj = &bo->gem_base;
-+ handle = amdgpu_gem_get_handle_from_object(filp, gobj);
-+ if (handle == 0) {
-+ r = drm_gem_handle_create(filp, gobj, &handle);
-+ if (r) {
-+ DRM_ERROR("create gem handle failed\n");
-+ up_read(&current->mm->mmap_sem);
-+ return r;
-+ }
-+ }
-+ args->handle = handle;
-+ args->offset = args->addr - vma->vm_start;
-+ up_read(&current->mm->mmap_sem);
-+ return 0;
-+}
-+
- int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,
- struct drm_file *filp)
- {
-diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
-index 054b270..bc4c55d 100644
---- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
-+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
-@@ -1063,6 +1063,7 @@ const struct drm_ioctl_desc amdgpu_ioctls_kms[] = {
- DRM_IOCTL_DEF_DRV(AMDGPU_GEM_OP, amdgpu_gem_op_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(AMDGPU_GEM_USERPTR, amdgpu_gem_userptr_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(AMDGPU_FREESYNC, amdgpu_freesync_ioctl, DRM_MASTER),
-+ DRM_IOCTL_DEF_DRV(AMDGPU_GEM_FIND_BO, amdgpu_gem_find_bo_by_cpu_mapping_ioctl, DRM_AUTH|DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(AMDGPU_GEM_DGMA, amdgpu_gem_dgma_ioctl, DRM_AUTH|DRM_RENDER_ALLOW)
- };
- const int amdgpu_max_kms_ioctl = ARRAY_SIZE(amdgpu_ioctls_kms);
-diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
-index e19af02..3d2454b 100644
---- a/include/uapi/drm/amdgpu_drm.h
-+++ b/include/uapi/drm/amdgpu_drm.h
-@@ -56,6 +56,7 @@ extern "C" {
- /* hybrid specific ioctls */
- #define DRM_AMDGPU_FREESYNC 0x5d
- #define DRM_AMDGPU_GEM_DGMA 0x5c
-+#define DRM_AMDGPU_GEM_FIND_BO 0x5f
-
- #define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
- #define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
-@@ -75,6 +76,7 @@ extern "C" {
- /* hybrid specific ioctls */
- #define DRM_IOCTL_AMDGPU_FREESYNC DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_FREESYNC, struct drm_amdgpu_freesync)
- #define DRM_IOCTL_AMDGPU_GEM_DGMA DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_DGMA, struct drm_amdgpu_gem_dgma)
-+#define DRM_IOCTL_AMDGPU_GEM_FIND_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_FIND_BO, struct drm_amdgpu_gem_find_bo)
-
- #define AMDGPU_GEM_DOMAIN_CPU 0x1
- #define AMDGPU_GEM_DOMAIN_GTT 0x2
-@@ -255,6 +257,15 @@ struct drm_amdgpu_gem_dgma {
- __u32 op;
- __u32 handle;
- };
-+struct drm_amdgpu_gem_find_bo {
-+ uint64_t addr;
-+ uint64_t size;
-+ uint32_t flags;
-+ /* Resulting GEM handle */
-+ uint32_t handle;
-+ /* offset in bo */
-+ uint64_t offset;
-+};
-
- /* SI-CI-VI: */
- /* same meaning as the GB_TILE_MODE and GL_MACRO_TILE_MODE fields */
---
-2.7.4
-