diff options
Diffstat (limited to 'meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0629-drm-amd-display-powergate-fe-of-reused-pipes-to-rese.patch')
| -rw-r--r-- | meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0629-drm-amd-display-powergate-fe-of-reused-pipes-to-rese.patch | 56 |
1 files changed, 0 insertions, 56 deletions
diff --git a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0629-drm-amd-display-powergate-fe-of-reused-pipes-to-rese.patch b/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0629-drm-amd-display-powergate-fe-of-reused-pipes-to-rese.patch deleted file mode 100644 index b5f822f8..00000000 --- a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0629-drm-amd-display-powergate-fe-of-reused-pipes-to-rese.patch +++ /dev/null @@ -1,56 +0,0 @@ -From fd42b4758a36476288d5a8702dd2a0c01bd96e05 Mon Sep 17 00:00:00 2001 -From: Eric Yang <Eric.Yang2@amd.com> -Date: Tue, 18 Jul 2017 15:50:47 -0400 -Subject: [PATCH 0629/4131] drm/amd/display: powergate fe of reused pipes to - reset ttu - -When we exit MPO, disconnected pipes cannot be immediately powergated -because registers are double buffered, and actual disconnection does -not happen until VUPDATE. So it is differred for many flips. -However in the case of exiting full screen, the transition from MPO -to grph only back to MPO is very fast and also involves increasing of -watermarks. Since the underlay pipe is never powergated in this -scenario, it keeps its old TTU counter, which causes allowPstateSwitch -signal to be de-asserted when compared to the new increased watermark. -Since the new pipe is not enabled yet, the signal will be continously -de-asserted and hangs SMU, who's waiting for the signal to do pstate -switching. - -Signed-off-by: Eric Yang <Eric.Yang2@amd.com> -Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> -Acked-by: Harry Wentland <Harry.Wentland@amd.com> -Signed-off-by: Alex Deucher <alexander.deucher@amd.com> ---- - drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c -index adf3d29..6543027 100644 ---- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c -+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c -@@ -1577,6 +1577,14 @@ static void dcn10_apply_ctx_for_surface( - struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; - struct pipe_ctx *old_pipe_ctx = - &dc->current_context->res_ctx.pipe_ctx[i]; -+ /* -+ * Powergate reused pipes that are not powergated -+ * fairly hacky right now, using opp_id as indicator -+ */ -+ if (pipe_ctx->surface && !old_pipe_ctx->surface) { -+ if (pipe_ctx->mpcc->opp_id != 0xf) -+ dcn10_power_down_fe(dc, pipe_ctx->pipe_idx); -+ } - - if ((!pipe_ctx->surface && old_pipe_ctx->surface) - || (!pipe_ctx->stream && old_pipe_ctx->stream)) { -@@ -1588,6 +1596,7 @@ static void dcn10_apply_ctx_for_surface( - continue; - } - -+ /* reset mpc */ - mpcc_cfg.opp_id = 0xf; - mpcc_cfg.top_dpp_id = 0xf; - mpcc_cfg.bot_mpcc_id = 0xf; --- -2.7.4 - |