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Diffstat (limited to 'meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0071-drm-amd-display-define-reg-helpers-to-update-registe.patch')
-rw-r--r--meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0071-drm-amd-display-define-reg-helpers-to-update-registe.patch53
1 files changed, 53 insertions, 0 deletions
diff --git a/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0071-drm-amd-display-define-reg-helpers-to-update-registe.patch b/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0071-drm-amd-display-define-reg-helpers-to-update-registe.patch
new file mode 100644
index 00000000..099b0b1a
--- /dev/null
+++ b/meta-v1000/recipes-kernel/linux/linux-yocto-4.14.71/0071-drm-amd-display-define-reg-helpers-to-update-registe.patch
@@ -0,0 +1,53 @@
+From 54cab7c413e2cf7416370307adb9852b1f8d3047 Mon Sep 17 00:00:00 2001
+From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
+Date: Thu, 15 Dec 2016 13:53:15 -0500
+Subject: [PATCH 0071/4131] drm/amd/display: define reg helpers to update
+ registers with 8 and 9 fields
+
+Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Harry Wentland <Harry.Wentland@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/inc/reg_helper.h | 25 +++++++++++++++++++++++++
+ 1 file changed, 25 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h b/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
+index a078174..b595b94 100644
+--- a/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
++++ b/drivers/gpu/drm/amd/display/dc/inc/reg_helper.h
+@@ -112,6 +112,31 @@
+ FN(reg, f6), v6,\
+ FN(reg, f7), v7)
+
++#define REG_SET_8(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, \
++ f5, v5, f6, v6, f7, v7, f8, v8) \
++ REG_SET_N(reg, 8, init_value, \
++ FN(reg, f1), v1,\
++ FN(reg, f2), v2,\
++ FN(reg, f3), v3,\
++ FN(reg, f4), v4,\
++ FN(reg, f5), v5,\
++ FN(reg, f6), v6,\
++ FN(reg, f7), v7,\
++ FN(reg, f8), v8)
++
++#define REG_SET_9(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \
++ v5, f6, v6, f7, v7, f8, v8, f9, v9) \
++ REG_SET_N(reg, 9, init_value, \
++ FN(reg, f1), v1,\
++ FN(reg, f2), v2, \
++ FN(reg, f3), v3, \
++ FN(reg, f4), v4, \
++ FN(reg, f5), v5, \
++ FN(reg, f6), v6, \
++ FN(reg, f7), v7, \
++ FN(reg, f8), v8, \
++ FN(reg, f9), v9)
++
+ #define REG_SET_10(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4, f5, \
+ v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10) \
+ REG_SET_N(reg, 10, init_value, \
+--
+2.7.4
+