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-rw-r--r--meta-amdfalconx86/recipes-kernel/linux/files/1145-use-cached-raster-config-values-in-csb.patch61
1 files changed, 61 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/files/1145-use-cached-raster-config-values-in-csb.patch b/meta-amdfalconx86/recipes-kernel/linux/files/1145-use-cached-raster-config-values-in-csb.patch
new file mode 100644
index 00000000..b3b19e7b
--- /dev/null
+++ b/meta-amdfalconx86/recipes-kernel/linux/files/1145-use-cached-raster-config-values-in-csb.patch
@@ -0,0 +1,61 @@
+From 9fcd43d6a79011dd9ab3837d38ba27454be747ad Mon Sep 17 00:00:00 2001
+From: Sanjay R Mehta <sanju.mehta@amd.com>
+Date: Tue, 6 Dec 2016 20:14:23 +0530
+Subject: [PATCH 07/10] use cached raster config values in csb
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Simplify the code and properly set the csb for harvest values.
+
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 30 ++----------------------------
+ 1 file changed, 2 insertions(+), 28 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+index 479047e..dcc59f3 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+@@ -1110,34 +1110,8 @@ static void gfx_v8_0_get_csb_buffer(struct amdgpu_device *adev,
+ buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));
+ buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG -
+ PACKET3_SET_CONTEXT_REG_START);
+- switch (adev->asic_type) {
+- case CHIP_TONGA:
+- case CHIP_POLARIS10:
+- buffer[count++] = cpu_to_le32(0x16000012);
+- buffer[count++] = cpu_to_le32(0x0000002A);
+- break;
+- case CHIP_POLARIS11:
+- buffer[count++] = cpu_to_le32(0x16000012);
+- buffer[count++] = cpu_to_le32(0x00000000);
+- break;
+- case CHIP_FIJI:
+- buffer[count++] = cpu_to_le32(0x3a00161a);
+- buffer[count++] = cpu_to_le32(0x0000002e);
+- break;
+- case CHIP_TOPAZ:
+- case CHIP_CARRIZO:
+- buffer[count++] = cpu_to_le32(0x00000002);
+- buffer[count++] = cpu_to_le32(0x00000000);
+- break;
+- case CHIP_STONEY:
+- buffer[count++] = cpu_to_le32(0x00000000);
+- buffer[count++] = cpu_to_le32(0x00000000);
+- break;
+- default:
+- buffer[count++] = cpu_to_le32(0x00000000);
+- buffer[count++] = cpu_to_le32(0x00000000);
+- break;
+- }
++ buffer[count++] = cpu_to_le32(adev->gfx.config.rb_config[0][0].raster_config);
++ buffer[count++] = cpu_to_le32(adev->gfx.config.rb_config[0][0].raster_config_1);
+
+ buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
+ buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);
+--
+2.7.4
+