diff options
Diffstat (limited to 'meta-amdfalconx86/recipes-kernel/linux/files/1142-add-additional-cached-gca-config-variables.patch')
-rw-r--r-- | meta-amdfalconx86/recipes-kernel/linux/files/1142-add-additional-cached-gca-config-variables.patch | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/files/1142-add-additional-cached-gca-config-variables.patch b/meta-amdfalconx86/recipes-kernel/linux/files/1142-add-additional-cached-gca-config-variables.patch new file mode 100644 index 00000000..c9c426f9 --- /dev/null +++ b/meta-amdfalconx86/recipes-kernel/linux/files/1142-add-additional-cached-gca-config-variables.patch @@ -0,0 +1,51 @@ +From caa6b72d0c01491114f017fe3bca7adc05194611 Mon Sep 17 00:00:00 2001 +From: Sanjay R Mehta <sanju.mehta@amd.com> +Date: Tue, 6 Dec 2016 17:07:10 +0530 +Subject: [PATCH 04/10] add additional cached gca config variables +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +We need to cache some additional values to handle SR-IOV +and PG. + +Reviewed-by: Christian König <christian.koenig@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index 3f5d2ad..40497c2 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -1135,6 +1135,16 @@ struct amdgpu_scratch { + /* + * GFX configurations + */ ++#define AMDGPU_GFX_MAX_SE 4 ++#define AMDGPU_GFX_MAX_SH_PER_SE 2 ++ ++struct amdgpu_rb_config { ++ uint32_t rb_backend_disable; ++ uint32_t user_rb_backend_disable; ++ uint32_t raster_config; ++ uint32_t raster_config_1; ++}; ++ + struct amdgpu_gca_config { + unsigned max_shader_engines; + unsigned max_tile_pipes; +@@ -1163,6 +1173,8 @@ struct amdgpu_gca_config { + + uint32_t tile_mode_array[32]; + uint32_t macrotile_mode_array[16]; ++ ++ struct amdgpu_rb_config rb_config[AMDGPU_GFX_MAX_SE][AMDGPU_GFX_MAX_SH_PER_SE]; + }; + + struct amdgpu_gfx { +-- +2.7.4 + |