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Diffstat (limited to 'meta-amdfalconx86/recipes-kernel/linux/files/1140-dma-buf-return-index-of-the-first-signaled-fence.patch')
-rw-r--r--meta-amdfalconx86/recipes-kernel/linux/files/1140-dma-buf-return-index-of-the-first-signaled-fence.patch188
1 files changed, 188 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/files/1140-dma-buf-return-index-of-the-first-signaled-fence.patch b/meta-amdfalconx86/recipes-kernel/linux/files/1140-dma-buf-return-index-of-the-first-signaled-fence.patch
new file mode 100644
index 00000000..76815764
--- /dev/null
+++ b/meta-amdfalconx86/recipes-kernel/linux/files/1140-dma-buf-return-index-of-the-first-signaled-fence.patch
@@ -0,0 +1,188 @@
+From 7e06443930ab2fabda1977c20ff82ff6bc42e3be Mon Sep 17 00:00:00 2001
+From: Sanjay R Mehta <sanju.mehta@amd.com>
+Date: Tue, 15 Nov 2016 14:30:58 +0530
+Subject: [PATCH 02/10] dma-buf: return index of the first signaled fence
+
+Return the index of the first signaled fence. This information
+is useful in some APIs like Vulkan.
+
+Signed-off-by: monk.liu <monk.liu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: Sumit Semwal <sumit.semwal@linaro.org>
+Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com>
+---
+ drivers/dma-buf/fence.c | 19 ++++++++++++++-----
+ drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 4 +++-
+ drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c | 2 +-
+ drivers/gpu/drm/amd/include/uapi/drm/amdgpu_drm.h | 21 +++++++++++----------
+ include/linux/fence.h | 2 +-
+ 5 files changed, 30 insertions(+), 18 deletions(-)
+
+diff --git a/drivers/dma-buf/fence.c b/drivers/dma-buf/fence.c
+index 7b05dbe..192f99b 100644
+--- a/drivers/dma-buf/fence.c
++++ b/drivers/dma-buf/fence.c
+@@ -398,14 +398,17 @@ out:
+ EXPORT_SYMBOL(fence_default_wait);
+
+ static bool
+-fence_test_signaled_any(struct fence **fences, uint32_t count)
++fence_test_signaled_any(struct fence **fences, uint32_t count, uint32_t *idx)
+ {
+ int i;
+
+ for (i = 0; i < count; ++i) {
+ struct fence *fence = fences[i];
+- if (test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->flags))
++ if (test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
++ if (idx)
++ *idx = i;
+ return true;
++ }
+ }
+ return false;
+ }
+@@ -417,6 +420,7 @@ fence_test_signaled_any(struct fence **fences, uint32_t count)
+ * @count: [in] number of fences to wait on
+ * @intr: [in] if true, do an interruptible wait
+ * @timeout: [in] timeout value in jiffies, or MAX_SCHEDULE_TIMEOUT
++ * @idx: [out] the first signaled fence index, meaninful only on Returns positive
+ *
+ * Returns -EINVAL on custom fence wait implementation, -ERESTARTSYS if
+ * interrupted, 0 if the wait timed out, or the remaining timeout in jiffies
+@@ -428,7 +432,7 @@ fence_test_signaled_any(struct fence **fences, uint32_t count)
+ */
+ signed long
+ fence_wait_any_timeout(struct fence **fences, uint32_t count,
+- bool intr, signed long timeout)
++ bool intr, signed long timeout, uint32_t *idx)
+ {
+ struct default_wait_cb *cb;
+ signed long ret = timeout;
+@@ -439,8 +443,11 @@ fence_wait_any_timeout(struct fence **fences, uint32_t count,
+
+ if (timeout == 0) {
+ for (i = 0; i < count; ++i)
+- if (fence_is_signaled(fences[i]))
++ if (fence_is_signaled(fences[i])) {
++ if (idx)
++ *idx = i;
+ return 1;
++ }
+
+ return 0;
+ }
+@@ -463,6 +470,8 @@ fence_wait_any_timeout(struct fence **fences, uint32_t count,
+ if (fence_add_callback(fence, &cb[i].base,
+ fence_default_wait_cb)) {
+ /* This fence is already signaled */
++ if (idx)
++ *idx = i;
+ goto fence_rm_cb;
+ }
+ }
+@@ -473,7 +482,7 @@ fence_wait_any_timeout(struct fence **fences, uint32_t count,
+ else
+ set_current_state(TASK_UNINTERRUPTIBLE);
+
+- if (fence_test_signaled_any(fences, count))
++ if (fence_test_signaled_any(fences, count, idx))
+ break;
+
+ ret = schedule_timeout(ret);
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+index bb6057a..181e2b7 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+@@ -1107,6 +1107,7 @@ static int amdgpu_cs_wait_any_fence(struct amdgpu_device *adev,
+ {
+ unsigned long timeout = amdgpu_gem_timeout(wait->in.timeout_ns);
+ uint32_t fence_count = wait->in.fence_count;
++ uint32_t first = ~0;
+ struct fence **array;
+ unsigned i;
+ long r;
+@@ -1132,13 +1133,14 @@ static int amdgpu_cs_wait_any_fence(struct amdgpu_device *adev,
+ }
+ }
+
+- r = fence_wait_any_timeout(array, fence_count, true, timeout);
++ r = fence_wait_any_timeout(array, fence_count, true, timeout, &first);
+ if (r < 0)
+ goto err_free_fence_array;
+
+ out:
+ memset(wait, 0, sizeof(*wait));
+ wait->out.status = (r > 0);
++ wait->out.first_signaled = first;
+ /* set return value 0 to indicate success */
+ r = 0;
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+index 8bf84ef..9f4311c 100644
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c
+@@ -360,7 +360,7 @@ int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager,
+ if (count) {
+ spin_unlock(&sa_manager->wq.lock);
+ t = fence_wait_any_timeout(fences, count, false,
+- MAX_SCHEDULE_TIMEOUT);
++ MAX_SCHEDULE_TIMEOUT, NULL);
+ for (i = 0; i < count; ++i)
+ fence_put(fences[i]);
+
+diff --git a/drivers/gpu/drm/amd/include/uapi/drm/amdgpu_drm.h b/drivers/gpu/drm/amd/include/uapi/drm/amdgpu_drm.h
+index 3f13a87..c2f06eb 100644
+--- a/drivers/gpu/drm/amd/include/uapi/drm/amdgpu_drm.h
++++ b/drivers/gpu/drm/amd/include/uapi/drm/amdgpu_drm.h
+@@ -334,23 +334,24 @@ union drm_amdgpu_wait_cs {
+ };
+
+ struct drm_amdgpu_fence {
+- uint32_t ctx_id;
+- uint32_t ip_type;
+- uint32_t ip_instance;
+- uint32_t ring;
+- uint64_t seq_no;
++ __u32 ctx_id;
++ __u32 ip_type;
++ __u32 ip_instance;
++ __u32 ring;
++ __u64 seq_no;
+ };
+
+ struct drm_amdgpu_wait_fences_in {
+ /** This points to uint64_t * which points to fences */
+- uint64_t fences;
+- uint32_t fence_count;
+- uint32_t wait_all;
+- uint64_t timeout_ns;
++ __u64 fences;
++ __u32 fence_count;
++ __u32 wait_all;
++ __u64 timeout_ns;
+ };
+
+ struct drm_amdgpu_wait_fences_out {
+- uint64_t status;
++ __u32 status;
++ __u32 first_signaled;
+ };
+
+ union drm_amdgpu_wait_fences {
+diff --git a/include/linux/fence.h b/include/linux/fence.h
+index bb52201..b8da489 100644
+--- a/include/linux/fence.h
++++ b/include/linux/fence.h
+@@ -322,7 +322,7 @@ static inline struct fence *fence_later(struct fence *f1, struct fence *f2)
+
+ signed long fence_wait_timeout(struct fence *, bool intr, signed long timeout);
+ signed long fence_wait_any_timeout(struct fence **fences, uint32_t count,
+- bool intr, signed long timeout);
++ bool intr, signed long timeout, uint32_t *idx);
+
+ /**
+ * fence_wait - sleep until the fence gets signaled
+--
+2.7.4
+