diff options
Diffstat (limited to 'meta-amdfalconx86/recipes-kernel/linux/files/1133-ASoC-dwc-add-quirk-for-different-register-offset.patch')
| -rw-r--r-- | meta-amdfalconx86/recipes-kernel/linux/files/1133-ASoC-dwc-add-quirk-for-different-register-offset.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/files/1133-ASoC-dwc-add-quirk-for-different-register-offset.patch b/meta-amdfalconx86/recipes-kernel/linux/files/1133-ASoC-dwc-add-quirk-for-different-register-offset.patch new file mode 100644 index 00000000..f0fc5753 --- /dev/null +++ b/meta-amdfalconx86/recipes-kernel/linux/files/1133-ASoC-dwc-add-quirk-for-different-register-offset.patch @@ -0,0 +1,64 @@ +From c9d301e1d02d7b741f9f3d1799ad9b2306c393f1 Mon Sep 17 00:00:00 2001 +From: Maruthi Srinivas Bayyavarapu <Maruthi.Bayyavarapu@amd.com> +Date: Fri, 23 Sep 2016 17:51:13 +0530 +Subject: [PATCH 08/17] ASoC:dwc add quirk for different register offset + +Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> +Signed-off-by: Kalyan Alle <kalyan.alle@amd.com> +--- + sound/soc/dwc/designware_i2s.c | 18 +++++++++++++++--- + 1 file changed, 15 insertions(+), 3 deletions(-) + +diff --git a/sound/soc/dwc/designware_i2s.c b/sound/soc/dwc/designware_i2s.c +index 6e6a70c..4f8f074 100644 +--- a/sound/soc/dwc/designware_i2s.c ++++ b/sound/soc/dwc/designware_i2s.c +@@ -93,6 +93,10 @@ struct dw_i2s_dev { + struct clk *clk; + int active; + unsigned int capability; ++ #define DW_I2S_QUIRK_COMP_REG_OFFSET (1 << 0) ++ unsigned int quirks; ++ unsigned int i2s_reg_comp1; ++ unsigned int i2s_reg_comp2; + struct device *dev; + + /* data related to DMA transfers b/w i2s and DMAC */ +@@ -459,8 +463,8 @@ static int dw_configure_dai(struct dw_i2s_dev *dev, + * Read component parameter registers to extract + * the I2S block's configuration. + */ +- u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1); +- u32 comp2 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_2); ++ u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1); ++ u32 comp2 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp2); + u32 idx; + + if (COMP1_TX_ENABLED(comp1)) { +@@ -503,7 +507,7 @@ static int dw_configure_dai_by_pd(struct dw_i2s_dev *dev, + struct resource *res, + const struct i2s_platform_data *pdata) + { +- u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1); ++ u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1); + u32 idx = COMP1_APB_DATA_WIDTH(comp1); + int ret; + +@@ -607,6 +611,14 @@ static int dw_i2s_probe(struct platform_device *pdev) + if (pdata) { + dev->capability = pdata->cap; + clk_id = NULL; ++ dev->quirks = pdata->quirks; ++ if (dev->quirks & DW_I2S_QUIRK_COMP_REG_OFFSET) { ++ dev->i2s_reg_comp1 = pdata->i2s_reg_comp1; ++ dev->i2s_reg_comp2 = pdata->i2s_reg_comp2; ++ } else { ++ dev->i2s_reg_comp1 = I2S_COMP_PARAM_1; ++ dev->i2s_reg_comp2 = I2S_COMP_PARAM_2; ++ } + ret = dw_configure_dai_by_pd(dev, dw_i2s_dai, res, pdata); + } else { + clk_id = "i2sclk"; +-- +2.7.4 + |