diff options
Diffstat (limited to 'meta-amdfalconx86/recipes-kernel/linux/files/0044-yocto-amd-sdhci-add-support-for-CZ-SD-host-controller.patch')
-rw-r--r-- | meta-amdfalconx86/recipes-kernel/linux/files/0044-yocto-amd-sdhci-add-support-for-CZ-SD-host-controller.patch | 136 |
1 files changed, 136 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-kernel/linux/files/0044-yocto-amd-sdhci-add-support-for-CZ-SD-host-controller.patch b/meta-amdfalconx86/recipes-kernel/linux/files/0044-yocto-amd-sdhci-add-support-for-CZ-SD-host-controller.patch new file mode 100644 index 00000000..fb3f37c0 --- /dev/null +++ b/meta-amdfalconx86/recipes-kernel/linux/files/0044-yocto-amd-sdhci-add-support-for-CZ-SD-host-controller.patch @@ -0,0 +1,136 @@ +From 0ada1e55a85758964e24b07b1b80385a8bcbdc3a Mon Sep 17 00:00:00 2001 +From: Arindam Nath <arindam.nath@amd.com> +Date: Tue, 16 Jun 2015 13:06:30 +0530 +Subject: [PATCH 1/1] sdhci: add support for CZ SD host controller + +Signed-off-by: Arindam Nath <arindam.nath@amd.com> +--- + drivers/mmc/host/sdhci-pci.c | 54 ++++++++++++++++++++++++++++++++++++++++++++ + drivers/mmc/host/sdhci.c | 11 ++++++--- + include/linux/mmc/sdhci.h | 2 ++ + include/linux/pci_ids.h | 1 + + 4 files changed, 65 insertions(+), 3 deletions(-) + +diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c +index 19bfa0a..8eb70a9 100644 +--- a/drivers/mmc/host/sdhci-pci.c ++++ b/drivers/mmc/host/sdhci-pci.c +@@ -614,6 +614,50 @@ static const struct sdhci_pci_fixes sdhci_via = { + .probe = via_probe, + }; + ++/* AMD chipset generation */ ++enum amd_chipset_gen { ++ AMD_CHIPSET_BEFORE_ML, ++ AMD_CHIPSET_CZ, ++ AMD_CHIPSET_NL, ++ AMD_CHIPSET_UNKNOWN, ++}; ++ ++static int amd_probe(struct sdhci_pci_chip *chip) ++{ ++ struct pci_dev *smbus_dev; ++ enum amd_chipset_gen gen; ++ ++ smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, ++ PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL); ++ ++ if (smbus_dev) { ++ gen = AMD_CHIPSET_BEFORE_ML; ++ } else { ++ smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD, ++ PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL); ++ ++ if (smbus_dev) { ++ if (smbus_dev->revision < 0x51) ++ gen = AMD_CHIPSET_CZ; ++ else ++ gen = AMD_CHIPSET_NL; ++ } else { ++ gen = AMD_CHIPSET_UNKNOWN; ++ } ++ } ++ ++ if ((gen == AMD_CHIPSET_BEFORE_ML) || (gen == AMD_CHIPSET_CZ)) { ++ chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD; ++ chip->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200; ++ } ++ ++ return 0; ++} ++ ++static const struct sdhci_pci_fixes sdhci_amd = { ++ .probe = amd_probe, ++}; ++ + static const struct pci_device_id pci_ids[] = { + { + .vendor = PCI_VENDOR_ID_RICOH, +@@ -983,6 +1027,16 @@ static const struct pci_device_id pci_ids[] = { + .driver_data = (kernel_ulong_t)&sdhci_o2, + }, + ++ { ++ .vendor = PCI_VENDOR_ID_AMD, ++ .device = PCI_ANY_ID, ++ .class = PCI_CLASS_SYSTEM_SDHCI << 8, ++ .class_mask = 0xFFFF00, ++ .subvendor = PCI_ANY_ID, ++ .subdevice = PCI_ANY_ID, ++ .driver_data = (kernel_ulong_t)&sdhci_amd, ++ }, ++ + { /* Generic SD host controller */ + PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00) + }, +diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c +index 135018e..ee72095 100644 +--- a/drivers/mmc/host/sdhci.c ++++ b/drivers/mmc/host/sdhci.c +@@ -899,10 +899,15 @@ static void sdhci_set_transfer_mode(struct sdhci_host *host, + struct mmc_data *data = cmd->data; + + if (data == NULL) { +- /* clear Auto CMD settings for no data CMDs */ +- mode = sdhci_readw(host, SDHCI_TRANSFER_MODE); +- sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 | ++ if (host->quirks2 & ++ SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD) { ++ sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE); ++ } else { ++ /* clear Auto CMD settings for no data CMDs */ ++ mode = sdhci_readw(host, SDHCI_TRANSFER_MODE); ++ sdhci_writew(host, mode & ~(SDHCI_TRNS_AUTO_CMD12 | + SDHCI_TRNS_AUTO_CMD23), SDHCI_TRANSFER_MODE); ++ } + return; + } + +diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h +index 362927c4..4d828e1 100644 +--- a/include/linux/mmc/sdhci.h ++++ b/include/linux/mmc/sdhci.h +@@ -100,6 +100,8 @@ struct sdhci_host { + #define SDHCI_QUIRK2_BROKEN_HOST_CONTROL (1<<5) + /* Controller does not support HS200 */ + #define SDHCI_QUIRK2_BROKEN_HS200 (1<<6) ++/* need clear transfer mode register before send cmd */ ++#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD (1<<10) + + int irq; /* Device IRQ */ + void __iomem *ioaddr; /* Mapped address */ +diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h +index 057c1d8..ccf55b3 100644 +--- a/include/linux/pci_ids.h ++++ b/include/linux/pci_ids.h +@@ -572,6 +572,7 @@ + #define PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE 0x7800 + #define PCI_DEVICE_ID_AMD_HUDSON2_SMBUS 0x780b + #define PCI_DEVICE_ID_AMD_HUDSON2_IDE 0x780c ++#define PCI_DEVICE_ID_AMD_KERNCZ_SMBUS 0x790b + + #define PCI_VENDOR_ID_TRIDENT 0x1023 + #define PCI_DEVICE_ID_TRIDENT_4DWAVE_DX 0x2000 +-- +1.9.1 + |