diff options
Diffstat (limited to 'meta-amdfalconx86/recipes-graphics/mesa/mesa/0031-radeonsi-properly-handler-raster_config-setup-on-CZ.patch')
| -rw-r--r-- | meta-amdfalconx86/recipes-graphics/mesa/mesa/0031-radeonsi-properly-handler-raster_config-setup-on-CZ.patch | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-graphics/mesa/mesa/0031-radeonsi-properly-handler-raster_config-setup-on-CZ.patch b/meta-amdfalconx86/recipes-graphics/mesa/mesa/0031-radeonsi-properly-handler-raster_config-setup-on-CZ.patch new file mode 100644 index 00000000..0b234494 --- /dev/null +++ b/meta-amdfalconx86/recipes-graphics/mesa/mesa/0031-radeonsi-properly-handler-raster_config-setup-on-CZ.patch @@ -0,0 +1,32 @@ +From 111520d282ddabf9a26c640c67ac9e88341a3423 Mon Sep 17 00:00:00 2001 +From: Arindam Nath <arindam.nath@amd.com> +Date: Thu, 11 Jun 2015 14:09:25 +0530 +Subject: [PATCH 2/2] radeonsi: properly handler raster_config setup on CZ + +Need to take into account the number of RBs. + +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Arindam Nath <arindam.nath@amd.com> +--- + src/gallium/drivers/radeonsi/si_state.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c +index b3e77ec..f3c90e2 100644 +--- a/src/gallium/drivers/radeonsi/si_state.c ++++ b/src/gallium/drivers/radeonsi/si_state.c +@@ -3093,10 +3093,10 @@ void si_init_config(struct si_context *sctx) + si_pm4_set_reg(pm4, R_028354_PA_SC_RASTER_CONFIG_1, 0x0000002a); + break; + case CHIP_ICELAND: +- case CHIP_CARRIZO: + si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x00000002); + si_pm4_set_reg(pm4, R_028354_PA_SC_RASTER_CONFIG_1, 0x00000000); + break; ++ case CHIP_CARRIZO: + case CHIP_KAVERI: + if (num_rb > 1) + si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 0x00000002); +-- +1.9.1 + |