diff options
Diffstat (limited to 'meta-amdfalconx86/recipes-graphics/mesa/mesa/0004-radeonsi-remove-deprecated-and-useless-registers.patch')
| -rw-r--r-- | meta-amdfalconx86/recipes-graphics/mesa/mesa/0004-radeonsi-remove-deprecated-and-useless-registers.patch | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/meta-amdfalconx86/recipes-graphics/mesa/mesa/0004-radeonsi-remove-deprecated-and-useless-registers.patch b/meta-amdfalconx86/recipes-graphics/mesa/mesa/0004-radeonsi-remove-deprecated-and-useless-registers.patch new file mode 100644 index 00000000..0bc7a57d --- /dev/null +++ b/meta-amdfalconx86/recipes-graphics/mesa/mesa/0004-radeonsi-remove-deprecated-and-useless-registers.patch @@ -0,0 +1,36 @@ +From 3c24679d5732c8b90e793537cd43c69a3a4d0618 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak@amd.com> +Date: Thu, 16 Apr 2015 20:37:45 +0200 +Subject: [PATCH 04/29] radeonsi: remove deprecated and useless registers + +Signed-off-by: Arindam Nath <arindam.nath@amd.com> +--- + src/gallium/drivers/radeonsi/si_state.c | 10 ---------- + 1 file changed, 10 deletions(-) + +diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c +index 4bb6f2b..f24cbbd 100644 +--- a/src/gallium/drivers/radeonsi/si_state.c ++++ b/src/gallium/drivers/radeonsi/si_state.c +@@ -3035,18 +3035,8 @@ void si_init_config(struct si_context *sctx) + + si_cmd_context_control(pm4); + +- si_pm4_set_reg(pm4, R_028A10_VGT_OUTPUT_PATH_CNTL, 0x0); +- si_pm4_set_reg(pm4, R_028A14_VGT_HOS_CNTL, 0x0); + si_pm4_set_reg(pm4, R_028A18_VGT_HOS_MAX_TESS_LEVEL, 0x0); + si_pm4_set_reg(pm4, R_028A1C_VGT_HOS_MIN_TESS_LEVEL, 0x0); +- si_pm4_set_reg(pm4, R_028A20_VGT_HOS_REUSE_DEPTH, 0x0); +- si_pm4_set_reg(pm4, R_028A24_VGT_GROUP_PRIM_TYPE, 0x0); +- si_pm4_set_reg(pm4, R_028A28_VGT_GROUP_FIRST_DECR, 0x0); +- si_pm4_set_reg(pm4, R_028A2C_VGT_GROUP_DECR, 0x0); +- si_pm4_set_reg(pm4, R_028A30_VGT_GROUP_VECT_0_CNTL, 0x0); +- si_pm4_set_reg(pm4, R_028A34_VGT_GROUP_VECT_1_CNTL, 0x0); +- si_pm4_set_reg(pm4, R_028A38_VGT_GROUP_VECT_0_FMT_CNTL, 0x0); +- si_pm4_set_reg(pm4, R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL, 0x0); + + /* FIXME calculate these values somehow ??? */ + si_pm4_set_reg(pm4, R_028A54_VGT_GS_PER_ES, 0x80); +-- +1.9.1 + |