diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux')
137 files changed, 17915 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15.inc b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15.inc new file mode 100644 index 00000000..18fad6d9 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15.inc @@ -0,0 +1,43 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/linux-yocto-5.15:" + +KMACHINE = "common-pc-64" +SRCREV_meta = "1128d7bcdcde490d4f35cc00c97f5410bb240d99" +LINUX_VERSION = "5.15.68" +LINUX_VERSION_EXTENSION = "-amd-${LINUX_KERNEL_TYPE}" + +COMPATIBLE_MACHINE = "${MACHINE}" + +INC_PR := "r1" + +SRC_URI:append = " \ + file://amdx86.cfg \ + file://amdx86-user-config.cfg \ + file://amdx86-extra-config.cfg \ + file://amd-xgbe.cfg \ + file://kvm.cfg \ + file://afalg.cfg \ + file://amdx86-standard-only.cfg \ + file://logo.cfg \ + file://console.cfg \ + file://sound.cfg \ + file://hid.cfg \ + file://usb-serial.cfg \ + file://spi-driver.cfg \ + file://wdt-driver.cfg \ + file://wifi-drivers.cfg \ + ${@bb.utils.contains('MACHINE_FEATURES', 'ccp', 'file://amd-ccp.cfg', '', d)} \ + ${@bb.utils.contains('MACHINE_FEATURES', 'screen', 'file://enable-graphics.cfg', 'file://disable-graphics.cfg', d)} \ + ${@bb.utils.contains('DISTRO_FEATURES', 'bluetooth', 'file://enable-bluetooth.cfg', 'file://disable-bluetooth.cfg', d)} \ + ${@bb.utils.contains('DISTRO', 'poky-amd', 'file://enable-kgdb.cfg', 'file://disable-kgdb.cfg', d)} \ + ${@bb.utils.contains('EXTRA_IMAGE_FEATURES', 'amd-feature-networking', 'file://dpdk.cfg', '', d)} \ + file://fragment.cfg \ + file://upstream.scc \ + file://core.scc \ + file://spi.scc \ + file://smbus.scc \ + file://ucsi.scc \ + file://wdt.scc \ + file://usb.scc \ + file://net-phy.scc \ + file://xgbe.scc \ + " diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0012-i2c-Introduce-common-module-to-instantiate-CCGx-UCSI.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0012-i2c-Introduce-common-module-to-instantiate-CCGx-UCSI.patch new file mode 100644 index 00000000..40b58292 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0012-i2c-Introduce-common-module-to-instantiate-CCGx-UCSI.patch @@ -0,0 +1,111 @@ +From 40b8dca9265d74bcdee961d31e79313474c70661 Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Date: Wed, 5 Jan 2022 16:19:31 +0200 +Subject: [PATCH 12/48] i2c: Introduce common module to instantiate CCGx UCSI + +commit 4ebf4987c0918ec6a08ece8ee745af44af02dee0 upstream + +Introduce a common module to provide an API to instantiate UCSI device +for Cypress CCGx Type-C controller. Individual bus drivers need to select +this one on demand. + +Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Signed-off-by: Wolfram Sang <wsa@kernel.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/i2c/busses/Kconfig | 7 +++++++ + drivers/i2c/busses/Makefile | 3 +++ + drivers/i2c/busses/i2c-ccgx-ucsi.c | 30 ++++++++++++++++++++++++++++++ + drivers/i2c/busses/i2c-ccgx-ucsi.h | 11 +++++++++++ + 4 files changed, 51 insertions(+) + create mode 100644 drivers/i2c/busses/i2c-ccgx-ucsi.c + create mode 100644 drivers/i2c/busses/i2c-ccgx-ucsi.h + +diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig +index fea403431f22..922ab14143fd 100644 +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -9,6 +9,13 @@ menu "I2C Hardware Bus support" + comment "PC SMBus host controller drivers" + depends on PCI + ++config I2C_CCGX_UCSI ++ tristate ++ help ++ A common module to provide an API to instantiate UCSI device ++ for Cypress CCGx Type-C controller. Individual bus drivers ++ need to select this one on demand. ++ + config I2C_ALI1535 + tristate "ALI 1535" + depends on PCI +diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile +index 1336b04f40e2..28e2aa3d3d5c 100644 +--- a/drivers/i2c/busses/Makefile ++++ b/drivers/i2c/busses/Makefile +@@ -6,6 +6,9 @@ + # ACPI drivers + obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o + ++# Auxiliary I2C/SMBus modules ++obj-$(CONFIG_I2C_CCGX_UCSI) += i2c-ccgx-ucsi.o ++ + # PC SMBus host controller drivers + obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o + obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o +diff --git a/drivers/i2c/busses/i2c-ccgx-ucsi.c b/drivers/i2c/busses/i2c-ccgx-ucsi.c +new file mode 100644 +index 000000000000..092dc92dea9f +--- /dev/null ++++ b/drivers/i2c/busses/i2c-ccgx-ucsi.c +@@ -0,0 +1,30 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later ++/* ++ * Instantiate UCSI device for Cypress CCGx Type-C controller. ++ * Derived from i2c-designware-pcidrv.c and i2c-nvidia-gpu.c. ++ */ ++ ++#include <linux/i2c.h> ++#include <linux/export.h> ++#include <linux/module.h> ++#include <linux/string.h> ++ ++#include "i2c-ccgx-ucsi.h" ++ ++struct software_node; ++ ++struct i2c_client *i2c_new_ccgx_ucsi(struct i2c_adapter *adapter, int irq, ++ const struct software_node *swnode) ++{ ++ struct i2c_board_info info = {}; ++ ++ strscpy(info.type, "ccgx-ucsi", sizeof(info.type)); ++ info.addr = 0x08; ++ info.irq = irq; ++ info.swnode = swnode; ++ ++ return i2c_new_client_device(adapter, &info); ++} ++EXPORT_SYMBOL_GPL(i2c_new_ccgx_ucsi); ++ ++MODULE_LICENSE("GPL"); +diff --git a/drivers/i2c/busses/i2c-ccgx-ucsi.h b/drivers/i2c/busses/i2c-ccgx-ucsi.h +new file mode 100644 +index 000000000000..739ac7a4b117 +--- /dev/null ++++ b/drivers/i2c/busses/i2c-ccgx-ucsi.h +@@ -0,0 +1,11 @@ ++/* SPDX-License-Identifier: GPL-2.0-or-later */ ++#ifndef __I2C_CCGX_UCSI_H_ ++#define __I2C_CCGX_UCSI_H_ ++ ++struct i2c_adapter; ++struct i2c_client; ++struct software_node; ++ ++struct i2c_client *i2c_new_ccgx_ucsi(struct i2c_adapter *adapter, int irq, ++ const struct software_node *swnode); ++#endif /* __I2C_CCGX_UCSI_H_ */ +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0013-i2c-nvidia-gpu-Switch-to-use-i2c_new_ccgx_ucsi.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0013-i2c-nvidia-gpu-Switch-to-use-i2c_new_ccgx_ucsi.patch new file mode 100644 index 00000000..7ef2613b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0013-i2c-nvidia-gpu-Switch-to-use-i2c_new_ccgx_ucsi.patch @@ -0,0 +1,83 @@ +From bd36a00c29060eb4684f433aa56c1adb3fad22b7 Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Date: Wed, 5 Jan 2022 16:19:32 +0200 +Subject: [PATCH 13/48] i2c: nvidia-gpu: Switch to use i2c_new_ccgx_ucsi() + +commit 2079563d6f60e63f7fc5d1b0b7a48dbb93c209d1 upstream + +Instead of open coded variant switch to use i2c_new_ccgx_ucsi(). + +Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Signed-off-by: Wolfram Sang <wsa@kernel.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/i2c/busses/Kconfig | 1 + + drivers/i2c/busses/i2c-nvidia-gpu.c | 26 ++++++-------------------- + 2 files changed, 7 insertions(+), 20 deletions(-) + +diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig +index 922ab14143fd..28d38d163a53 100644 +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -252,6 +252,7 @@ config I2C_NFORCE2_S4985 + config I2C_NVIDIA_GPU + tristate "NVIDIA GPU I2C controller" + depends on PCI ++ select I2C_CCGX_UCSI + help + If you say yes to this option, support will be included for the + NVIDIA GPU I2C controller which is used to communicate with the GPU's +diff --git a/drivers/i2c/busses/i2c-nvidia-gpu.c b/drivers/i2c/busses/i2c-nvidia-gpu.c +index b5055a3cbd93..8117c3674209 100644 +--- a/drivers/i2c/busses/i2c-nvidia-gpu.c ++++ b/drivers/i2c/busses/i2c-nvidia-gpu.c +@@ -17,6 +17,8 @@ + + #include <asm/unaligned.h> + ++#include "i2c-ccgx-ucsi.h" ++ + /* I2C definitions */ + #define I2C_MST_CNTL 0x00 + #define I2C_MST_CNTL_GEN_START BIT(0) +@@ -266,23 +268,6 @@ static const struct software_node ccgx_node = { + .properties = ccgx_props, + }; + +-static int gpu_populate_client(struct gpu_i2c_dev *i2cd, int irq) +-{ +- i2cd->gpu_ccgx_ucsi = devm_kzalloc(i2cd->dev, +- sizeof(*i2cd->gpu_ccgx_ucsi), +- GFP_KERNEL); +- if (!i2cd->gpu_ccgx_ucsi) +- return -ENOMEM; +- +- strlcpy(i2cd->gpu_ccgx_ucsi->type, "ccgx-ucsi", +- sizeof(i2cd->gpu_ccgx_ucsi->type)); +- i2cd->gpu_ccgx_ucsi->addr = 0x8; +- i2cd->gpu_ccgx_ucsi->irq = irq; +- i2cd->gpu_ccgx_ucsi->swnode = &ccgx_node; +- i2cd->ccgx_client = i2c_new_client_device(&i2cd->adapter, i2cd->gpu_ccgx_ucsi); +- return PTR_ERR_OR_ZERO(i2cd->ccgx_client); +-} +- + static int gpu_i2c_probe(struct pci_dev *pdev, const struct pci_device_id *id) + { + struct gpu_i2c_dev *i2cd; +@@ -328,9 +313,10 @@ static int gpu_i2c_probe(struct pci_dev *pdev, const struct pci_device_id *id) + if (status < 0) + goto free_irq_vectors; + +- status = gpu_populate_client(i2cd, pdev->irq); +- if (status < 0) { +- dev_err(&pdev->dev, "gpu_populate_client failed %d\n", status); ++ i2cd->ccgx_client = i2c_new_ccgx_ucsi(&i2cd->adapter, pdev->irq, &ccgx_node); ++ if (IS_ERR(i2cd->ccgx_client)) { ++ status = dev_err_probe(&pdev->dev, PTR_ERR(i2cd->ccgx_client), ++ "register UCSI failed\n"); + goto del_adapter; + } + +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0014-i2c-nvidia-gpu-Use-temporary-variable-for-struct-dev.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0014-i2c-nvidia-gpu-Use-temporary-variable-for-struct-dev.patch new file mode 100644 index 00000000..3c4ef4a5 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0014-i2c-nvidia-gpu-Use-temporary-variable-for-struct-dev.patch @@ -0,0 +1,103 @@ +From 2eb160c235eafb18061891def18d929927880ac6 Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Date: Wed, 5 Jan 2022 16:19:33 +0200 +Subject: [PATCH 14/48] i2c: nvidia-gpu: Use temporary variable for struct + device + +commit c2c25be6dc94132bca85f5b2c6ee9f6d7ab0173f upstream + +Use temporary variable for struct device to make code neater. + +Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Signed-off-by: Wolfram Sang <wsa@kernel.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/i2c/busses/i2c-nvidia-gpu.c | 28 ++++++++++++++-------------- + 1 file changed, 14 insertions(+), 14 deletions(-) + +diff --git a/drivers/i2c/busses/i2c-nvidia-gpu.c b/drivers/i2c/busses/i2c-nvidia-gpu.c +index 8117c3674209..a82be377146e 100644 +--- a/drivers/i2c/busses/i2c-nvidia-gpu.c ++++ b/drivers/i2c/busses/i2c-nvidia-gpu.c +@@ -270,19 +270,20 @@ static const struct software_node ccgx_node = { + + static int gpu_i2c_probe(struct pci_dev *pdev, const struct pci_device_id *id) + { ++ struct device *dev = &pdev->dev; + struct gpu_i2c_dev *i2cd; + int status; + +- i2cd = devm_kzalloc(&pdev->dev, sizeof(*i2cd), GFP_KERNEL); ++ i2cd = devm_kzalloc(dev, sizeof(*i2cd), GFP_KERNEL); + if (!i2cd) + return -ENOMEM; + +- i2cd->dev = &pdev->dev; +- dev_set_drvdata(&pdev->dev, i2cd); ++ i2cd->dev = dev; ++ dev_set_drvdata(dev, i2cd); + + status = pcim_enable_device(pdev); + if (status < 0) { +- dev_err(&pdev->dev, "pcim_enable_device failed %d\n", status); ++ dev_err(dev, "pcim_enable_device failed %d\n", status); + return status; + } + +@@ -290,13 +291,13 @@ static int gpu_i2c_probe(struct pci_dev *pdev, const struct pci_device_id *id) + + i2cd->regs = pcim_iomap(pdev, 0, 0); + if (!i2cd->regs) { +- dev_err(&pdev->dev, "pcim_iomap failed\n"); ++ dev_err(dev, "pcim_iomap failed\n"); + return -ENOMEM; + } + + status = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI); + if (status < 0) { +- dev_err(&pdev->dev, "pci_alloc_irq_vectors err %d\n", status); ++ dev_err(dev, "pci_alloc_irq_vectors err %d\n", status); + return status; + } + +@@ -308,22 +309,21 @@ static int gpu_i2c_probe(struct pci_dev *pdev, const struct pci_device_id *id) + sizeof(i2cd->adapter.name)); + i2cd->adapter.algo = &gpu_i2c_algorithm; + i2cd->adapter.quirks = &gpu_i2c_quirks; +- i2cd->adapter.dev.parent = &pdev->dev; ++ i2cd->adapter.dev.parent = dev; + status = i2c_add_adapter(&i2cd->adapter); + if (status < 0) + goto free_irq_vectors; + + i2cd->ccgx_client = i2c_new_ccgx_ucsi(&i2cd->adapter, pdev->irq, &ccgx_node); + if (IS_ERR(i2cd->ccgx_client)) { +- status = dev_err_probe(&pdev->dev, PTR_ERR(i2cd->ccgx_client), +- "register UCSI failed\n"); ++ status = dev_err_probe(dev, PTR_ERR(i2cd->ccgx_client), "register UCSI failed\n"); + goto del_adapter; + } + +- pm_runtime_set_autosuspend_delay(&pdev->dev, 3000); +- pm_runtime_use_autosuspend(&pdev->dev); +- pm_runtime_put_autosuspend(&pdev->dev); +- pm_runtime_allow(&pdev->dev); ++ pm_runtime_set_autosuspend_delay(dev, 3000); ++ pm_runtime_use_autosuspend(dev); ++ pm_runtime_put_autosuspend(dev); ++ pm_runtime_allow(dev); + + return 0; + +@@ -336,7 +336,7 @@ static int gpu_i2c_probe(struct pci_dev *pdev, const struct pci_device_id *id) + + static void gpu_i2c_remove(struct pci_dev *pdev) + { +- struct gpu_i2c_dev *i2cd = dev_get_drvdata(&pdev->dev); ++ struct gpu_i2c_dev *i2cd = pci_get_drvdata(pdev); + + pm_runtime_get_noresume(i2cd->dev); + i2c_del_adapter(&i2cd->adapter); +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0015-i2c-nvidia-gpu-Convert-to-use-dev_err_probe.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0015-i2c-nvidia-gpu-Convert-to-use-dev_err_probe.patch new file mode 100644 index 00000000..39b5f0c4 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0015-i2c-nvidia-gpu-Convert-to-use-dev_err_probe.patch @@ -0,0 +1,55 @@ +From 076c091b902cea51178cf8e2eed819443115358e Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Date: Wed, 5 Jan 2022 16:19:34 +0200 +Subject: [PATCH 15/48] i2c: nvidia-gpu: Convert to use dev_err_probe() + +commit c74a30ce137636d1a12abde357718e45524c2b71 upstream + +It's fine to call dev_err_probe() in ->probe() when error code is known. +Convert the driver to use dev_err_probe(). + +Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Signed-off-by: Wolfram Sang <wsa@kernel.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/i2c/busses/i2c-nvidia-gpu.c | 18 ++++++------------ + 1 file changed, 6 insertions(+), 12 deletions(-) + +diff --git a/drivers/i2c/busses/i2c-nvidia-gpu.c b/drivers/i2c/busses/i2c-nvidia-gpu.c +index a82be377146e..6920c1b9a126 100644 +--- a/drivers/i2c/busses/i2c-nvidia-gpu.c ++++ b/drivers/i2c/busses/i2c-nvidia-gpu.c +@@ -282,24 +282,18 @@ static int gpu_i2c_probe(struct pci_dev *pdev, const struct pci_device_id *id) + dev_set_drvdata(dev, i2cd); + + status = pcim_enable_device(pdev); +- if (status < 0) { +- dev_err(dev, "pcim_enable_device failed %d\n", status); +- return status; +- } ++ if (status < 0) ++ return dev_err_probe(dev, status, "pcim_enable_device failed\n"); + + pci_set_master(pdev); + + i2cd->regs = pcim_iomap(pdev, 0, 0); +- if (!i2cd->regs) { +- dev_err(dev, "pcim_iomap failed\n"); +- return -ENOMEM; +- } ++ if (!i2cd->regs) ++ return dev_err_probe(dev, -ENOMEM, "pcim_iomap failed\n"); + + status = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSI); +- if (status < 0) { +- dev_err(dev, "pci_alloc_irq_vectors err %d\n", status); +- return status; +- } ++ if (status < 0) ++ return dev_err_probe(dev, status, "pci_alloc_irq_vectors err\n"); + + gpu_enable_i2c_bus(i2cd); + +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0016-i2c-designware-pci-Switch-to-use-i2c_new_ccgx_ucsi.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0016-i2c-designware-pci-Switch-to-use-i2c_new_ccgx_ucsi.patch new file mode 100644 index 00000000..224356de --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0016-i2c-designware-pci-Switch-to-use-i2c_new_ccgx_ucsi.patch @@ -0,0 +1,88 @@ +From 1cdb0c2c2428f38bc7914c35d662bae50b018b1f Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Date: Wed, 5 Jan 2022 16:19:35 +0200 +Subject: [PATCH 16/48] i2c: designware-pci: Switch to use i2c_new_ccgx_ucsi() + +commit 531310dd5d9f78b5d9e28e742d55c775f114ad5a upstream + +Instead of open coded variant switch to use i2c_new_ccgx_ucsi(). + +Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> +Signed-off-by: Wolfram Sang <wsa@kernel.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/i2c/busses/Kconfig | 1 + + drivers/i2c/busses/i2c-designware-pcidrv.c | 30 ++++------------------ + 2 files changed, 6 insertions(+), 25 deletions(-) + +diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig +index 28d38d163a53..0d9920283c88 100644 +--- a/drivers/i2c/busses/Kconfig ++++ b/drivers/i2c/busses/Kconfig +@@ -578,6 +578,7 @@ config I2C_DESIGNWARE_PCI + tristate "Synopsys DesignWare PCI" + depends on PCI + select I2C_DESIGNWARE_CORE ++ select I2C_CCGX_UCSI + help + If you say yes to this option, support will be included for the + Synopsys DesignWare I2C adapter. Only master mode is supported. +diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c +index 5b45941bcbdd..d7945e6640ca 100644 +--- a/drivers/i2c/busses/i2c-designware-pcidrv.c ++++ b/drivers/i2c/busses/i2c-designware-pcidrv.c +@@ -24,6 +24,7 @@ + #include <linux/slab.h> + + #include "i2c-designware-core.h" ++#include "i2c-ccgx-ucsi.h" + + #define DRIVER_NAME "i2c-designware-pci" + #define AMD_CLK_RATE_HZ 100000 +@@ -118,26 +119,6 @@ static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) + return -ENODEV; + } + +- /* +- * TODO find a better way how to deduplicate instantiation +- * of USB PD slave device from nVidia GPU driver. +- */ +-static int navi_amd_register_client(struct dw_i2c_dev *dev) +-{ +- struct i2c_board_info info; +- +- memset(&info, 0, sizeof(struct i2c_board_info)); +- strscpy(info.type, "ccgx-ucsi", I2C_NAME_SIZE); +- info.addr = 0x08; +- info.irq = dev->irq; +- +- dev->slave = i2c_new_client_device(&dev->adapter, &info); +- if (IS_ERR(dev->slave)) +- return PTR_ERR(dev->slave); +- +- return 0; +-} +- + static int navi_amd_setup(struct pci_dev *pdev, struct dw_pci_controller *c) + { + struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev); +@@ -324,11 +305,10 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, + } + + if ((dev->flags & MODEL_MASK) == MODEL_AMD_NAVI_GPU) { +- r = navi_amd_register_client(dev); +- if (r) { +- dev_err(dev->dev, "register client failed with %d\n", r); +- return r; +- } ++ dev->slave = i2c_new_ccgx_ucsi(&dev->adapter, dev->irq, NULL); ++ if (IS_ERR(dev->slave)) ++ return dev_err_probe(dev->dev, PTR_ERR(dev->slave), ++ "register UCSI failed\n"); + } + + pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0018-watchdog-sp5100_tco-Add-support-for-get_timeleft.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0018-watchdog-sp5100_tco-Add-support-for-get_timeleft.patch new file mode 100644 index 00000000..7779ed86 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0018-watchdog-sp5100_tco-Add-support-for-get_timeleft.patch @@ -0,0 +1,59 @@ +From 8cb2941c5379fad3ad68a31535bd2b69c12f9ac6 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= <linux@weissschuh.net> +Date: Tue, 28 Sep 2021 08:57:35 +0200 +Subject: [PATCH 18/48] watchdog: sp5100_tco: Add support for get_timeleft +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +commit 4d3d50f607b20b309f54b988c4b67cd6dd27b6d6 upstream + +Tested on a Gigabyte X570 I AORUS PRO WIFI. + +Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Link: https://lore.kernel.org/r/20210928065735.548966-1-linux@weissschuh.net +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/watchdog/sp5100_tco.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c +index a730ecbf78cd..dd9a744f82f8 100644 +--- a/drivers/watchdog/sp5100_tco.c ++++ b/drivers/watchdog/sp5100_tco.c +@@ -10,6 +10,7 @@ + * https://www.kernelconcepts.de + * + * See AMD Publication 43009 "AMD SB700/710/750 Register Reference Guide", ++ * AMD Publication 44413 "AMD SP5100 Register Reference Guide" + * AMD Publication 45482 "AMD SB800-Series Southbridges Register + * Reference Guide" + * AMD Publication 48751 "BIOS and Kernel Developer’s Guide (BKDG) +@@ -144,6 +145,13 @@ static int tco_timer_set_timeout(struct watchdog_device *wdd, + return 0; + } + ++static unsigned int tco_timer_get_timeleft(struct watchdog_device *wdd) ++{ ++ struct sp5100_tco *tco = watchdog_get_drvdata(wdd); ++ ++ return readl(SP5100_WDT_COUNT(tco->tcobase)); ++} ++ + static u8 sp5100_tco_read_pm_reg8(u8 index) + { + outb(index, SP5100_IO_PM_INDEX_REG); +@@ -386,6 +394,7 @@ static const struct watchdog_ops sp5100_tco_wdt_ops = { + .stop = tco_timer_stop, + .ping = tco_timer_ping, + .set_timeout = tco_timer_set_timeout, ++ .get_timeleft = tco_timer_get_timeleft, + }; + + static int sp5100_tco_probe(struct platform_device *pdev) +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0027-net-amd-xgbe-Add-Support-for-Yellow-Carp-Ethernet-de.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0027-net-amd-xgbe-Add-Support-for-Yellow-Carp-Ethernet-de.patch new file mode 100644 index 00000000..d36f4515 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0027-net-amd-xgbe-Add-Support-for-Yellow-Carp-Ethernet-de.patch @@ -0,0 +1,54 @@ +From 3051c2863b2c4b51984dfadab5d0bc993ae162d8 Mon Sep 17 00:00:00 2001 +From: Raju Rangoju <Raju.Rangoju@amd.com> +Date: Mon, 20 Dec 2021 19:24:26 +0530 +Subject: [PATCH 27/48] net: amd-xgbe: Add Support for Yellow Carp Ethernet + device + +commit dbb6c58b5a61d0c26a3da65ebb728727c305c3a1 upstream + +Yellow Carp Ethernet devices use the existing PCI ID but +the window settings for the indirect PCS access have been +altered. Add the check for Yellow Carp Ethernet devices to +use the new register values. + +Co-developed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> +Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Signed-off-by: Jakub Kicinski <kuba@kernel.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-common.h | 2 ++ + drivers/net/ethernet/amd/xgbe/xgbe-pci.c | 4 ++++ + 2 files changed, 6 insertions(+) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h +index 533b8519ec35..0075939121d1 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h +@@ -898,6 +898,8 @@ + #define PCS_V2_WINDOW_SELECT 0x9064 + #define PCS_V2_RV_WINDOW_DEF 0x1060 + #define PCS_V2_RV_WINDOW_SELECT 0x1064 ++#define PCS_V2_YC_WINDOW_DEF 0x18060 ++#define PCS_V2_YC_WINDOW_SELECT 0x18064 + + /* PCS register entry bit positions and sizes */ + #define PCS_V2_WINDOW_DEF_OFFSET_INDEX 6 +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +index 014513ce00a1..6ed1eceae348 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +@@ -278,6 +278,10 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + (rdev->vendor == PCI_VENDOR_ID_AMD) && (rdev->device == 0x15d0)) { + pdata->xpcs_window_def_reg = PCS_V2_RV_WINDOW_DEF; + pdata->xpcs_window_sel_reg = PCS_V2_RV_WINDOW_SELECT; ++ } else if (rdev && (rdev->vendor == PCI_VENDOR_ID_AMD) && ++ (rdev->device == 0x14b5)) { ++ pdata->xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF; ++ pdata->xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT; + } else { + pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF; + pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT; +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0028-net-amd-xgbe-Alter-the-port-speed-bit-range.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0028-net-amd-xgbe-Alter-the-port-speed-bit-range.patch new file mode 100644 index 00000000..843936f2 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0028-net-amd-xgbe-Alter-the-port-speed-bit-range.patch @@ -0,0 +1,75 @@ +From fa98ddbdf7c804a8016488ccc98f8620149cac7b Mon Sep 17 00:00:00 2001 +From: Raju Rangoju <Raju.Rangoju@amd.com> +Date: Mon, 20 Dec 2021 19:24:27 +0530 +Subject: [PATCH 28/48] net: amd-xgbe: Alter the port speed bit range + +commit 2d4a0b79dc6194048f7aa49c38d827cd5b7db6f1 upstream + +Newer generation Hardware uses the slightly different +port speed bit widths, so alter the existing port speed +bit range to extend support to the newer generation hardware +while maintaining the backward compatibility with older +generation hardware. + +The previously reserved bits are now being used which +then requires the adjustment to the BIT values, e.g.: + +Before: + PORT_PROPERTY_0[22:21] - Reserved + PORT_PROPERTY_0[26:23] - Supported Speeds + +After: + PORT_PROPERTY_0[21] - Reserved + PORT_PROPERTY_0[26:22] - Supported Speeds + +To make this backwards compatible, the existing BIT +definitions for the port speeds are incremented by one +to maintain the original position. + +Co-developed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> +Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Signed-off-by: Jakub Kicinski <kuba@kernel.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-common.h | 4 ++-- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 8 ++++---- + 2 files changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h +index 0075939121d1..466273b22f0a 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h +@@ -1032,8 +1032,8 @@ + #define XP_PROP_0_PORT_ID_WIDTH 8 + #define XP_PROP_0_PORT_MODE_INDEX 8 + #define XP_PROP_0_PORT_MODE_WIDTH 4 +-#define XP_PROP_0_PORT_SPEEDS_INDEX 23 +-#define XP_PROP_0_PORT_SPEEDS_WIDTH 4 ++#define XP_PROP_0_PORT_SPEEDS_INDEX 22 ++#define XP_PROP_0_PORT_SPEEDS_WIDTH 5 + #define XP_PROP_1_MAX_RX_DMA_INDEX 24 + #define XP_PROP_1_MAX_RX_DMA_WIDTH 5 + #define XP_PROP_1_MAX_RX_QUEUES_INDEX 8 +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 213769054391..2156600641b6 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -124,10 +124,10 @@ + #include "xgbe.h" + #include "xgbe-common.h" + +-#define XGBE_PHY_PORT_SPEED_100 BIT(0) +-#define XGBE_PHY_PORT_SPEED_1000 BIT(1) +-#define XGBE_PHY_PORT_SPEED_2500 BIT(2) +-#define XGBE_PHY_PORT_SPEED_10000 BIT(3) ++#define XGBE_PHY_PORT_SPEED_100 BIT(1) ++#define XGBE_PHY_PORT_SPEED_1000 BIT(2) ++#define XGBE_PHY_PORT_SPEED_2500 BIT(3) ++#define XGBE_PHY_PORT_SPEED_10000 BIT(4) + + #define XGBE_MUTEX_RELEASE 0x80000000 + +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0029-net-amd-xgbe-Disable-the-CDR-workaround-path-for-Yel.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0029-net-amd-xgbe-Disable-the-CDR-workaround-path-for-Yel.patch new file mode 100644 index 00000000..5988d863 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0029-net-amd-xgbe-Disable-the-CDR-workaround-path-for-Yel.patch @@ -0,0 +1,55 @@ +From bdcf692dd43d4956951d5e0a699fb7c1420d1006 Mon Sep 17 00:00:00 2001 +From: Raju Rangoju <Raju.Rangoju@amd.com> +Date: Mon, 20 Dec 2021 19:24:28 +0530 +Subject: [PATCH 29/48] net: amd-xgbe: Disable the CDR workaround path for + Yellow Carp Devices + +commit 6f60ecf233f9a8c6b75c08f4133865dbe0f1fdab upstream + +Yellow Carp Ethernet devices do not require +Autonegotiation CDR workaround, hence disable the same. + +Co-developed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> +Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Signed-off-by: Jakub Kicinski <kuba@kernel.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-pci.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +index 6ed1eceae348..2af3da4b2d05 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +@@ -282,6 +282,9 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + (rdev->device == 0x14b5)) { + pdata->xpcs_window_def_reg = PCS_V2_YC_WINDOW_DEF; + pdata->xpcs_window_sel_reg = PCS_V2_YC_WINDOW_SELECT; ++ ++ /* Yellow Carp devices do not need cdr workaround */ ++ pdata->vdata->an_cdr_workaround = 0; + } else { + pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF; + pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT; +@@ -467,7 +470,7 @@ static int __maybe_unused xgbe_pci_resume(struct device *dev) + return ret; + } + +-static const struct xgbe_version_data xgbe_v2a = { ++static struct xgbe_version_data xgbe_v2a = { + .init_function_ptrs_phy_impl = xgbe_init_function_ptrs_phy_v2, + .xpcs_access = XGBE_XPCS_ACCESS_V2, + .mmc_64bit = 1, +@@ -482,7 +485,7 @@ static const struct xgbe_version_data xgbe_v2a = { + .an_cdr_workaround = 1, + }; + +-static const struct xgbe_version_data xgbe_v2b = { ++static struct xgbe_version_data xgbe_v2b = { + .init_function_ptrs_phy_impl = xgbe_init_function_ptrs_phy_v2, + .xpcs_access = XGBE_XPCS_ACCESS_V2, + .mmc_64bit = 1, +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0030-hwmon-k10temp-Remove-unused-definitions.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0030-hwmon-k10temp-Remove-unused-definitions.patch new file mode 100644 index 00000000..70d2682d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0030-hwmon-k10temp-Remove-unused-definitions.patch @@ -0,0 +1,53 @@ +From 35327d14d5a63b545f84a28b5b719c547024ccde Mon Sep 17 00:00:00 2001 +From: Babu Moger <babu.moger@amd.com> +Date: Mon, 8 Nov 2021 15:51:27 -0600 +Subject: [PATCH 30/86] hwmon: (k10temp) Remove unused definitions + +commit f707bcb5d1cb4c47d27c688c859dcdb70e3c7065 upstream + +Usage of these definitions were removed after the commit 0a4e668b5d52 +("hwmon: (k10temp) Remove support for displaying voltage and current on Zen CPUs"). +So, cleanup them up. + +Signed-off-by: Babu Moger <babu.moger@amd.com> +Link: https://lore.kernel.org/r/163640828776.955062.15863375803675701204.stgit@bmoger-ubuntu +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/hwmon/k10temp.c | 20 -------------------- + 1 file changed, 20 deletions(-) + +diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c +index 3618a924e78e..662bad7ed0a2 100644 +--- a/drivers/hwmon/k10temp.c ++++ b/drivers/hwmon/k10temp.c +@@ -76,26 +76,6 @@ static DEFINE_MUTEX(nb_smu_ind_mutex); + #define ZEN_CUR_TEMP_SHIFT 21 + #define ZEN_CUR_TEMP_RANGE_SEL_MASK BIT(19) + +-#define ZEN_SVI_BASE 0x0005A000 +- +-/* F17h thermal registers through SMN */ +-#define F17H_M01H_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0xc) +-#define F17H_M01H_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0x10) +-#define F17H_M31H_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0x14) +-#define F17H_M31H_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0x10) +- +-#define F17H_M01H_CFACTOR_ICORE 1000000 /* 1A / LSB */ +-#define F17H_M01H_CFACTOR_ISOC 250000 /* 0.25A / LSB */ +-#define F17H_M31H_CFACTOR_ICORE 1000000 /* 1A / LSB */ +-#define F17H_M31H_CFACTOR_ISOC 310000 /* 0.31A / LSB */ +- +-/* F19h thermal registers through SMN */ +-#define F19H_M01_SVI_TEL_PLANE0 (ZEN_SVI_BASE + 0x14) +-#define F19H_M01_SVI_TEL_PLANE1 (ZEN_SVI_BASE + 0x10) +- +-#define F19H_M01H_CFACTOR_ICORE 1000000 /* 1A / LSB */ +-#define F19H_M01H_CFACTOR_ISOC 310000 /* 0.31A / LSB */ +- + struct k10temp_data { + struct pci_dev *pdev; + void (*read_htcreg)(struct pci_dev *pdev, u32 *regval); +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0031-x86-amd_nb-Add-AMD-Family-19h-Models-10h-1Fh-and-A0h.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0031-x86-amd_nb-Add-AMD-Family-19h-Models-10h-1Fh-and-A0h.patch new file mode 100644 index 00000000..542e9cc2 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0031-x86-amd_nb-Add-AMD-Family-19h-Models-10h-1Fh-and-A0h.patch @@ -0,0 +1,85 @@ +From 5a251a1e31b09cac3bab92aa2a9d1e0790cc1744 Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Mon, 8 Nov 2021 15:51:21 -0600 +Subject: [PATCH 31/86] x86/amd_nb: Add AMD Family 19h Models (10h-1Fh) and + (A0h-AFh) PCI IDs +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +commit 4fb0abfee424b05f0ec6d2d09e38f04ee2b82a8a upstream + +Add the new PCI Device IDs to support new generation of AMD 19h family of +processors. + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Babu Moger <babu.moger@amd.com> +Acked-by: Krzysztof WilczyÅ„ski <kw@linux.com> +Acked-by: Borislav Petkov <bp@suse.de> +Acked-by: Bjorn Helgaas <bhelgaas@google.com> # pci_ids.h +Link: https://lore.kernel.org/r/163640828133.955062.18349019796157170473.stgit@bmoger-ubuntu +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/kernel/amd_nb.c | 5 +++++ + include/linux/pci_ids.h | 1 + + 2 files changed, 6 insertions(+) + +diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c +index c92c9c774c0e..f3e885f3dd0f 100644 +--- a/arch/x86/kernel/amd_nb.c ++++ b/arch/x86/kernel/amd_nb.c +@@ -19,12 +19,14 @@ + #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0 + #define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480 + #define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630 ++#define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4 + #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464 + #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec + #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494 + #define PCI_DEVICE_ID_AMD_17H_M60H_DF_F4 0x144c + #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444 + #define PCI_DEVICE_ID_AMD_19H_DF_F4 0x1654 ++#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F4 0x14b1 + #define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5 + #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d + #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e +@@ -39,6 +41,7 @@ static const struct pci_device_id amd_root_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_ROOT) }, ++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_ROOT) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) }, + {} + }; +@@ -61,6 +64,7 @@ static const struct pci_device_id amd_nb_misc_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) }, ++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) }, + {} +@@ -78,6 +82,7 @@ static const struct pci_device_id amd_nb_link_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F4) }, ++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, +diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h +index 04f44a4694a2..ac19b3358b9a 100644 +--- a/include/linux/pci_ids.h ++++ b/include/linux/pci_ids.h +@@ -557,6 +557,7 @@ + #define PCI_DEVICE_ID_AMD_17H_M60H_DF_F3 0x144b + #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443 + #define PCI_DEVICE_ID_AMD_19H_DF_F3 0x1653 ++#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F3 0x14b0 + #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F3 0x167c + #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F3 0x166d + #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703 +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0032-hwmon-k10temp-Add-support-for-AMD-Family-19h-Models-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0032-hwmon-k10temp-Add-support-for-AMD-Family-19h-Models-.patch new file mode 100644 index 00000000..f83860d7 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0032-hwmon-k10temp-Add-support-for-AMD-Family-19h-Models-.patch @@ -0,0 +1,44 @@ +From 0ca5ca4cd07550c4860eeaf2616921be943b2917 Mon Sep 17 00:00:00 2001 +From: Babu Moger <babu.moger@amd.com> +Date: Mon, 8 Nov 2021 15:51:34 -0600 +Subject: [PATCH 32/86] hwmon: (k10temp) Add support for AMD Family 19h Models + 10h-1Fh and A0h-AFh + +commit 3cf90efa13678d2de2f9f7e44e26353996db842a upstream + +Add thermal info support for AMD Family 19h Models 10h-1Fh and A0h-AFh. +Thermal info is supported via a new PCI device ID at offset 0x300h. + +Signed-off-by: Babu Moger <babu.moger@amd.com> +Link: https://lore.kernel.org/r/163640829419.955062.12539219969781039915.stgit@bmoger-ubuntu +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/hwmon/k10temp.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c +index 662bad7ed0a2..880990fa4795 100644 +--- a/drivers/hwmon/k10temp.c ++++ b/drivers/hwmon/k10temp.c +@@ -433,7 +433,9 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id) + data->ccd_offset = 0x154; + k10temp_get_ccd_support(pdev, data, 8); + break; ++ case 0x10 ... 0x1f: + case 0x40 ... 0x4f: /* Yellow Carp */ ++ case 0xa0 ... 0xaf: + data->ccd_offset = 0x300; + k10temp_get_ccd_support(pdev, data, 8); + break; +@@ -477,6 +479,7 @@ static const struct pci_device_id k10temp_id_table[] = { + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F3) }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) }, ++ { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) }, + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) }, + { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) }, +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0033-hwmon-k10temp-Support-up-to-12-CCDs-on-AMD-Family-of.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0033-hwmon-k10temp-Support-up-to-12-CCDs-on-AMD-Family-of.patch new file mode 100644 index 00000000..e006a98f --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0033-hwmon-k10temp-Support-up-to-12-CCDs-on-AMD-Family-of.patch @@ -0,0 +1,78 @@ +From 493012fff01be5754e2b482af315e7a78fc42a69 Mon Sep 17 00:00:00 2001 +From: Babu Moger <babu.moger@amd.com> +Date: Wed, 24 Nov 2021 10:03:13 -0600 +Subject: [PATCH 33/86] hwmon: (k10temp) Support up to 12 CCDs on AMD Family of + processors + +commit 8bb050cd5cf494f3d0cb45a6b54a476af09edb8d upstream + +The current driver can read the temperatures from upto 8 CCDs +(Core-Complex Die). + +The newer AMD Family 19h Models 10h-1Fh and A0h-AFh can support up to +12 CCDs. Update the driver to read up to 12 CCDs. + +Signed-off-by: Babu Moger <babu.moger@amd.com> +Link: https://lore.kernel.org/r/163776976762.904164.5618896687524494215.stgit@bmoger-ubuntu +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/hwmon/k10temp.c | 17 ++++++++++++++--- + 1 file changed, 14 insertions(+), 3 deletions(-) + +diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c +index 880990fa4795..4e239bd75b1d 100644 +--- a/drivers/hwmon/k10temp.c ++++ b/drivers/hwmon/k10temp.c +@@ -171,6 +171,10 @@ static const char *k10temp_temp_label[] = { + "Tccd6", + "Tccd7", + "Tccd8", ++ "Tccd9", ++ "Tccd10", ++ "Tccd11", ++ "Tccd12", + }; + + static int k10temp_read_labels(struct device *dev, +@@ -206,7 +210,7 @@ static int k10temp_read_temp(struct device *dev, u32 attr, int channel, + if (*val < 0) + *val = 0; + break; +- case 2 ... 9: /* Tccd{1-8} */ ++ case 2 ... 13: /* Tccd{1-12} */ + amd_smn_read(amd_pci_dev_to_node_id(data->pdev), + ZEN_CCD_TEMP(data->ccd_offset, channel - 2), + ®val); +@@ -341,6 +345,10 @@ static const struct hwmon_channel_info *k10temp_info[] = { + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL, ++ HWMON_T_INPUT | HWMON_T_LABEL, ++ HWMON_T_INPUT | HWMON_T_LABEL, ++ HWMON_T_INPUT | HWMON_T_LABEL, ++ HWMON_T_INPUT | HWMON_T_LABEL, + HWMON_T_INPUT | HWMON_T_LABEL), + NULL + }; +@@ -433,12 +441,15 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id) + data->ccd_offset = 0x154; + k10temp_get_ccd_support(pdev, data, 8); + break; +- case 0x10 ... 0x1f: + case 0x40 ... 0x4f: /* Yellow Carp */ +- case 0xa0 ... 0xaf: + data->ccd_offset = 0x300; + k10temp_get_ccd_support(pdev, data, 8); + break; ++ case 0x10 ... 0x1f: ++ case 0xa0 ... 0xaf: ++ data->ccd_offset = 0x300; ++ k10temp_get_ccd_support(pdev, data, 12); ++ break; + } + } else { + data->read_htcreg = read_htcreg_pci; +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0034-x86-MCE-AMD-Export-smca_get_bank_type-symbol.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0034-x86-MCE-AMD-Export-smca_get_bank_type-symbol.patch new file mode 100644 index 00000000..97911cda --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0034-x86-MCE-AMD-Export-smca_get_bank_type-symbol.patch @@ -0,0 +1,57 @@ +From 134df742d5931a219033b89ff29a28d1ae09e818 Mon Sep 17 00:00:00 2001 +From: Mukul Joshi <mukul.joshi@amd.com> +Date: Sat, 27 Mar 2021 22:54:04 -0400 +Subject: [PATCH 34/86] x86/MCE/AMD: Export smca_get_bank_type symbol + +commit f38ce910d8dfb7da439d0578d4b97259168306cd upstream + +Export smca_get_bank_type for use in the AMD GPU +driver to determine MCA bank while handling correctable +and uncorrectable errors in GPU UMC. + +Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> +Acked-by: Borislav Petkov <bp@suse.de> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/mce.h | 2 +- + arch/x86/kernel/cpu/mce/amd.c | 3 ++- + 2 files changed, 3 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h +index da9321548f6f..d69f716d8bc5 100644 +--- a/arch/x86/include/asm/mce.h ++++ b/arch/x86/include/asm/mce.h +@@ -358,7 +358,7 @@ extern int mce_threshold_remove_device(unsigned int cpu); + + void mce_amd_feature_init(struct cpuinfo_x86 *c); + int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr); +- ++enum smca_bank_types smca_get_bank_type(unsigned int bank); + #else + + static inline int mce_threshold_create_device(unsigned int cpu) { return 0; }; +diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c +index a873577e49dc..9f517009fd19 100644 +--- a/arch/x86/kernel/cpu/mce/amd.c ++++ b/arch/x86/kernel/cpu/mce/amd.c +@@ -119,7 +119,7 @@ const char *smca_get_long_name(enum smca_bank_types t) + } + EXPORT_SYMBOL_GPL(smca_get_long_name); + +-static enum smca_bank_types smca_get_bank_type(unsigned int bank) ++enum smca_bank_types smca_get_bank_type(unsigned int bank) + { + struct smca_bank *b; + +@@ -132,6 +132,7 @@ static enum smca_bank_types smca_get_bank_type(unsigned int bank) + + return b->hwid->bank_type; + } ++EXPORT_SYMBOL_GPL(smca_get_bank_type); + + static struct smca_hwid smca_hwid_mcatypes[] = { + /* { bank_type, hwid_mcatype } */ +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0035-x86-MCE-AMD-EDAC-amd64-Move-address-translation-to-A.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0035-x86-MCE-AMD-EDAC-amd64-Move-address-translation-to-A.patch new file mode 100644 index 00000000..5b2343e0 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0035-x86-MCE-AMD-EDAC-amd64-Move-address-translation-to-A.patch @@ -0,0 +1,466 @@ +From 8fe584b1af57f36e362a89c66d73f5273b8cd732 Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Thu, 28 Oct 2021 17:56:56 +0000 +Subject: [PATCH 35/86] x86/MCE/AMD, EDAC/amd64: Move address translation to + AMD64 EDAC + +commit 0b746e8c1e1e3fcc9e4036efe8d3ea3fd3e5d4c3 upstream + +The address translation code used for current AMD systems is +non-architectural. So move it to EDAC. + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Link: https://lkml.kernel.org/r/20211028175728.121452-2-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/mce.h | 3 - + arch/x86/kernel/cpu/mce/amd.c | 200 ---------------------------------- + drivers/edac/amd64_edac.c | 199 +++++++++++++++++++++++++++++++++ + 3 files changed, 199 insertions(+), 203 deletions(-) + +diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h +index d69f716d8bc5..4857d962f0fb 100644 +--- a/arch/x86/include/asm/mce.h ++++ b/arch/x86/include/asm/mce.h +@@ -357,7 +357,6 @@ extern int mce_threshold_create_device(unsigned int cpu); + extern int mce_threshold_remove_device(unsigned int cpu); + + void mce_amd_feature_init(struct cpuinfo_x86 *c); +-int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr); + enum smca_bank_types smca_get_bank_type(unsigned int bank); + #else + +@@ -365,8 +364,6 @@ static inline int mce_threshold_create_device(unsigned int cpu) { return 0; }; + static inline int mce_threshold_remove_device(unsigned int cpu) { return 0; }; + static inline bool amd_mce_is_memory_error(struct mce *m) { return false; }; + static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { } +-static inline int +-umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) { return -EINVAL; }; + #endif + + static inline void mce_hygon_feature_init(struct cpuinfo_x86 *c) { return mce_amd_feature_init(c); } +diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c +index 9f517009fd19..c0156c547e46 100644 +--- a/arch/x86/kernel/cpu/mce/amd.c ++++ b/arch/x86/kernel/cpu/mce/amd.c +@@ -689,206 +689,6 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c) + deferred_error_interrupt_enable(c); + } + +-int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) +-{ +- u64 dram_base_addr, dram_limit_addr, dram_hole_base; +- /* We start from the normalized address */ +- u64 ret_addr = norm_addr; +- +- u32 tmp; +- +- u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask; +- u8 intlv_num_dies, intlv_num_chan, intlv_num_sockets; +- u8 intlv_addr_sel, intlv_addr_bit; +- u8 num_intlv_bits, hashed_bit; +- u8 lgcy_mmio_hole_en, base = 0; +- u8 cs_mask, cs_id = 0; +- bool hash_enabled = false; +- +- /* Read D18F0x1B4 (DramOffset), check if base 1 is used. */ +- if (amd_df_indirect_read(nid, 0, 0x1B4, umc, &tmp)) +- goto out_err; +- +- /* Remove HiAddrOffset from normalized address, if enabled: */ +- if (tmp & BIT(0)) { +- u64 hi_addr_offset = (tmp & GENMASK_ULL(31, 20)) << 8; +- +- if (norm_addr >= hi_addr_offset) { +- ret_addr -= hi_addr_offset; +- base = 1; +- } +- } +- +- /* Read D18F0x110 (DramBaseAddress). */ +- if (amd_df_indirect_read(nid, 0, 0x110 + (8 * base), umc, &tmp)) +- goto out_err; +- +- /* Check if address range is valid. */ +- if (!(tmp & BIT(0))) { +- pr_err("%s: Invalid DramBaseAddress range: 0x%x.\n", +- __func__, tmp); +- goto out_err; +- } +- +- lgcy_mmio_hole_en = tmp & BIT(1); +- intlv_num_chan = (tmp >> 4) & 0xF; +- intlv_addr_sel = (tmp >> 8) & 0x7; +- dram_base_addr = (tmp & GENMASK_ULL(31, 12)) << 16; +- +- /* {0, 1, 2, 3} map to address bits {8, 9, 10, 11} respectively */ +- if (intlv_addr_sel > 3) { +- pr_err("%s: Invalid interleave address select %d.\n", +- __func__, intlv_addr_sel); +- goto out_err; +- } +- +- /* Read D18F0x114 (DramLimitAddress). */ +- if (amd_df_indirect_read(nid, 0, 0x114 + (8 * base), umc, &tmp)) +- goto out_err; +- +- intlv_num_sockets = (tmp >> 8) & 0x1; +- intlv_num_dies = (tmp >> 10) & 0x3; +- dram_limit_addr = ((tmp & GENMASK_ULL(31, 12)) << 16) | GENMASK_ULL(27, 0); +- +- intlv_addr_bit = intlv_addr_sel + 8; +- +- /* Re-use intlv_num_chan by setting it equal to log2(#channels) */ +- switch (intlv_num_chan) { +- case 0: intlv_num_chan = 0; break; +- case 1: intlv_num_chan = 1; break; +- case 3: intlv_num_chan = 2; break; +- case 5: intlv_num_chan = 3; break; +- case 7: intlv_num_chan = 4; break; +- +- case 8: intlv_num_chan = 1; +- hash_enabled = true; +- break; +- default: +- pr_err("%s: Invalid number of interleaved channels %d.\n", +- __func__, intlv_num_chan); +- goto out_err; +- } +- +- num_intlv_bits = intlv_num_chan; +- +- if (intlv_num_dies > 2) { +- pr_err("%s: Invalid number of interleaved nodes/dies %d.\n", +- __func__, intlv_num_dies); +- goto out_err; +- } +- +- num_intlv_bits += intlv_num_dies; +- +- /* Add a bit if sockets are interleaved. */ +- num_intlv_bits += intlv_num_sockets; +- +- /* Assert num_intlv_bits <= 4 */ +- if (num_intlv_bits > 4) { +- pr_err("%s: Invalid interleave bits %d.\n", +- __func__, num_intlv_bits); +- goto out_err; +- } +- +- if (num_intlv_bits > 0) { +- u64 temp_addr_x, temp_addr_i, temp_addr_y; +- u8 die_id_bit, sock_id_bit, cs_fabric_id; +- +- /* +- * Read FabricBlockInstanceInformation3_CS[BlockFabricID]. +- * This is the fabric id for this coherent slave. Use +- * umc/channel# as instance id of the coherent slave +- * for FICAA. +- */ +- if (amd_df_indirect_read(nid, 0, 0x50, umc, &tmp)) +- goto out_err; +- +- cs_fabric_id = (tmp >> 8) & 0xFF; +- die_id_bit = 0; +- +- /* If interleaved over more than 1 channel: */ +- if (intlv_num_chan) { +- die_id_bit = intlv_num_chan; +- cs_mask = (1 << die_id_bit) - 1; +- cs_id = cs_fabric_id & cs_mask; +- } +- +- sock_id_bit = die_id_bit; +- +- /* Read D18F1x208 (SystemFabricIdMask). */ +- if (intlv_num_dies || intlv_num_sockets) +- if (amd_df_indirect_read(nid, 1, 0x208, umc, &tmp)) +- goto out_err; +- +- /* If interleaved over more than 1 die. */ +- if (intlv_num_dies) { +- sock_id_bit = die_id_bit + intlv_num_dies; +- die_id_shift = (tmp >> 24) & 0xF; +- die_id_mask = (tmp >> 8) & 0xFF; +- +- cs_id |= ((cs_fabric_id & die_id_mask) >> die_id_shift) << die_id_bit; +- } +- +- /* If interleaved over more than 1 socket. */ +- if (intlv_num_sockets) { +- socket_id_shift = (tmp >> 28) & 0xF; +- socket_id_mask = (tmp >> 16) & 0xFF; +- +- cs_id |= ((cs_fabric_id & socket_id_mask) >> socket_id_shift) << sock_id_bit; +- } +- +- /* +- * The pre-interleaved address consists of XXXXXXIIIYYYYY +- * where III is the ID for this CS, and XXXXXXYYYYY are the +- * address bits from the post-interleaved address. +- * "num_intlv_bits" has been calculated to tell us how many "I" +- * bits there are. "intlv_addr_bit" tells us how many "Y" bits +- * there are (where "I" starts). +- */ +- temp_addr_y = ret_addr & GENMASK_ULL(intlv_addr_bit-1, 0); +- temp_addr_i = (cs_id << intlv_addr_bit); +- temp_addr_x = (ret_addr & GENMASK_ULL(63, intlv_addr_bit)) << num_intlv_bits; +- ret_addr = temp_addr_x | temp_addr_i | temp_addr_y; +- } +- +- /* Add dram base address */ +- ret_addr += dram_base_addr; +- +- /* If legacy MMIO hole enabled */ +- if (lgcy_mmio_hole_en) { +- if (amd_df_indirect_read(nid, 0, 0x104, umc, &tmp)) +- goto out_err; +- +- dram_hole_base = tmp & GENMASK(31, 24); +- if (ret_addr >= dram_hole_base) +- ret_addr += (BIT_ULL(32) - dram_hole_base); +- } +- +- if (hash_enabled) { +- /* Save some parentheses and grab ls-bit at the end. */ +- hashed_bit = (ret_addr >> 12) ^ +- (ret_addr >> 18) ^ +- (ret_addr >> 21) ^ +- (ret_addr >> 30) ^ +- cs_id; +- +- hashed_bit &= BIT(0); +- +- if (hashed_bit != ((ret_addr >> intlv_addr_bit) & BIT(0))) +- ret_addr ^= BIT(intlv_addr_bit); +- } +- +- /* Is calculated system address is above DRAM limit address? */ +- if (ret_addr > dram_limit_addr) +- goto out_err; +- +- *sys_addr = ret_addr; +- return 0; +- +-out_err: +- return -EINVAL; +-} +-EXPORT_SYMBOL_GPL(umc_normaddr_to_sysaddr); +- + bool amd_mce_is_memory_error(struct mce *m) + { + /* ErrCodeExt[20:16] */ +diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c +index 4fce75013674..d2ad9f06abb7 100644 +--- a/drivers/edac/amd64_edac.c ++++ b/drivers/edac/amd64_edac.c +@@ -988,6 +988,205 @@ static int sys_addr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr) + return csrow; + } + ++static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) ++{ ++ u64 dram_base_addr, dram_limit_addr, dram_hole_base; ++ /* We start from the normalized address */ ++ u64 ret_addr = norm_addr; ++ ++ u32 tmp; ++ ++ u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask; ++ u8 intlv_num_dies, intlv_num_chan, intlv_num_sockets; ++ u8 intlv_addr_sel, intlv_addr_bit; ++ u8 num_intlv_bits, hashed_bit; ++ u8 lgcy_mmio_hole_en, base = 0; ++ u8 cs_mask, cs_id = 0; ++ bool hash_enabled = false; ++ ++ /* Read D18F0x1B4 (DramOffset), check if base 1 is used. */ ++ if (amd_df_indirect_read(nid, 0, 0x1B4, umc, &tmp)) ++ goto out_err; ++ ++ /* Remove HiAddrOffset from normalized address, if enabled: */ ++ if (tmp & BIT(0)) { ++ u64 hi_addr_offset = (tmp & GENMASK_ULL(31, 20)) << 8; ++ ++ if (norm_addr >= hi_addr_offset) { ++ ret_addr -= hi_addr_offset; ++ base = 1; ++ } ++ } ++ ++ /* Read D18F0x110 (DramBaseAddress). */ ++ if (amd_df_indirect_read(nid, 0, 0x110 + (8 * base), umc, &tmp)) ++ goto out_err; ++ ++ /* Check if address range is valid. */ ++ if (!(tmp & BIT(0))) { ++ pr_err("%s: Invalid DramBaseAddress range: 0x%x.\n", ++ __func__, tmp); ++ goto out_err; ++ } ++ ++ lgcy_mmio_hole_en = tmp & BIT(1); ++ intlv_num_chan = (tmp >> 4) & 0xF; ++ intlv_addr_sel = (tmp >> 8) & 0x7; ++ dram_base_addr = (tmp & GENMASK_ULL(31, 12)) << 16; ++ ++ /* {0, 1, 2, 3} map to address bits {8, 9, 10, 11} respectively */ ++ if (intlv_addr_sel > 3) { ++ pr_err("%s: Invalid interleave address select %d.\n", ++ __func__, intlv_addr_sel); ++ goto out_err; ++ } ++ ++ /* Read D18F0x114 (DramLimitAddress). */ ++ if (amd_df_indirect_read(nid, 0, 0x114 + (8 * base), umc, &tmp)) ++ goto out_err; ++ ++ intlv_num_sockets = (tmp >> 8) & 0x1; ++ intlv_num_dies = (tmp >> 10) & 0x3; ++ dram_limit_addr = ((tmp & GENMASK_ULL(31, 12)) << 16) | GENMASK_ULL(27, 0); ++ ++ intlv_addr_bit = intlv_addr_sel + 8; ++ ++ /* Re-use intlv_num_chan by setting it equal to log2(#channels) */ ++ switch (intlv_num_chan) { ++ case 0: intlv_num_chan = 0; break; ++ case 1: intlv_num_chan = 1; break; ++ case 3: intlv_num_chan = 2; break; ++ case 5: intlv_num_chan = 3; break; ++ case 7: intlv_num_chan = 4; break; ++ ++ case 8: intlv_num_chan = 1; ++ hash_enabled = true; ++ break; ++ default: ++ pr_err("%s: Invalid number of interleaved channels %d.\n", ++ __func__, intlv_num_chan); ++ goto out_err; ++ } ++ ++ num_intlv_bits = intlv_num_chan; ++ ++ if (intlv_num_dies > 2) { ++ pr_err("%s: Invalid number of interleaved nodes/dies %d.\n", ++ __func__, intlv_num_dies); ++ goto out_err; ++ } ++ ++ num_intlv_bits += intlv_num_dies; ++ ++ /* Add a bit if sockets are interleaved. */ ++ num_intlv_bits += intlv_num_sockets; ++ ++ /* Assert num_intlv_bits <= 4 */ ++ if (num_intlv_bits > 4) { ++ pr_err("%s: Invalid interleave bits %d.\n", ++ __func__, num_intlv_bits); ++ goto out_err; ++ } ++ ++ if (num_intlv_bits > 0) { ++ u64 temp_addr_x, temp_addr_i, temp_addr_y; ++ u8 die_id_bit, sock_id_bit, cs_fabric_id; ++ ++ /* ++ * Read FabricBlockInstanceInformation3_CS[BlockFabricID]. ++ * This is the fabric id for this coherent slave. Use ++ * umc/channel# as instance id of the coherent slave ++ * for FICAA. ++ */ ++ if (amd_df_indirect_read(nid, 0, 0x50, umc, &tmp)) ++ goto out_err; ++ ++ cs_fabric_id = (tmp >> 8) & 0xFF; ++ die_id_bit = 0; ++ ++ /* If interleaved over more than 1 channel: */ ++ if (intlv_num_chan) { ++ die_id_bit = intlv_num_chan; ++ cs_mask = (1 << die_id_bit) - 1; ++ cs_id = cs_fabric_id & cs_mask; ++ } ++ ++ sock_id_bit = die_id_bit; ++ ++ /* Read D18F1x208 (SystemFabricIdMask). */ ++ if (intlv_num_dies || intlv_num_sockets) ++ if (amd_df_indirect_read(nid, 1, 0x208, umc, &tmp)) ++ goto out_err; ++ ++ /* If interleaved over more than 1 die. */ ++ if (intlv_num_dies) { ++ sock_id_bit = die_id_bit + intlv_num_dies; ++ die_id_shift = (tmp >> 24) & 0xF; ++ die_id_mask = (tmp >> 8) & 0xFF; ++ ++ cs_id |= ((cs_fabric_id & die_id_mask) >> die_id_shift) << die_id_bit; ++ } ++ ++ /* If interleaved over more than 1 socket. */ ++ if (intlv_num_sockets) { ++ socket_id_shift = (tmp >> 28) & 0xF; ++ socket_id_mask = (tmp >> 16) & 0xFF; ++ ++ cs_id |= ((cs_fabric_id & socket_id_mask) >> socket_id_shift) << sock_id_bit; ++ } ++ ++ /* ++ * The pre-interleaved address consists of XXXXXXIIIYYYYY ++ * where III is the ID for this CS, and XXXXXXYYYYY are the ++ * address bits from the post-interleaved address. ++ * "num_intlv_bits" has been calculated to tell us how many "I" ++ * bits there are. "intlv_addr_bit" tells us how many "Y" bits ++ * there are (where "I" starts). ++ */ ++ temp_addr_y = ret_addr & GENMASK_ULL(intlv_addr_bit-1, 0); ++ temp_addr_i = (cs_id << intlv_addr_bit); ++ temp_addr_x = (ret_addr & GENMASK_ULL(63, intlv_addr_bit)) << num_intlv_bits; ++ ret_addr = temp_addr_x | temp_addr_i | temp_addr_y; ++ } ++ ++ /* Add dram base address */ ++ ret_addr += dram_base_addr; ++ ++ /* If legacy MMIO hole enabled */ ++ if (lgcy_mmio_hole_en) { ++ if (amd_df_indirect_read(nid, 0, 0x104, umc, &tmp)) ++ goto out_err; ++ ++ dram_hole_base = tmp & GENMASK(31, 24); ++ if (ret_addr >= dram_hole_base) ++ ret_addr += (BIT_ULL(32) - dram_hole_base); ++ } ++ ++ if (hash_enabled) { ++ /* Save some parentheses and grab ls-bit at the end. */ ++ hashed_bit = (ret_addr >> 12) ^ ++ (ret_addr >> 18) ^ ++ (ret_addr >> 21) ^ ++ (ret_addr >> 30) ^ ++ cs_id; ++ ++ hashed_bit &= BIT(0); ++ ++ if (hashed_bit != ((ret_addr >> intlv_addr_bit) & BIT(0))) ++ ret_addr ^= BIT(intlv_addr_bit); ++ } ++ ++ /* Is calculated system address is above DRAM limit address? */ ++ if (ret_addr > dram_limit_addr) ++ goto out_err; ++ ++ *sys_addr = ret_addr; ++ return 0; ++ ++out_err: ++ return -EINVAL; ++} ++ + static int get_channel_from_ecc_syndrome(struct mem_ctl_info *, u16); + + /* +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0036-x86-amd_nb-EDAC-amd64-Move-DF-Indirect-Read-to-AMD64.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0036-x86-amd_nb-EDAC-amd64-Move-DF-Indirect-Read-to-AMD64.patch new file mode 100644 index 00000000..b3805f9e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0036-x86-amd_nb-EDAC-amd64-Move-DF-Indirect-Read-to-AMD64.patch @@ -0,0 +1,164 @@ +From 6d1d842224433aa24637a7ae1b45273137be379b Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Thu, 28 Oct 2021 17:56:57 +0000 +Subject: [PATCH 36/86] x86/amd_nb, EDAC/amd64: Move DF Indirect Read to AMD64 + EDAC + +commit b3218ae47771f943b3e222f35fc46afacba39929 upstream + +df_indirect_read() is used only for address translation. Move it to EDAC +along with the translation code. + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Link: https://lkml.kernel.org/r/20211028175728.121452-3-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/amd_nb.h | 1 - + arch/x86/kernel/amd_nb.c | 49 +--------------------------------- + drivers/edac/amd64_edac.c | 50 +++++++++++++++++++++++++++++++++++ + 3 files changed, 51 insertions(+), 49 deletions(-) + +diff --git a/arch/x86/include/asm/amd_nb.h b/arch/x86/include/asm/amd_nb.h +index 455066a06f60..00d1a400b7a1 100644 +--- a/arch/x86/include/asm/amd_nb.h ++++ b/arch/x86/include/asm/amd_nb.h +@@ -24,7 +24,6 @@ extern int amd_set_subcaches(int, unsigned long); + + extern int amd_smn_read(u16 node, u32 address, u32 *value); + extern int amd_smn_write(u16 node, u32 address, u32 value); +-extern int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo); + + struct amd_l3_cache { + unsigned indices; +diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c +index f3e885f3dd0f..020c906f7934 100644 +--- a/arch/x86/kernel/amd_nb.c ++++ b/arch/x86/kernel/amd_nb.c +@@ -31,7 +31,7 @@ + #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d + #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e + +-/* Protect the PCI config register pairs used for SMN and DF indirect access. */ ++/* Protect the PCI config register pairs used for SMN. */ + static DEFINE_MUTEX(smn_mutex); + + static u32 *flush_words; +@@ -187,53 +187,6 @@ int amd_smn_write(u16 node, u32 address, u32 value) + } + EXPORT_SYMBOL_GPL(amd_smn_write); + +-/* +- * Data Fabric Indirect Access uses FICAA/FICAD. +- * +- * Fabric Indirect Configuration Access Address (FICAA): Constructed based +- * on the device's Instance Id and the PCI function and register offset of +- * the desired register. +- * +- * Fabric Indirect Configuration Access Data (FICAD): There are FICAD LO +- * and FICAD HI registers but so far we only need the LO register. +- */ +-int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo) +-{ +- struct pci_dev *F4; +- u32 ficaa; +- int err = -ENODEV; +- +- if (node >= amd_northbridges.num) +- goto out; +- +- F4 = node_to_amd_nb(node)->link; +- if (!F4) +- goto out; +- +- ficaa = 1; +- ficaa |= reg & 0x3FC; +- ficaa |= (func & 0x7) << 11; +- ficaa |= instance_id << 16; +- +- mutex_lock(&smn_mutex); +- +- err = pci_write_config_dword(F4, 0x5C, ficaa); +- if (err) { +- pr_warn("Error writing DF Indirect FICAA, FICAA=0x%x\n", ficaa); +- goto out_unlock; +- } +- +- err = pci_read_config_dword(F4, 0x98, lo); +- if (err) +- pr_warn("Error reading DF Indirect FICAD LO, FICAA=0x%x.\n", ficaa); +- +-out_unlock: +- mutex_unlock(&smn_mutex); +- +-out: +- return err; +-} +-EXPORT_SYMBOL_GPL(amd_df_indirect_read); + + int amd_cache_northbridges(void) + { +diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c +index d2ad9f06abb7..034d9863bcf9 100644 +--- a/drivers/edac/amd64_edac.c ++++ b/drivers/edac/amd64_edac.c +@@ -988,6 +988,56 @@ static int sys_addr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr) + return csrow; + } + ++/* Protect the PCI config register pairs used for DF indirect access. */ ++static DEFINE_MUTEX(df_indirect_mutex); ++ ++/* ++ * Data Fabric Indirect Access uses FICAA/FICAD. ++ * ++ * Fabric Indirect Configuration Access Address (FICAA): Constructed based ++ * on the device's Instance Id and the PCI function and register offset of ++ * the desired register. ++ * ++ * Fabric Indirect Configuration Access Data (FICAD): There are FICAD LO ++ * and FICAD HI registers but so far we only need the LO register. ++ */ ++static int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo) ++{ ++ struct pci_dev *F4; ++ u32 ficaa; ++ int err = -ENODEV; ++ ++ if (node >= amd_nb_num()) ++ goto out; ++ ++ F4 = node_to_amd_nb(node)->link; ++ if (!F4) ++ goto out; ++ ++ ficaa = 1; ++ ficaa |= reg & 0x3FC; ++ ficaa |= (func & 0x7) << 11; ++ ficaa |= instance_id << 16; ++ ++ mutex_lock(&df_indirect_mutex); ++ ++ err = pci_write_config_dword(F4, 0x5C, ficaa); ++ if (err) { ++ pr_warn("Error writing DF Indirect FICAA, FICAA=0x%x\n", ficaa); ++ goto out_unlock; ++ } ++ ++ err = pci_read_config_dword(F4, 0x98, lo); ++ if (err) ++ pr_warn("Error reading DF Indirect FICAD LO, FICAA=0x%x.\n", ficaa); ++ ++out_unlock: ++ mutex_unlock(&df_indirect_mutex); ++ ++out: ++ return err; ++} ++ + static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) + { + u64 dram_base_addr, dram_limit_addr, dram_hole_base; +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0037-EDAC-amd64-Allow-for-DF-Indirect-Broadcast-reads.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0037-EDAC-amd64-Allow-for-DF-Indirect-Broadcast-reads.patch new file mode 100644 index 00000000..715bf0fe --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0037-EDAC-amd64-Allow-for-DF-Indirect-Broadcast-reads.patch @@ -0,0 +1,125 @@ +From 37af7e65ce852c8d3f079dabc72e239bc8041895 Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Thu, 28 Oct 2021 17:56:58 +0000 +Subject: [PATCH 37/86] EDAC/amd64: Allow for DF Indirect Broadcast reads + +commit 448c3d6085b71aad58cd515469560ee76c982007 upstream + +The DF Indirect Access method allows for "Broadcast" accesses in which +case no specific instance is targeted. Add support using a reserved +instance ID of 0xFF to indicate a broadcast access. Set the FICAA +register appropriately. + +Define helpers functions for instance and broadcast reads and use them +where appropriate. + +Drop the "amd_" prefix since these functions are all static. + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Link: https://lkml.kernel.org/r/20211028175728.121452-4-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/edac/amd64_edac.c | 29 +++++++++++++++++++++-------- + 1 file changed, 21 insertions(+), 8 deletions(-) + +diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c +index 034d9863bcf9..d41b9a02cc7d 100644 +--- a/drivers/edac/amd64_edac.c ++++ b/drivers/edac/amd64_edac.c +@@ -1000,8 +1000,11 @@ static DEFINE_MUTEX(df_indirect_mutex); + * + * Fabric Indirect Configuration Access Data (FICAD): There are FICAD LO + * and FICAD HI registers but so far we only need the LO register. ++ * ++ * Use Instance Id 0xFF to indicate a broadcast read. + */ +-static int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo) ++#define DF_BROADCAST 0xFF ++static int __df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo) + { + struct pci_dev *F4; + u32 ficaa; +@@ -1014,7 +1017,7 @@ static int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 + if (!F4) + goto out; + +- ficaa = 1; ++ ficaa = (instance_id == DF_BROADCAST) ? 0 : 1; + ficaa |= reg & 0x3FC; + ficaa |= (func & 0x7) << 11; + ficaa |= instance_id << 16; +@@ -1038,6 +1041,16 @@ static int amd_df_indirect_read(u16 node, u8 func, u16 reg, u8 instance_id, u32 + return err; + } + ++static int df_indirect_read_instance(u16 node, u8 func, u16 reg, u8 instance_id, u32 *lo) ++{ ++ return __df_indirect_read(node, func, reg, instance_id, lo); ++} ++ ++static int df_indirect_read_broadcast(u16 node, u8 func, u16 reg, u32 *lo) ++{ ++ return __df_indirect_read(node, func, reg, DF_BROADCAST, lo); ++} ++ + static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) + { + u64 dram_base_addr, dram_limit_addr, dram_hole_base; +@@ -1055,7 +1068,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + bool hash_enabled = false; + + /* Read D18F0x1B4 (DramOffset), check if base 1 is used. */ +- if (amd_df_indirect_read(nid, 0, 0x1B4, umc, &tmp)) ++ if (df_indirect_read_instance(nid, 0, 0x1B4, umc, &tmp)) + goto out_err; + + /* Remove HiAddrOffset from normalized address, if enabled: */ +@@ -1069,7 +1082,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + } + + /* Read D18F0x110 (DramBaseAddress). */ +- if (amd_df_indirect_read(nid, 0, 0x110 + (8 * base), umc, &tmp)) ++ if (df_indirect_read_instance(nid, 0, 0x110 + (8 * base), umc, &tmp)) + goto out_err; + + /* Check if address range is valid. */ +@@ -1092,7 +1105,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + } + + /* Read D18F0x114 (DramLimitAddress). */ +- if (amd_df_indirect_read(nid, 0, 0x114 + (8 * base), umc, &tmp)) ++ if (df_indirect_read_instance(nid, 0, 0x114 + (8 * base), umc, &tmp)) + goto out_err; + + intlv_num_sockets = (tmp >> 8) & 0x1; +@@ -1148,7 +1161,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + * umc/channel# as instance id of the coherent slave + * for FICAA. + */ +- if (amd_df_indirect_read(nid, 0, 0x50, umc, &tmp)) ++ if (df_indirect_read_instance(nid, 0, 0x50, umc, &tmp)) + goto out_err; + + cs_fabric_id = (tmp >> 8) & 0xFF; +@@ -1165,7 +1178,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + + /* Read D18F1x208 (SystemFabricIdMask). */ + if (intlv_num_dies || intlv_num_sockets) +- if (amd_df_indirect_read(nid, 1, 0x208, umc, &tmp)) ++ if (df_indirect_read_broadcast(nid, 1, 0x208, &tmp)) + goto out_err; + + /* If interleaved over more than 1 die. */ +@@ -1204,7 +1217,7 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + + /* If legacy MMIO hole enabled */ + if (lgcy_mmio_hole_en) { +- if (amd_df_indirect_read(nid, 0, 0x104, umc, &tmp)) ++ if (df_indirect_read_broadcast(nid, 0, 0x104, &tmp)) + goto out_err; + + dram_hole_base = tmp & GENMASK(31, 24); +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0038-EDAC-amd64-Add-context-struct.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0038-EDAC-amd64-Add-context-struct.patch new file mode 100644 index 00000000..d926db48 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0038-EDAC-amd64-Add-context-struct.patch @@ -0,0 +1,229 @@ +From 7433822f70045cce83e1f949972e03e008a5a9ec Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Thu, 28 Oct 2021 17:56:59 +0000 +Subject: [PATCH 38/86] EDAC/amd64: Add context struct + +commit 70aeb807cf8649dedbcd59b70dfc38fb89bdf1bd upstream + +Define an address translation context struct. This will hold values that +will be passed between multiple functions. + +Save return address, Node ID, and the Instance ID number to start. +Currently, the UMC number is used as the Instance ID, but future DF +versions may use another value. + +Also include a "tmp" field to use when reading registers. This is to +avoid having to define a temporary variable in multiple functions. + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Link: https://lkml.kernel.org/r/20211028175728.121452-5-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/edac/amd64_edac.c | 97 ++++++++++++++++++++++----------------- + 1 file changed, 55 insertions(+), 42 deletions(-) + +diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c +index d41b9a02cc7d..ca0c67bc25c6 100644 +--- a/drivers/edac/amd64_edac.c ++++ b/drivers/edac/amd64_edac.c +@@ -1051,13 +1051,16 @@ static int df_indirect_read_broadcast(u16 node, u8 func, u16 reg, u32 *lo) + return __df_indirect_read(node, func, reg, DF_BROADCAST, lo); + } + ++struct addr_ctx { ++ u64 ret_addr; ++ u32 tmp; ++ u16 nid; ++ u8 inst_id; ++}; ++ + static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr) + { + u64 dram_base_addr, dram_limit_addr, dram_hole_base; +- /* We start from the normalized address */ +- u64 ret_addr = norm_addr; +- +- u32 tmp; + + u8 die_id_shift, die_id_mask, socket_id_shift, socket_id_mask; + u8 intlv_num_dies, intlv_num_chan, intlv_num_sockets; +@@ -1067,35 +1070,45 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + u8 cs_mask, cs_id = 0; + bool hash_enabled = false; + ++ struct addr_ctx ctx; ++ ++ memset(&ctx, 0, sizeof(ctx)); ++ ++ /* Start from the normalized address */ ++ ctx.ret_addr = norm_addr; ++ ++ ctx.nid = nid; ++ ctx.inst_id = umc; ++ + /* Read D18F0x1B4 (DramOffset), check if base 1 is used. */ +- if (df_indirect_read_instance(nid, 0, 0x1B4, umc, &tmp)) ++ if (df_indirect_read_instance(nid, 0, 0x1B4, umc, &ctx.tmp)) + goto out_err; + + /* Remove HiAddrOffset from normalized address, if enabled: */ +- if (tmp & BIT(0)) { +- u64 hi_addr_offset = (tmp & GENMASK_ULL(31, 20)) << 8; ++ if (ctx.tmp & BIT(0)) { ++ u64 hi_addr_offset = (ctx.tmp & GENMASK_ULL(31, 20)) << 8; + + if (norm_addr >= hi_addr_offset) { +- ret_addr -= hi_addr_offset; ++ ctx.ret_addr -= hi_addr_offset; + base = 1; + } + } + + /* Read D18F0x110 (DramBaseAddress). */ +- if (df_indirect_read_instance(nid, 0, 0x110 + (8 * base), umc, &tmp)) ++ if (df_indirect_read_instance(nid, 0, 0x110 + (8 * base), umc, &ctx.tmp)) + goto out_err; + + /* Check if address range is valid. */ +- if (!(tmp & BIT(0))) { ++ if (!(ctx.tmp & BIT(0))) { + pr_err("%s: Invalid DramBaseAddress range: 0x%x.\n", +- __func__, tmp); ++ __func__, ctx.tmp); + goto out_err; + } + +- lgcy_mmio_hole_en = tmp & BIT(1); +- intlv_num_chan = (tmp >> 4) & 0xF; +- intlv_addr_sel = (tmp >> 8) & 0x7; +- dram_base_addr = (tmp & GENMASK_ULL(31, 12)) << 16; ++ lgcy_mmio_hole_en = ctx.tmp & BIT(1); ++ intlv_num_chan = (ctx.tmp >> 4) & 0xF; ++ intlv_addr_sel = (ctx.tmp >> 8) & 0x7; ++ dram_base_addr = (ctx.tmp & GENMASK_ULL(31, 12)) << 16; + + /* {0, 1, 2, 3} map to address bits {8, 9, 10, 11} respectively */ + if (intlv_addr_sel > 3) { +@@ -1105,12 +1118,12 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + } + + /* Read D18F0x114 (DramLimitAddress). */ +- if (df_indirect_read_instance(nid, 0, 0x114 + (8 * base), umc, &tmp)) ++ if (df_indirect_read_instance(nid, 0, 0x114 + (8 * base), umc, &ctx.tmp)) + goto out_err; + +- intlv_num_sockets = (tmp >> 8) & 0x1; +- intlv_num_dies = (tmp >> 10) & 0x3; +- dram_limit_addr = ((tmp & GENMASK_ULL(31, 12)) << 16) | GENMASK_ULL(27, 0); ++ intlv_num_sockets = (ctx.tmp >> 8) & 0x1; ++ intlv_num_dies = (ctx.tmp >> 10) & 0x3; ++ dram_limit_addr = ((ctx.tmp & GENMASK_ULL(31, 12)) << 16) | GENMASK_ULL(27, 0); + + intlv_addr_bit = intlv_addr_sel + 8; + +@@ -1161,10 +1174,10 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + * umc/channel# as instance id of the coherent slave + * for FICAA. + */ +- if (df_indirect_read_instance(nid, 0, 0x50, umc, &tmp)) ++ if (df_indirect_read_instance(nid, 0, 0x50, umc, &ctx.tmp)) + goto out_err; + +- cs_fabric_id = (tmp >> 8) & 0xFF; ++ cs_fabric_id = (ctx.tmp >> 8) & 0xFF; + die_id_bit = 0; + + /* If interleaved over more than 1 channel: */ +@@ -1178,22 +1191,22 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + + /* Read D18F1x208 (SystemFabricIdMask). */ + if (intlv_num_dies || intlv_num_sockets) +- if (df_indirect_read_broadcast(nid, 1, 0x208, &tmp)) ++ if (df_indirect_read_broadcast(nid, 1, 0x208, &ctx.tmp)) + goto out_err; + + /* If interleaved over more than 1 die. */ + if (intlv_num_dies) { + sock_id_bit = die_id_bit + intlv_num_dies; +- die_id_shift = (tmp >> 24) & 0xF; +- die_id_mask = (tmp >> 8) & 0xFF; ++ die_id_shift = (ctx.tmp >> 24) & 0xF; ++ die_id_mask = (ctx.tmp >> 8) & 0xFF; + + cs_id |= ((cs_fabric_id & die_id_mask) >> die_id_shift) << die_id_bit; + } + + /* If interleaved over more than 1 socket. */ + if (intlv_num_sockets) { +- socket_id_shift = (tmp >> 28) & 0xF; +- socket_id_mask = (tmp >> 16) & 0xFF; ++ socket_id_shift = (ctx.tmp >> 28) & 0xF; ++ socket_id_mask = (ctx.tmp >> 16) & 0xFF; + + cs_id |= ((cs_fabric_id & socket_id_mask) >> socket_id_shift) << sock_id_bit; + } +@@ -1206,44 +1219,44 @@ static int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr + * bits there are. "intlv_addr_bit" tells us how many "Y" bits + * there are (where "I" starts). + */ +- temp_addr_y = ret_addr & GENMASK_ULL(intlv_addr_bit-1, 0); ++ temp_addr_y = ctx.ret_addr & GENMASK_ULL(intlv_addr_bit - 1, 0); + temp_addr_i = (cs_id << intlv_addr_bit); +- temp_addr_x = (ret_addr & GENMASK_ULL(63, intlv_addr_bit)) << num_intlv_bits; +- ret_addr = temp_addr_x | temp_addr_i | temp_addr_y; ++ temp_addr_x = (ctx.ret_addr & GENMASK_ULL(63, intlv_addr_bit)) << num_intlv_bits; ++ ctx.ret_addr = temp_addr_x | temp_addr_i | temp_addr_y; + } + + /* Add dram base address */ +- ret_addr += dram_base_addr; ++ ctx.ret_addr += dram_base_addr; + + /* If legacy MMIO hole enabled */ + if (lgcy_mmio_hole_en) { +- if (df_indirect_read_broadcast(nid, 0, 0x104, &tmp)) ++ if (df_indirect_read_broadcast(nid, 0, 0x104, &ctx.tmp)) + goto out_err; + +- dram_hole_base = tmp & GENMASK(31, 24); +- if (ret_addr >= dram_hole_base) +- ret_addr += (BIT_ULL(32) - dram_hole_base); ++ dram_hole_base = ctx.tmp & GENMASK(31, 24); ++ if (ctx.ret_addr >= dram_hole_base) ++ ctx.ret_addr += (BIT_ULL(32) - dram_hole_base); + } + + if (hash_enabled) { + /* Save some parentheses and grab ls-bit at the end. */ +- hashed_bit = (ret_addr >> 12) ^ +- (ret_addr >> 18) ^ +- (ret_addr >> 21) ^ +- (ret_addr >> 30) ^ ++ hashed_bit = (ctx.ret_addr >> 12) ^ ++ (ctx.ret_addr >> 18) ^ ++ (ctx.ret_addr >> 21) ^ ++ (ctx.ret_addr >> 30) ^ + cs_id; + + hashed_bit &= BIT(0); + +- if (hashed_bit != ((ret_addr >> intlv_addr_bit) & BIT(0))) +- ret_addr ^= BIT(intlv_addr_bit); ++ if (hashed_bit != ((ctx.ret_addr >> intlv_addr_bit) & BIT(0))) ++ ctx.ret_addr ^= BIT(intlv_addr_bit); + } + + /* Is calculated system address is above DRAM limit address? */ +- if (ret_addr > dram_limit_addr) ++ if (ctx.ret_addr > dram_limit_addr) + goto out_err; + +- *sys_addr = ret_addr; ++ *sys_addr = ctx.ret_addr; + return 0; + + out_err: +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0039-EDAC-Add-RDDR5-and-LRDDR5-memory-types.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0039-EDAC-Add-RDDR5-and-LRDDR5-memory-types.patch new file mode 100644 index 00000000..364f24a8 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0039-EDAC-Add-RDDR5-and-LRDDR5-memory-types.patch @@ -0,0 +1,66 @@ +From bb52377adcef01ca2b3f092f41793eb3ec9c69ac Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Wed, 8 Dec 2021 17:43:53 +0000 +Subject: [PATCH 39/86] EDAC: Add RDDR5 and LRDDR5 memory types + +commit f95711242390d759f69fd67ad46b31491fe904d6 upstream + +Include Registered-DDR5 and Load-Reduced DDR5 in the list of memory +types. + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Link: https://lore.kernel.org/r/20211208174356.1997855-2-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/edac/edac_mc.c | 2 ++ + include/linux/edac.h | 6 ++++++ + 2 files changed, 8 insertions(+) + +diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c +index a859ddd9d4a1..cdaa4b02286e 100644 +--- a/drivers/edac/edac_mc.c ++++ b/drivers/edac/edac_mc.c +@@ -164,6 +164,8 @@ const char * const edac_mem_types[] = { + [MEM_LPDDR4] = "Low-Power-DDR4-RAM", + [MEM_LRDDR4] = "Load-Reduced-DDR4-RAM", + [MEM_DDR5] = "Unbuffered-DDR5", ++ [MEM_RDDR5] = "Registered-DDR5", ++ [MEM_LRDDR5] = "Load-Reduced-DDR5-RAM", + [MEM_NVDIMM] = "Non-volatile-RAM", + [MEM_WIO2] = "Wide-IO-2", + [MEM_HBM2] = "High-bandwidth-memory-Gen2", +diff --git a/include/linux/edac.h b/include/linux/edac.h +index 4207d06996a4..e730b3468719 100644 +--- a/include/linux/edac.h ++++ b/include/linux/edac.h +@@ -182,6 +182,8 @@ static inline char *mc_event_error_type(const unsigned int err_type) + * @MEM_LRDDR4: Load-Reduced DDR4 memory. + * @MEM_LPDDR4: Low-Power DDR4 memory. + * @MEM_DDR5: Unbuffered DDR5 RAM ++ * @MEM_RDDR5: Registered DDR5 RAM ++ * @MEM_LRDDR5: Load-Reduced DDR5 memory. + * @MEM_NVDIMM: Non-volatile RAM + * @MEM_WIO2: Wide I/O 2. + * @MEM_HBM2: High bandwidth Memory Gen 2. +@@ -211,6 +213,8 @@ enum mem_type { + MEM_LRDDR4, + MEM_LPDDR4, + MEM_DDR5, ++ MEM_RDDR5, ++ MEM_LRDDR5, + MEM_NVDIMM, + MEM_WIO2, + MEM_HBM2, +@@ -239,6 +243,8 @@ enum mem_type { + #define MEM_FLAG_LRDDR4 BIT(MEM_LRDDR4) + #define MEM_FLAG_LPDDR4 BIT(MEM_LPDDR4) + #define MEM_FLAG_DDR5 BIT(MEM_DDR5) ++#define MEM_FLAG_RDDR5 BIT(MEM_RDDR5) ++#define MEM_FLAG_LRDDR5 BIT(MEM_LRDDR5) + #define MEM_FLAG_NVDIMM BIT(MEM_NVDIMM) + #define MEM_FLAG_WIO2 BIT(MEM_WIO2) + #define MEM_FLAG_HBM2 BIT(MEM_HBM2) +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0040-EDAC-amd64-Add-support-for-AMD-Family-19h-Models-10h.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0040-EDAC-amd64-Add-support-for-AMD-Family-19h-Models-10h.patch new file mode 100644 index 00000000..6c6e5aa7 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0040-EDAC-amd64-Add-support-for-AMD-Family-19h-Models-10h.patch @@ -0,0 +1,98 @@ +From ac5e4c39c3a8b373bcab4251df5c4d3c39a8c248 Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Wed, 8 Dec 2021 17:43:54 +0000 +Subject: [PATCH 40/86] EDAC/amd64: Add support for AMD Family 19h Models + 10h-1Fh and A0h-AFh + +commit e2be5955a88664421b25e463c28a910b8dbd534c upstream + +Add a new family type for AMD Family 19h Models 10h to 1Fh. Use this new +family type for Models A0h to AFh also. + +Increase the maximum number of controllers from 8 to 12. + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Link: https://lore.kernel.org/r/20211208174356.1997855-3-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/edac/amd64_edac.c | 21 ++++++++++++++++++++- + drivers/edac/amd64_edac.h | 5 ++++- + 2 files changed, 24 insertions(+), 2 deletions(-) + +diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c +index ca0c67bc25c6..ff29267e46a6 100644 +--- a/drivers/edac/amd64_edac.c ++++ b/drivers/edac/amd64_edac.c +@@ -2925,6 +2925,16 @@ static struct amd64_family_type family_types[] = { + .dbam_to_cs = f17_addr_mask_to_cs_size, + } + }, ++ [F19_M10H_CPUS] = { ++ .ctl_name = "F19h_M10h", ++ .f0_id = PCI_DEVICE_ID_AMD_19H_M10H_DF_F0, ++ .f6_id = PCI_DEVICE_ID_AMD_19H_M10H_DF_F6, ++ .max_mcs = 12, ++ .ops = { ++ .early_channel_count = f17_early_channel_count, ++ .dbam_to_cs = f17_addr_mask_to_cs_size, ++ } ++ }, + }; + + /* +@@ -3962,11 +3972,20 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt) + break; + + case 0x19: +- if (pvt->model >= 0x20 && pvt->model <= 0x2f) { ++ if (pvt->model >= 0x10 && pvt->model <= 0x1f) { ++ fam_type = &family_types[F19_M10H_CPUS]; ++ pvt->ops = &family_types[F19_M10H_CPUS].ops; ++ break; ++ } else if (pvt->model >= 0x20 && pvt->model <= 0x2f) { + fam_type = &family_types[F17_M70H_CPUS]; + pvt->ops = &family_types[F17_M70H_CPUS].ops; + fam_type->ctl_name = "F19h_M20h"; + break; ++ } else if (pvt->model >= 0xa0 && pvt->model <= 0xaf) { ++ fam_type = &family_types[F19_M10H_CPUS]; ++ pvt->ops = &family_types[F19_M10H_CPUS].ops; ++ fam_type->ctl_name = "F19h_MA0h"; ++ break; + } + fam_type = &family_types[F19_CPUS]; + pvt->ops = &family_types[F19_CPUS].ops; +diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h +index 85aa820bc165..650cab401e21 100644 +--- a/drivers/edac/amd64_edac.h ++++ b/drivers/edac/amd64_edac.h +@@ -96,7 +96,7 @@ + /* Hardware limit on ChipSelect rows per MC and processors per system */ + #define NUM_CHIPSELECTS 8 + #define DRAM_RANGES 8 +-#define NUM_CONTROLLERS 8 ++#define NUM_CONTROLLERS 12 + + #define ON true + #define OFF false +@@ -126,6 +126,8 @@ + #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F6 0x1446 + #define PCI_DEVICE_ID_AMD_19H_DF_F0 0x1650 + #define PCI_DEVICE_ID_AMD_19H_DF_F6 0x1656 ++#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F0 0x14ad ++#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F6 0x14b3 + + /* + * Function 1 - Address Map +@@ -298,6 +300,7 @@ enum amd_families { + F17_M60H_CPUS, + F17_M70H_CPUS, + F19_CPUS, ++ F19_M10H_CPUS, + NUM_FAMILIES, + }; + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0041-x86-MCE-AMD-EDAC-mce_amd-Add-new-SMCA-bank-types.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0041-x86-MCE-AMD-EDAC-mce_amd-Add-new-SMCA-bank-types.patch new file mode 100644 index 00000000..62f27436 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0041-x86-MCE-AMD-EDAC-mce_amd-Add-new-SMCA-bank-types.patch @@ -0,0 +1,279 @@ +From 7060ea9ee8c3e395bfbddd7de2c53ec0ca123d7f Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Thu, 16 Dec 2021 16:29:04 +0000 +Subject: [PATCH 41/86] x86/MCE/AMD, EDAC/mce_amd: Add new SMCA bank types + +commit 5176a93ab27aef1b9f4496fc68e6c303a011d7cc upstream + +Add HWID and McaType values for new SMCA bank types, and add their error +descriptions to edac_mce_amd. + +The "PHY" bank types all have the same error descriptions, and the NBIF +and SHUB bank types have the same error descriptions. So reuse the same +arrays where appropriate. + + [ bp: Remove useless comments over hwid types. ] + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Link: https://lore.kernel.org/r/20211216162905.4132657-2-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/mce.h | 7 ++ + arch/x86/kernel/cpu/mce/amd.c | 21 ++++-- + drivers/edac/mce_amd.c | 135 ++++++++++++++++++++++++++++++++-- + 3 files changed, 151 insertions(+), 12 deletions(-) + +diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h +index 4857d962f0fb..85eae8570cc4 100644 +--- a/arch/x86/include/asm/mce.h ++++ b/arch/x86/include/asm/mce.h +@@ -325,12 +325,19 @@ enum smca_bank_types { + SMCA_SMU, /* System Management Unit */ + SMCA_SMU_V2, + SMCA_MP5, /* Microprocessor 5 Unit */ ++ SMCA_MPDMA, /* MPDMA Unit */ + SMCA_NBIO, /* Northbridge IO Unit */ + SMCA_PCIE, /* PCI Express Unit */ + SMCA_PCIE_V2, + SMCA_XGMI_PCS, /* xGMI PCS Unit */ ++ SMCA_NBIF, /* NBIF Unit */ ++ SMCA_SHUB, /* System HUB Unit */ ++ SMCA_SATA, /* SATA Unit */ ++ SMCA_USB, /* USB Unit */ ++ SMCA_GMI_PCS, /* GMI PCS Unit */ + SMCA_XGMI_PHY, /* xGMI PHY Unit */ + SMCA_WAFL_PHY, /* WAFL PHY Unit */ ++ SMCA_GMI_PHY, /* GMI PHY Unit */ + N_SMCA_BANK_TYPES + }; + +diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c +index c0156c547e46..2f94c1da79e3 100644 +--- a/arch/x86/kernel/cpu/mce/amd.c ++++ b/arch/x86/kernel/cpu/mce/amd.c +@@ -95,11 +95,18 @@ static struct smca_bank_name smca_names[] = { + [SMCA_PSP ... SMCA_PSP_V2] = { "psp", "Platform Security Processor" }, + [SMCA_SMU ... SMCA_SMU_V2] = { "smu", "System Management Unit" }, + [SMCA_MP5] = { "mp5", "Microprocessor 5 Unit" }, ++ [SMCA_MPDMA] = { "mpdma", "MPDMA Unit" }, + [SMCA_NBIO] = { "nbio", "Northbridge IO Unit" }, + [SMCA_PCIE ... SMCA_PCIE_V2] = { "pcie", "PCI Express Unit" }, + [SMCA_XGMI_PCS] = { "xgmi_pcs", "Ext Global Memory Interconnect PCS Unit" }, ++ [SMCA_NBIF] = { "nbif", "NBIF Unit" }, ++ [SMCA_SHUB] = { "shub", "System Hub Unit" }, ++ [SMCA_SATA] = { "sata", "SATA Unit" }, ++ [SMCA_USB] = { "usb", "USB Unit" }, ++ [SMCA_GMI_PCS] = { "gmi_pcs", "Global Memory Interconnect PCS Unit" }, + [SMCA_XGMI_PHY] = { "xgmi_phy", "Ext Global Memory Interconnect PHY Unit" }, + [SMCA_WAFL_PHY] = { "wafl_phy", "WAFL PHY Unit" }, ++ [SMCA_GMI_PHY] = { "gmi_phy", "Global Memory Interconnect PHY Unit" }, + }; + + static const char *smca_get_name(enum smca_bank_types t) +@@ -174,6 +181,9 @@ static struct smca_hwid smca_hwid_mcatypes[] = { + /* Microprocessor 5 Unit MCA type */ + { SMCA_MP5, HWID_MCATYPE(0x01, 0x2) }, + ++ /* MPDMA MCA type */ ++ { SMCA_MPDMA, HWID_MCATYPE(0x01, 0x3) }, ++ + /* Northbridge IO Unit MCA type */ + { SMCA_NBIO, HWID_MCATYPE(0x18, 0x0) }, + +@@ -181,14 +191,15 @@ static struct smca_hwid smca_hwid_mcatypes[] = { + { SMCA_PCIE, HWID_MCATYPE(0x46, 0x0) }, + { SMCA_PCIE_V2, HWID_MCATYPE(0x46, 0x1) }, + +- /* xGMI PCS MCA type */ + { SMCA_XGMI_PCS, HWID_MCATYPE(0x50, 0x0) }, +- +- /* xGMI PHY MCA type */ ++ { SMCA_NBIF, HWID_MCATYPE(0x6C, 0x0) }, ++ { SMCA_SHUB, HWID_MCATYPE(0x80, 0x0) }, ++ { SMCA_SATA, HWID_MCATYPE(0xA8, 0x0) }, ++ { SMCA_USB, HWID_MCATYPE(0xAA, 0x0) }, ++ { SMCA_GMI_PCS, HWID_MCATYPE(0x241, 0x0) }, + { SMCA_XGMI_PHY, HWID_MCATYPE(0x259, 0x0) }, +- +- /* WAFL PHY MCA type */ + { SMCA_WAFL_PHY, HWID_MCATYPE(0x267, 0x0) }, ++ { SMCA_GMI_PHY, HWID_MCATYPE(0x269, 0x0) }, + }; + + struct smca_bank smca_banks[MAX_NR_BANKS]; +diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c +index 67dbf4c31271..cfd3f7ae9251 100644 +--- a/drivers/edac/mce_amd.c ++++ b/drivers/edac/mce_amd.c +@@ -399,6 +399,63 @@ static const char * const smca_mp5_mce_desc[] = { + "Instruction Tag Cache Bank B ECC or parity error", + }; + ++static const char * const smca_mpdma_mce_desc[] = { ++ "Main SRAM [31:0] bank ECC or parity error", ++ "Main SRAM [63:32] bank ECC or parity error", ++ "Main SRAM [95:64] bank ECC or parity error", ++ "Main SRAM [127:96] bank ECC or parity error", ++ "Data Cache Bank A ECC or parity error", ++ "Data Cache Bank B ECC or parity error", ++ "Data Tag Cache Bank A ECC or parity error", ++ "Data Tag Cache Bank B ECC or parity error", ++ "Instruction Cache Bank A ECC or parity error", ++ "Instruction Cache Bank B ECC or parity error", ++ "Instruction Tag Cache Bank A ECC or parity error", ++ "Instruction Tag Cache Bank B ECC or parity error", ++ "Data Cache Bank A ECC or parity error", ++ "Data Cache Bank B ECC or parity error", ++ "Data Tag Cache Bank A ECC or parity error", ++ "Data Tag Cache Bank B ECC or parity error", ++ "Instruction Cache Bank A ECC or parity error", ++ "Instruction Cache Bank B ECC or parity error", ++ "Instruction Tag Cache Bank A ECC or parity error", ++ "Instruction Tag Cache Bank B ECC or parity error", ++ "Data Cache Bank A ECC or parity error", ++ "Data Cache Bank B ECC or parity error", ++ "Data Tag Cache Bank A ECC or parity error", ++ "Data Tag Cache Bank B ECC or parity error", ++ "Instruction Cache Bank A ECC or parity error", ++ "Instruction Cache Bank B ECC or parity error", ++ "Instruction Tag Cache Bank A ECC or parity error", ++ "Instruction Tag Cache Bank B ECC or parity error", ++ "System Hub Read Buffer ECC or parity error", ++ "MPDMA TVF DVSEC Memory ECC or parity error", ++ "MPDMA TVF MMIO Mailbox0 ECC or parity error", ++ "MPDMA TVF MMIO Mailbox1 ECC or parity error", ++ "MPDMA TVF Doorbell Memory ECC or parity error", ++ "MPDMA TVF SDP Slave Memory 0 ECC or parity error", ++ "MPDMA TVF SDP Slave Memory 1 ECC or parity error", ++ "MPDMA TVF SDP Slave Memory 2 ECC or parity error", ++ "MPDMA TVF SDP Master Memory 0 ECC or parity error", ++ "MPDMA TVF SDP Master Memory 1 ECC or parity error", ++ "MPDMA TVF SDP Master Memory 2 ECC or parity error", ++ "MPDMA TVF SDP Master Memory 3 ECC or parity error", ++ "MPDMA TVF SDP Master Memory 4 ECC or parity error", ++ "MPDMA TVF SDP Master Memory 5 ECC or parity error", ++ "MPDMA TVF SDP Master Memory 6 ECC or parity error", ++ "MPDMA PTE Command FIFO ECC or parity error", ++ "MPDMA PTE Hub Data FIFO ECC or parity error", ++ "MPDMA PTE Internal Data FIFO ECC or parity error", ++ "MPDMA PTE Command Memory DMA ECC or parity error", ++ "MPDMA PTE Command Memory Internal ECC or parity error", ++ "MPDMA PTE DMA Completion FIFO ECC or parity error", ++ "MPDMA PTE Tablewalk Completion FIFO ECC or parity error", ++ "MPDMA PTE Descriptor Completion FIFO ECC or parity error", ++ "MPDMA PTE ReadOnly Completion FIFO ECC or parity error", ++ "MPDMA PTE DirectWrite Completion FIFO ECC or parity error", ++ "SDP Watchdog Timer expired", ++}; ++ + static const char * const smca_nbio_mce_desc[] = { + "ECC or Parity error", + "PCIE error", +@@ -448,7 +505,7 @@ static const char * const smca_xgmipcs_mce_desc[] = { + "Rx Replay Timeout Error", + "LinkSub Tx Timeout Error", + "LinkSub Rx Timeout Error", +- "Rx CMD Pocket Error", ++ "Rx CMD Packet Error", + }; + + static const char * const smca_xgmiphy_mce_desc[] = { +@@ -458,11 +515,66 @@ static const char * const smca_xgmiphy_mce_desc[] = { + "PHY APB error", + }; + +-static const char * const smca_waflphy_mce_desc[] = { +- "RAM ECC Error", +- "ARC instruction buffer parity error", +- "ARC data buffer parity error", +- "PHY APB error", ++static const char * const smca_nbif_mce_desc[] = { ++ "Timeout error from GMI", ++ "SRAM ECC error", ++ "NTB Error Event", ++ "SDP Parity error", ++}; ++ ++static const char * const smca_sata_mce_desc[] = { ++ "Parity error for port 0", ++ "Parity error for port 1", ++ "Parity error for port 2", ++ "Parity error for port 3", ++ "Parity error for port 4", ++ "Parity error for port 5", ++ "Parity error for port 6", ++ "Parity error for port 7", ++}; ++ ++static const char * const smca_usb_mce_desc[] = { ++ "Parity error or ECC error for S0 RAM0", ++ "Parity error or ECC error for S0 RAM1", ++ "Parity error or ECC error for S0 RAM2", ++ "Parity error for PHY RAM0", ++ "Parity error for PHY RAM1", ++ "AXI Slave Response error", ++}; ++ ++static const char * const smca_gmipcs_mce_desc[] = { ++ "Data Loss Error", ++ "Training Error", ++ "Replay Parity Error", ++ "Rx Fifo Underflow Error", ++ "Rx Fifo Overflow Error", ++ "CRC Error", ++ "BER Exceeded Error", ++ "Tx Fifo Underflow Error", ++ "Replay Buffer Parity Error", ++ "Tx Overflow Error", ++ "Replay Fifo Overflow Error", ++ "Replay Fifo Underflow Error", ++ "Elastic Fifo Overflow Error", ++ "Deskew Error", ++ "Offline Error", ++ "Data Startup Limit Error", ++ "FC Init Timeout Error", ++ "Recovery Timeout Error", ++ "Ready Serial Timeout Error", ++ "Ready Serial Attempt Error", ++ "Recovery Attempt Error", ++ "Recovery Relock Attempt Error", ++ "Deskew Abort Error", ++ "Rx Buffer Error", ++ "Rx LFDS Fifo Overflow Error", ++ "Rx LFDS Fifo Underflow Error", ++ "LinkSub Tx Timeout Error", ++ "LinkSub Rx Timeout Error", ++ "Rx CMD Packet Error", ++ "LFDS Training Timeout Error", ++ "LFDS FC Init Timeout Error", ++ "Data Loss Error", + }; + + struct smca_mce_desc { +@@ -490,12 +602,21 @@ static struct smca_mce_desc smca_mce_descs[] = { + [SMCA_SMU] = { smca_smu_mce_desc, ARRAY_SIZE(smca_smu_mce_desc) }, + [SMCA_SMU_V2] = { smca_smu2_mce_desc, ARRAY_SIZE(smca_smu2_mce_desc) }, + [SMCA_MP5] = { smca_mp5_mce_desc, ARRAY_SIZE(smca_mp5_mce_desc) }, ++ [SMCA_MPDMA] = { smca_mpdma_mce_desc, ARRAY_SIZE(smca_mpdma_mce_desc) }, + [SMCA_NBIO] = { smca_nbio_mce_desc, ARRAY_SIZE(smca_nbio_mce_desc) }, + [SMCA_PCIE] = { smca_pcie_mce_desc, ARRAY_SIZE(smca_pcie_mce_desc) }, + [SMCA_PCIE_V2] = { smca_pcie2_mce_desc, ARRAY_SIZE(smca_pcie2_mce_desc) }, + [SMCA_XGMI_PCS] = { smca_xgmipcs_mce_desc, ARRAY_SIZE(smca_xgmipcs_mce_desc) }, ++ /* NBIF and SHUB have the same error descriptions, for now. */ ++ [SMCA_NBIF] = { smca_nbif_mce_desc, ARRAY_SIZE(smca_nbif_mce_desc) }, ++ [SMCA_SHUB] = { smca_nbif_mce_desc, ARRAY_SIZE(smca_nbif_mce_desc) }, ++ [SMCA_SATA] = { smca_sata_mce_desc, ARRAY_SIZE(smca_sata_mce_desc) }, ++ [SMCA_USB] = { smca_usb_mce_desc, ARRAY_SIZE(smca_usb_mce_desc) }, ++ [SMCA_GMI_PCS] = { smca_gmipcs_mce_desc, ARRAY_SIZE(smca_gmipcs_mce_desc) }, ++ /* All the PHY bank types have the same error descriptions, for now. */ + [SMCA_XGMI_PHY] = { smca_xgmiphy_mce_desc, ARRAY_SIZE(smca_xgmiphy_mce_desc) }, +- [SMCA_WAFL_PHY] = { smca_waflphy_mce_desc, ARRAY_SIZE(smca_waflphy_mce_desc) }, ++ [SMCA_WAFL_PHY] = { smca_xgmiphy_mce_desc, ARRAY_SIZE(smca_xgmiphy_mce_desc) }, ++ [SMCA_GMI_PHY] = { smca_xgmiphy_mce_desc, ARRAY_SIZE(smca_xgmiphy_mce_desc) }, + }; + + static bool f12h_mc0_mce(u16 ec, u8 xec) +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0042-drm-amdgpu-Register-MCE-notifier-for-Aldebaran-RAS.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0042-drm-amdgpu-Register-MCE-notifier-for-Aldebaran-RAS.patch new file mode 100644 index 00000000..6a0c8ce0 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0042-drm-amdgpu-Register-MCE-notifier-for-Aldebaran-RAS.patch @@ -0,0 +1,194 @@ +From fe2e0beb9e86f615af44d33f84f684fc132d56d6 Mon Sep 17 00:00:00 2001 +From: Mukul Joshi <mukul.joshi@amd.com> +Date: Wed, 22 Sep 2021 14:49:43 -0400 +Subject: [PATCH 42/86] drm/amdgpu: Register MCE notifier for Aldebaran RAS + +commit 12b2cab79017ebe598c74493ac1cfc5934d3ccc2 upstream + +On Aldebaran, GPU driver will handle bad page retirement +for GPU memory even though UMC is host managed. As a result, +register a bad page retirement handler on the mce notifier +chain to retire bad pages on Aldebaran. + +Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> +Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Alex Deucher <alexander.deucher@amd.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 141 ++++++++++++++++++++++++ + 1 file changed, 141 insertions(+) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +index 96a8fd0ca1df..6660327c7c50 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +@@ -35,7 +35,11 @@ + #include "amdgpu_xgmi.h" + #include "ivsrcid/nbio/irqsrcs_nbif_7_4.h" + #include "atom.h" ++#ifdef CONFIG_X86_MCE_AMD ++#include <asm/mce.h> + ++static bool notifier_registered; ++#endif + static const char *RAS_FS_NAME = "ras"; + + const char *ras_error_string[] = { +@@ -85,6 +89,9 @@ static bool amdgpu_ras_check_bad_page_unlock(struct amdgpu_ras *con, + uint64_t addr); + static bool amdgpu_ras_check_bad_page(struct amdgpu_device *adev, + uint64_t addr); ++#ifdef CONFIG_X86_MCE_AMD ++static void amdgpu_register_bad_pages_mca_notifier(void); ++#endif + + void amdgpu_ras_set_error_query_ready(struct amdgpu_device *adev, bool ready) + { +@@ -2014,6 +2021,11 @@ int amdgpu_ras_recovery_init(struct amdgpu_device *adev) + adev->smu.ppt_funcs->send_hbm_bad_pages_num(&adev->smu, con->eeprom_control.ras_num_recs); + } + ++#ifdef CONFIG_X86_MCE_AMD ++ if ((adev->asic_type == CHIP_ALDEBARAN) && ++ (adev->gmc.xgmi.connected_to_cpu)) ++ amdgpu_register_bad_pages_mca_notifier(); ++#endif + return 0; + + free: +@@ -2507,3 +2519,132 @@ void amdgpu_release_ras_context(struct amdgpu_device *adev) + kfree(con); + } + } ++ ++#ifdef CONFIG_X86_MCE_AMD ++static struct amdgpu_device *find_adev(uint32_t node_id) ++{ ++ struct amdgpu_gpu_instance *gpu_instance; ++ int i; ++ struct amdgpu_device *adev = NULL; ++ ++ mutex_lock(&mgpu_info.mutex); ++ ++ for (i = 0; i < mgpu_info.num_gpu; i++) { ++ gpu_instance = &(mgpu_info.gpu_ins[i]); ++ adev = gpu_instance->adev; ++ ++ if (adev->gmc.xgmi.connected_to_cpu && ++ adev->gmc.xgmi.physical_node_id == node_id) ++ break; ++ adev = NULL; ++ } ++ ++ mutex_unlock(&mgpu_info.mutex); ++ ++ return adev; ++} ++ ++#define GET_MCA_IPID_GPUID(m) (((m) >> 44) & 0xF) ++#define GET_UMC_INST(m) (((m) >> 21) & 0x7) ++#define GET_CHAN_INDEX(m) ((((m) >> 12) & 0x3) | (((m) >> 18) & 0x4)) ++#define GPU_ID_OFFSET 8 ++ ++static int amdgpu_bad_page_notifier(struct notifier_block *nb, ++ unsigned long val, void *data) ++{ ++ struct mce *m = (struct mce *)data; ++ struct amdgpu_device *adev = NULL; ++ uint32_t gpu_id = 0; ++ uint32_t umc_inst = 0; ++ uint32_t ch_inst, channel_index = 0; ++ struct ras_err_data err_data = {0, 0, 0, NULL}; ++ struct eeprom_table_record err_rec; ++ uint64_t retired_page; ++ ++ /* ++ * If the error was generated in UMC_V2, which belongs to GPU UMCs, ++ * and error occurred in DramECC (Extended error code = 0) then only ++ * process the error, else bail out. ++ */ ++ if (!m || !((smca_get_bank_type(m->bank) == SMCA_UMC_V2) && ++ (XEC(m->status, 0x3f) == 0x0))) ++ return NOTIFY_DONE; ++ ++ /* ++ * If it is correctable error, return. ++ */ ++ if (mce_is_correctable(m)) ++ return NOTIFY_OK; ++ ++ /* ++ * GPU Id is offset by GPU_ID_OFFSET in MCA_IPID_UMC register. ++ */ ++ gpu_id = GET_MCA_IPID_GPUID(m->ipid) - GPU_ID_OFFSET; ++ ++ adev = find_adev(gpu_id); ++ if (!adev) { ++ DRM_WARN("%s: Unable to find adev for gpu_id: %d\n", __func__, ++ gpu_id); ++ return NOTIFY_DONE; ++ } ++ ++ /* ++ * If it is uncorrectable error, then find out UMC instance and ++ * channel index. ++ */ ++ umc_inst = GET_UMC_INST(m->ipid); ++ ch_inst = GET_CHAN_INDEX(m->ipid); ++ ++ dev_info(adev->dev, "Uncorrectable error detected in UMC inst: %d, chan_idx: %d", ++ umc_inst, ch_inst); ++ ++ memset(&err_rec, 0x0, sizeof(struct eeprom_table_record)); ++ ++ /* ++ * Translate UMC channel address to Physical address ++ */ ++ channel_index = ++ adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num ++ + ch_inst]; ++ ++ retired_page = ADDR_OF_8KB_BLOCK(m->addr) | ++ ADDR_OF_256B_BLOCK(channel_index) | ++ OFFSET_IN_256B_BLOCK(m->addr); ++ ++ err_rec.address = m->addr; ++ err_rec.retired_page = retired_page >> AMDGPU_GPU_PAGE_SHIFT; ++ err_rec.ts = (uint64_t)ktime_get_real_seconds(); ++ err_rec.err_type = AMDGPU_RAS_EEPROM_ERR_NON_RECOVERABLE; ++ err_rec.cu = 0; ++ err_rec.mem_channel = channel_index; ++ err_rec.mcumc_id = umc_inst; ++ ++ err_data.err_addr = &err_rec; ++ err_data.err_addr_cnt = 1; ++ ++ if (amdgpu_bad_page_threshold != 0) { ++ amdgpu_ras_add_bad_pages(adev, err_data.err_addr, ++ err_data.err_addr_cnt); ++ amdgpu_ras_save_bad_pages(adev); ++ } ++ ++ return NOTIFY_OK; ++} ++ ++static struct notifier_block amdgpu_bad_page_nb = { ++ .notifier_call = amdgpu_bad_page_notifier, ++ .priority = MCE_PRIO_UC, ++}; ++ ++static void amdgpu_register_bad_pages_mca_notifier(void) ++{ ++ /* ++ * Register the x86 notifier only once ++ * with MCE subsystem. ++ */ ++ if (notifier_registered == false) { ++ mce_register_decode_chain(&amdgpu_bad_page_nb); ++ notifier_registered = true; ++ } ++} ++#endif +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0043-x86-MCE-AMD-EDAC-mce_amd-Support-non-uniform-MCA-ban.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0043-x86-MCE-AMD-EDAC-mce_amd-Support-non-uniform-MCA-ban.patch new file mode 100644 index 00000000..e1733724 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0043-x86-MCE-AMD-EDAC-mce_amd-Support-non-uniform-MCA-ban.patch @@ -0,0 +1,311 @@ +From 138fc4242a6f7dacfa329d112108b7d43e9c8d47 Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Thu, 16 Dec 2021 16:29:05 +0000 +Subject: [PATCH 43/86] x86/MCE/AMD, EDAC/mce_amd: Support non-uniform MCA bank + type enumeration + +commit 91f75eb481cfaee5c4ed8fb5214bf2fbfa04bd7b upstream + +AMD systems currently lay out MCA bank types such that the type of bank +number "i" is either the same across all CPUs or is Reserved/Read-as-Zero. + +For example: + + Bank # | CPUx | CPUy + 0 LS LS + 1 RAZ UMC + 2 CS CS + 3 SMU RAZ + +Future AMD systems will lay out MCA bank types such that the type of +bank number "i" may be different across CPUs. + +For example: + + Bank # | CPUx | CPUy + 0 LS LS + 1 RAZ UMC + 2 CS NBIO + 3 SMU RAZ + +Change the structures that cache MCA bank types to be per-CPU and update +smca_get_bank_type() to handle this change. + +Move some SMCA-specific structures to amd.c from mce.h, since they no +longer need to be global. + +Break out the "count" for bank types from struct smca_hwid, since this +should provide a per-CPU count rather than a system-wide count. + +Apply the "const" qualifier to the struct smca_hwid_mcatypes array. The +values in this array should not change at runtime. + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Link: https://lore.kernel.org/r/20211216162905.4132657-3-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/mce.h | 18 +------- + arch/x86/kernel/cpu/mce/amd.c | 59 +++++++++++++++---------- + drivers/edac/mce_amd.c | 11 +---- + drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +- + 4 files changed, 39 insertions(+), 51 deletions(-) + +diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h +index 85eae8570cc4..f686ed9723e0 100644 +--- a/arch/x86/include/asm/mce.h ++++ b/arch/x86/include/asm/mce.h +@@ -341,22 +341,6 @@ enum smca_bank_types { + N_SMCA_BANK_TYPES + }; + +-#define HWID_MCATYPE(hwid, mcatype) (((hwid) << 16) | (mcatype)) +- +-struct smca_hwid { +- unsigned int bank_type; /* Use with smca_bank_types for easy indexing. */ +- u32 hwid_mcatype; /* (hwid,mcatype) tuple */ +- u8 count; /* Number of instances. */ +-}; +- +-struct smca_bank { +- struct smca_hwid *hwid; +- u32 id; /* Value of MCA_IPID[InstanceId]. */ +- u8 sysfs_id; /* Value used for sysfs name. */ +-}; +- +-extern struct smca_bank smca_banks[MAX_NR_BANKS]; +- + extern const char *smca_get_long_name(enum smca_bank_types t); + extern bool amd_mce_is_memory_error(struct mce *m); + +@@ -364,7 +348,7 @@ extern int mce_threshold_create_device(unsigned int cpu); + extern int mce_threshold_remove_device(unsigned int cpu); + + void mce_amd_feature_init(struct cpuinfo_x86 *c); +-enum smca_bank_types smca_get_bank_type(unsigned int bank); ++enum smca_bank_types smca_get_bank_type(unsigned int cpu, unsigned int bank); + #else + + static inline int mce_threshold_create_device(unsigned int cpu) { return 0; }; +diff --git a/arch/x86/kernel/cpu/mce/amd.c b/arch/x86/kernel/cpu/mce/amd.c +index 2f94c1da79e3..628e5bb7f241 100644 +--- a/arch/x86/kernel/cpu/mce/amd.c ++++ b/arch/x86/kernel/cpu/mce/amd.c +@@ -71,6 +71,22 @@ static const char * const smca_umc_block_names[] = { + "misc_umc" + }; + ++#define HWID_MCATYPE(hwid, mcatype) (((hwid) << 16) | (mcatype)) ++ ++struct smca_hwid { ++ unsigned int bank_type; /* Use with smca_bank_types for easy indexing. */ ++ u32 hwid_mcatype; /* (hwid,mcatype) tuple */ ++}; ++ ++struct smca_bank { ++ const struct smca_hwid *hwid; ++ u32 id; /* Value of MCA_IPID[InstanceId]. */ ++ u8 sysfs_id; /* Value used for sysfs name. */ ++}; ++ ++static DEFINE_PER_CPU_READ_MOSTLY(struct smca_bank[MAX_NR_BANKS], smca_banks); ++static DEFINE_PER_CPU_READ_MOSTLY(u8[N_SMCA_BANK_TYPES], smca_bank_counts); ++ + struct smca_bank_name { + const char *name; /* Short name for sysfs */ + const char *long_name; /* Long name for pretty-printing */ +@@ -126,14 +142,14 @@ const char *smca_get_long_name(enum smca_bank_types t) + } + EXPORT_SYMBOL_GPL(smca_get_long_name); + +-enum smca_bank_types smca_get_bank_type(unsigned int bank) ++enum smca_bank_types smca_get_bank_type(unsigned int cpu, unsigned int bank) + { + struct smca_bank *b; + + if (bank >= MAX_NR_BANKS) + return N_SMCA_BANK_TYPES; + +- b = &smca_banks[bank]; ++ b = &per_cpu(smca_banks, cpu)[bank]; + if (!b->hwid) + return N_SMCA_BANK_TYPES; + +@@ -141,7 +157,7 @@ enum smca_bank_types smca_get_bank_type(unsigned int bank) + } + EXPORT_SYMBOL_GPL(smca_get_bank_type); + +-static struct smca_hwid smca_hwid_mcatypes[] = { ++static const struct smca_hwid smca_hwid_mcatypes[] = { + /* { bank_type, hwid_mcatype } */ + + /* Reserved type */ +@@ -202,9 +218,6 @@ static struct smca_hwid smca_hwid_mcatypes[] = { + { SMCA_GMI_PHY, HWID_MCATYPE(0x269, 0x0) }, + }; + +-struct smca_bank smca_banks[MAX_NR_BANKS]; +-EXPORT_SYMBOL_GPL(smca_banks); +- + /* + * In SMCA enabled processors, we can have multiple banks for a given IP type. + * So to define a unique name for each bank, we use a temp c-string to append +@@ -260,8 +273,9 @@ static void smca_set_misc_banks_map(unsigned int bank, unsigned int cpu) + + static void smca_configure(unsigned int bank, unsigned int cpu) + { ++ u8 *bank_counts = this_cpu_ptr(smca_bank_counts); ++ const struct smca_hwid *s_hwid; + unsigned int i, hwid_mcatype; +- struct smca_hwid *s_hwid; + u32 high, low; + u32 smca_config = MSR_AMD64_SMCA_MCx_CONFIG(bank); + +@@ -297,10 +311,6 @@ static void smca_configure(unsigned int bank, unsigned int cpu) + + smca_set_misc_banks_map(bank, cpu); + +- /* Return early if this bank was already initialized. */ +- if (smca_banks[bank].hwid && smca_banks[bank].hwid->hwid_mcatype != 0) +- return; +- + if (rdmsr_safe(MSR_AMD64_SMCA_MCx_IPID(bank), &low, &high)) { + pr_warn("Failed to read MCA_IPID for bank %d\n", bank); + return; +@@ -311,10 +321,11 @@ static void smca_configure(unsigned int bank, unsigned int cpu) + + for (i = 0; i < ARRAY_SIZE(smca_hwid_mcatypes); i++) { + s_hwid = &smca_hwid_mcatypes[i]; ++ + if (hwid_mcatype == s_hwid->hwid_mcatype) { +- smca_banks[bank].hwid = s_hwid; +- smca_banks[bank].id = low; +- smca_banks[bank].sysfs_id = s_hwid->count++; ++ this_cpu_ptr(smca_banks)[bank].hwid = s_hwid; ++ this_cpu_ptr(smca_banks)[bank].id = low; ++ this_cpu_ptr(smca_banks)[bank].sysfs_id = bank_counts[s_hwid->bank_type]++; + break; + } + } +@@ -600,7 +611,7 @@ prepare_threshold_block(unsigned int bank, unsigned int block, u32 addr, + + bool amd_filter_mce(struct mce *m) + { +- enum smca_bank_types bank_type = smca_get_bank_type(m->bank); ++ enum smca_bank_types bank_type = smca_get_bank_type(m->extcpu, m->bank); + struct cpuinfo_x86 *c = &boot_cpu_data; + + /* See Family 17h Models 10h-2Fh Erratum #1114. */ +@@ -638,7 +649,7 @@ static void disable_err_thresholding(struct cpuinfo_x86 *c, unsigned int bank) + } else if (c->x86 == 0x17 && + (c->x86_model >= 0x10 && c->x86_model <= 0x2F)) { + +- if (smca_get_bank_type(bank) != SMCA_IF) ++ if (smca_get_bank_type(smp_processor_id(), bank) != SMCA_IF) + return; + + msrs[0] = MSR_AMD64_SMCA_MCx_MISC(bank); +@@ -706,7 +717,7 @@ bool amd_mce_is_memory_error(struct mce *m) + u8 xec = (m->status >> 16) & 0x1f; + + if (mce_flags.smca) +- return smca_get_bank_type(m->bank) == SMCA_UMC && xec == 0x0; ++ return smca_get_bank_type(m->extcpu, m->bank) == SMCA_UMC && xec == 0x0; + + return m->bank == 4 && xec == 0x8; + } +@@ -1022,7 +1033,7 @@ static struct kobj_type threshold_ktype = { + .release = threshold_block_release, + }; + +-static const char *get_name(unsigned int bank, struct threshold_block *b) ++static const char *get_name(unsigned int cpu, unsigned int bank, struct threshold_block *b) + { + enum smca_bank_types bank_type; + +@@ -1033,7 +1044,7 @@ static const char *get_name(unsigned int bank, struct threshold_block *b) + return th_names[bank]; + } + +- bank_type = smca_get_bank_type(bank); ++ bank_type = smca_get_bank_type(cpu, bank); + if (bank_type >= N_SMCA_BANK_TYPES) + return NULL; + +@@ -1043,12 +1054,12 @@ static const char *get_name(unsigned int bank, struct threshold_block *b) + return NULL; + } + +- if (smca_banks[bank].hwid->count == 1) ++ if (per_cpu(smca_bank_counts, cpu)[bank_type] == 1) + return smca_get_name(bank_type); + + snprintf(buf_mcatype, MAX_MCATYPE_NAME_LEN, +- "%s_%x", smca_get_name(bank_type), +- smca_banks[bank].sysfs_id); ++ "%s_%u", smca_get_name(bank_type), ++ per_cpu(smca_banks, cpu)[bank].sysfs_id); + return buf_mcatype; + } + +@@ -1104,7 +1115,7 @@ static int allocate_threshold_blocks(unsigned int cpu, struct threshold_bank *tb + else + tb->blocks = b; + +- err = kobject_init_and_add(&b->kobj, &threshold_ktype, tb->kobj, get_name(bank, b)); ++ err = kobject_init_and_add(&b->kobj, &threshold_ktype, tb->kobj, get_name(cpu, bank, b)); + if (err) + goto out_free; + recurse: +@@ -1159,7 +1170,7 @@ static int threshold_create_bank(struct threshold_bank **bp, unsigned int cpu, + struct device *dev = this_cpu_read(mce_device); + struct amd_northbridge *nb = NULL; + struct threshold_bank *b = NULL; +- const char *name = get_name(bank, NULL); ++ const char *name = get_name(cpu, bank, NULL); + int err = 0; + + if (!dev) +diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c +index cfd3f7ae9251..cc5c63feb26a 100644 +--- a/drivers/edac/mce_amd.c ++++ b/drivers/edac/mce_amd.c +@@ -1166,20 +1166,13 @@ static void decode_mc6_mce(struct mce *m) + /* Decode errors according to Scalable MCA specification */ + static void decode_smca_error(struct mce *m) + { +- struct smca_hwid *hwid; +- enum smca_bank_types bank_type; ++ enum smca_bank_types bank_type = smca_get_bank_type(m->extcpu, m->bank); + const char *ip_name; + u8 xec = XEC(m->status, xec_mask); + +- if (m->bank >= ARRAY_SIZE(smca_banks)) ++ if (bank_type >= N_SMCA_BANK_TYPES) + return; + +- hwid = smca_banks[m->bank].hwid; +- if (!hwid) +- return; +- +- bank_type = hwid->bank_type; +- + if (bank_type == SMCA_RESERVED) { + pr_emerg(HW_ERR "Bank %d is reserved.\n", m->bank); + return; +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +index 6660327c7c50..ceabb3f89a76 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +@@ -2566,7 +2566,7 @@ static int amdgpu_bad_page_notifier(struct notifier_block *nb, + * and error occurred in DramECC (Extended error code = 0) then only + * process the error, else bail out. + */ +- if (!m || !((smca_get_bank_type(m->bank) == SMCA_UMC_V2) && ++ if (!m || !((smca_get_bank_type(m->extcpu, m->bank) == SMCA_UMC_V2) && + (XEC(m->status, 0x3f) == 0x0))) + return NOTIFY_DONE; + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0044-KVM-SVM-Ensure-target-pCPU-is-read-once-when-signall.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0044-KVM-SVM-Ensure-target-pCPU-is-read-once-when-signall.patch new file mode 100644 index 00000000..8fb738a3 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0044-KVM-SVM-Ensure-target-pCPU-is-read-once-when-signall.patch @@ -0,0 +1,58 @@ +From 2f27ec6013d852b663320f5bc9e31f44e19ea974 Mon Sep 17 00:00:00 2001 +From: Sean Christopherson <seanjc@google.com> +Date: Fri, 8 Oct 2021 19:11:55 -0700 +Subject: [PATCH 44/86] KVM: SVM: Ensure target pCPU is read once when + signalling AVIC doorbell + +commit 91b01895071770ed0c256869d0f94d69a2fb8ecf upstream + +Ensure vcpu->cpu is read once when signalling the AVIC doorbell. If the +compiler rereads the field and the vCPU is migrated between the check and +writing the doorbell, KVM would signal the wrong physical CPU. + +Functionally, signalling the wrong CPU in this case is not an issue as +task migration means the vCPU has exited and will pick up any pending +interrupts on the next VMRUN. Add the READ_ONCE() purely to clean up the +code. + +Opportunistically add a comment explaining the task migration behavior, +and rename cpuid=>cpu to avoid conflating the CPU number with KVM's more +common usage of CPUID. + +Signed-off-by: Sean Christopherson <seanjc@google.com> +Message-Id: <20211009021236.4122790-3-seanjc@google.com> +Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/kvm/svm/avic.c | 14 +++++++++++--- + 1 file changed, 11 insertions(+), 3 deletions(-) + +diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c +index 3d3f8dfb8045..f535918220ec 100644 +--- a/arch/x86/kvm/svm/avic.c ++++ b/arch/x86/kvm/svm/avic.c +@@ -673,10 +673,18 @@ int svm_deliver_avic_intr(struct kvm_vcpu *vcpu, int vec) + smp_mb__after_atomic(); + + if (avic_vcpu_is_running(vcpu)) { +- int cpuid = vcpu->cpu; ++ int cpu = READ_ONCE(vcpu->cpu); + +- if (cpuid != get_cpu()) +- wrmsrl(SVM_AVIC_DOORBELL, kvm_cpu_get_apicid(cpuid)); ++ /* ++ * Note, the vCPU could get migrated to a different pCPU at any ++ * point, which could result in signalling the wrong/previous ++ * pCPU. But if that happens the vCPU is guaranteed to do a ++ * VMRUN (after being migrated) and thus will process pending ++ * interrupts, i.e. a doorbell is not needed (and the spurious ++ * one is harmless). ++ */ ++ if (cpu != get_cpu()) ++ wrmsrl(SVM_AVIC_DOORBELL, kvm_cpu_get_apicid(cpu)); + put_cpu(); + } else + kvm_vcpu_wake_up(vcpu); +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0045-platform-x86-Add-AMD-system-management-interface.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0045-platform-x86-Add-AMD-system-management-interface.patch new file mode 100644 index 00000000..630803f2 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0045-platform-x86-Add-AMD-system-management-interface.patch @@ -0,0 +1,779 @@ +From 87807678529f6645b798b5e91cb1a13e8f95b8b2 Mon Sep 17 00:00:00 2001 +From: Suma Hegde <suma.hegde@amd.com> +Date: Tue, 22 Feb 2022 10:35:00 +0530 +Subject: [PATCH 45/86] platform/x86: Add AMD system management interface + +commit 91f410aa679a035e7abdff47daca4418c384c770 upstream + +Recent Fam19h EPYC server line of processors from AMD support system +management functionality via HSMP (Host System Management Port) interface. + +The Host System Management Port (HSMP) is an interface to provide +OS-level software with access to system management functions via a +set of mailbox registers. + +More details on the interface can be found in chapter +"7 Host System Management Port (HSMP)" of the following PPR +https://www.amd.com/system/files/TechDocs/55898_B1_pub_0.50.zip + +This patch adds new amd_hsmp module under the drivers/platforms/x86/ +which creates miscdevice with an IOCTL interface to the user space. +/dev/hsmp is for running the hsmp mailbox commands. + +Signed-off-by: Suma Hegde <suma.hegde@amd.com> +Signed-off-by: Naveen Krishna Chatradhi <nchatrad@amd.com> +Reviewed-by: Carlos Bilbao <carlos.bilbao@amd.com> +Acked-by: Song Liu <song@kernel.org> +Reviewed-by: Nathan Fontenot <nathan.fontenot@amd.com> +Link: https://lore.kernel.org/r/20220222050501.18789-1-nchatrad@amd.com +Reviewed-by: Hans de Goede <hdegoede@redhat.com> +Signed-off-by: Hans de Goede <hdegoede@redhat.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + .../userspace-api/ioctl/ioctl-number.rst | 2 + + MAINTAINERS | 10 + + arch/x86/include/asm/amd_hsmp.h | 16 + + arch/x86/include/uapi/asm/amd_hsmp.h | 203 +++++++++ + drivers/platform/x86/Kconfig | 13 + + drivers/platform/x86/Makefile | 1 + + drivers/platform/x86/amd_hsmp.c | 425 ++++++++++++++++++ + 7 files changed, 670 insertions(+) + create mode 100644 arch/x86/include/asm/amd_hsmp.h + create mode 100644 arch/x86/include/uapi/asm/amd_hsmp.h + create mode 100644 drivers/platform/x86/amd_hsmp.c + +diff --git a/Documentation/userspace-api/ioctl/ioctl-number.rst b/Documentation/userspace-api/ioctl/ioctl-number.rst +index 6655d929a351..4dc0b46fb022 100644 +--- a/Documentation/userspace-api/ioctl/ioctl-number.rst ++++ b/Documentation/userspace-api/ioctl/ioctl-number.rst +@@ -370,6 +370,8 @@ Code Seq# Include File Comments + <mailto:thomas@winischhofer.net> + 0xF6 all LTTng Linux Trace Toolkit Next Generation + <mailto:mathieu.desnoyers@efficios.com> ++0xF8 all arch/x86/include/uapi/asm/amd_hsmp.h AMD HSMP EPYC system management interface driver ++ <mailto:nchatrad@amd.com> + 0xFD all linux/dm-ioctl.h + 0xFE all linux/isst_if.h + ==== ===== ======================================================= ================================================================ +diff --git a/MAINTAINERS b/MAINTAINERS +index d80625ae4c12..670498533b01 100644 +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -980,6 +980,16 @@ L: platform-driver-x86@vger.kernel.org + S: Maintained + F: drivers/platform/x86/amd-pmc.* + ++AMD HSMP DRIVER ++M: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com> ++R: Carlos Bilbao <carlos.bilbao@amd.com> ++L: platform-driver-x86@vger.kernel.org ++S: Maintained ++F: Documentation/x86/amd_hsmp.rst ++F: arch/x86/include/asm/amd_hsmp.h ++F: arch/x86/include/uapi/asm/amd_hsmp.h ++F: drivers/platform/x86/amd_hsmp.c ++ + AMD POWERPLAY AND SWSMU + M: Evan Quan <evan.quan@amd.com> + L: amd-gfx@lists.freedesktop.org +diff --git a/arch/x86/include/asm/amd_hsmp.h b/arch/x86/include/asm/amd_hsmp.h +new file mode 100644 +index 000000000000..03c2ce3edaf5 +--- /dev/null ++++ b/arch/x86/include/asm/amd_hsmp.h +@@ -0,0 +1,16 @@ ++/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ ++ ++#ifndef _ASM_X86_AMD_HSMP_H_ ++#define _ASM_X86_AMD_HSMP_H_ ++ ++#include <uapi/asm/amd_hsmp.h> ++ ++#if IS_ENABLED(CONFIG_AMD_HSMP) ++int hsmp_send_message(struct hsmp_message *msg); ++#else ++static inline int hsmp_send_message(struct hsmp_message *msg) ++{ ++ return -ENODEV; ++} ++#endif ++#endif /*_ASM_X86_AMD_HSMP_H_*/ +diff --git a/arch/x86/include/uapi/asm/amd_hsmp.h b/arch/x86/include/uapi/asm/amd_hsmp.h +new file mode 100644 +index 000000000000..7ee7ba0d63a3 +--- /dev/null ++++ b/arch/x86/include/uapi/asm/amd_hsmp.h +@@ -0,0 +1,203 @@ ++/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ ++ ++#ifndef _UAPI_ASM_X86_AMD_HSMP_H_ ++#define _UAPI_ASM_X86_AMD_HSMP_H_ ++ ++#include <linux/types.h> ++ ++#pragma pack(4) ++ ++#define HSMP_MAX_MSG_LEN 8 ++ ++/* ++ * HSMP Messages supported ++ */ ++enum hsmp_message_ids { ++ HSMP_TEST = 1, /* 01h Increments input value by 1 */ ++ HSMP_GET_SMU_VER, /* 02h SMU FW version */ ++ HSMP_GET_PROTO_VER, /* 03h HSMP interface version */ ++ HSMP_GET_SOCKET_POWER, /* 04h average package power consumption */ ++ HSMP_SET_SOCKET_POWER_LIMIT, /* 05h Set the socket power limit */ ++ HSMP_GET_SOCKET_POWER_LIMIT, /* 06h Get current socket power limit */ ++ HSMP_GET_SOCKET_POWER_LIMIT_MAX,/* 07h Get maximum socket power value */ ++ HSMP_SET_BOOST_LIMIT, /* 08h Set a core maximum frequency limit */ ++ HSMP_SET_BOOST_LIMIT_SOCKET, /* 09h Set socket maximum frequency level */ ++ HSMP_GET_BOOST_LIMIT, /* 0Ah Get current frequency limit */ ++ HSMP_GET_PROC_HOT, /* 0Bh Get PROCHOT status */ ++ HSMP_SET_XGMI_LINK_WIDTH, /* 0Ch Set max and min width of xGMI Link */ ++ HSMP_SET_DF_PSTATE, /* 0Dh Alter APEnable/Disable messages behavior */ ++ HSMP_SET_AUTO_DF_PSTATE, /* 0Eh Enable DF P-State Performance Boost algorithm */ ++ HSMP_GET_FCLK_MCLK, /* 0Fh Get FCLK and MEMCLK for current socket */ ++ HSMP_GET_CCLK_THROTTLE_LIMIT, /* 10h Get CCLK frequency limit in socket */ ++ HSMP_GET_C0_PERCENT, /* 11h Get average C0 residency in socket */ ++ HSMP_SET_NBIO_DPM_LEVEL, /* 12h Set max/min LCLK DPM Level for a given NBIO */ ++ /* 13h Reserved */ ++ HSMP_GET_DDR_BANDWIDTH = 0x14, /* 14h Get theoretical maximum and current DDR Bandwidth */ ++ HSMP_GET_TEMP_MONITOR, /* 15h Get per-DIMM temperature and refresh rates */ ++ HSMP_MSG_ID_MAX, ++}; ++ ++struct hsmp_message { ++ __u32 msg_id; /* Message ID */ ++ __u16 num_args; /* Number of input argument words in message */ ++ __u16 response_sz; /* Number of expected output/response words */ ++ __u32 args[HSMP_MAX_MSG_LEN]; /* argument/response buffer */ ++ __u16 sock_ind; /* socket number */ ++}; ++ ++enum hsmp_msg_type { ++ HSMP_RSVD = -1, ++ HSMP_SET = 0, ++ HSMP_GET = 1, ++}; ++ ++struct hsmp_msg_desc { ++ int num_args; ++ int response_sz; ++ enum hsmp_msg_type type; ++}; ++ ++/* ++ * User may use these comments as reference, please find the ++ * supported list of messages and message definition in the ++ * HSMP chapter of respective family/model PPR. ++ * ++ * Not supported messages would return -ENOMSG. ++ */ ++static const struct hsmp_msg_desc hsmp_msg_desc_table[] = { ++ /* RESERVED */ ++ {0, 0, HSMP_RSVD}, ++ ++ /* ++ * HSMP_TEST, num_args = 1, response_sz = 1 ++ * input: args[0] = xx ++ * output: args[0] = xx + 1 ++ */ ++ {1, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_SMU_VER, num_args = 0, response_sz = 1 ++ * output: args[0] = smu fw ver ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_PROTO_VER, num_args = 0, response_sz = 1 ++ * output: args[0] = proto version ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_SOCKET_POWER, num_args = 0, response_sz = 1 ++ * output: args[0] = socket power in mWatts ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_SET_SOCKET_POWER_LIMIT, num_args = 1, response_sz = 0 ++ * input: args[0] = power limit value in mWatts ++ */ ++ {1, 0, HSMP_SET}, ++ ++ /* ++ * HSMP_GET_SOCKET_POWER_LIMIT, num_args = 0, response_sz = 1 ++ * output: args[0] = socket power limit value in mWatts ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_SOCKET_POWER_LIMIT_MAX, num_args = 0, response_sz = 1 ++ * output: args[0] = maximuam socket power limit in mWatts ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_SET_BOOST_LIMIT, num_args = 1, response_sz = 0 ++ * input: args[0] = apic id[31:16] + boost limit value in MHz[15:0] ++ */ ++ {1, 0, HSMP_SET}, ++ ++ /* ++ * HSMP_SET_BOOST_LIMIT_SOCKET, num_args = 1, response_sz = 0 ++ * input: args[0] = boost limit value in MHz ++ */ ++ {1, 0, HSMP_SET}, ++ ++ /* ++ * HSMP_GET_BOOST_LIMIT, num_args = 1, response_sz = 1 ++ * input: args[0] = apic id ++ * output: args[0] = boost limit value in MHz ++ */ ++ {1, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_PROC_HOT, num_args = 0, response_sz = 1 ++ * output: args[0] = proc hot status ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_SET_XGMI_LINK_WIDTH, num_args = 1, response_sz = 0 ++ * input: args[0] = min link width[15:8] + max link width[7:0] ++ */ ++ {1, 0, HSMP_SET}, ++ ++ /* ++ * HSMP_SET_DF_PSTATE, num_args = 1, response_sz = 0 ++ * input: args[0] = df pstate[7:0] ++ */ ++ {1, 0, HSMP_SET}, ++ ++ /* HSMP_SET_AUTO_DF_PSTATE, num_args = 0, response_sz = 0 */ ++ {0, 0, HSMP_SET}, ++ ++ /* ++ * HSMP_GET_FCLK_MCLK, num_args = 0, response_sz = 2 ++ * output: args[0] = fclk in MHz, args[1] = mclk in MHz ++ */ ++ {0, 2, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_CCLK_THROTTLE_LIMIT, num_args = 0, response_sz = 1 ++ * output: args[0] = core clock in MHz ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_C0_PERCENT, num_args = 0, response_sz = 1 ++ * output: args[0] = average c0 residency ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_SET_NBIO_DPM_LEVEL, num_args = 1, response_sz = 0 ++ * input: args[0] = nbioid[23:16] + max dpm level[15:8] + min dpm level[7:0] ++ */ ++ {1, 0, HSMP_SET}, ++ ++ /* RESERVED message */ ++ {0, 0, HSMP_RSVD}, ++ ++ /* ++ * HSMP_GET_DDR_BANDWIDTH, num_args = 0, response_sz = 1 ++ * output: args[0] = max bw in Gbps[31:20] + utilised bw in Gbps[19:8] + ++ * bw in percentage[7:0] ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_TEMP_MONITOR, num_args = 0, response_sz = 1 ++ * output: args[0] = temperature in degree celsius. [15:8] integer part + ++ * [7:5] fractional part ++ */ ++ {0, 1, HSMP_GET}, ++}; ++ ++/* Reset to default packing */ ++#pragma pack() ++ ++/* Define unique ioctl command for hsmp msgs using generic _IOWR */ ++#define HSMP_BASE_IOCTL_NR 0xF8 ++#define HSMP_IOCTL_CMD _IOWR(HSMP_BASE_IOCTL_NR, 0, struct hsmp_message) ++ ++#endif /*_ASM_X86_AMD_HSMP_H_*/ +diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig +index f1ff003bb14b..9a709e6d2d3e 100644 +--- a/drivers/platform/x86/Kconfig ++++ b/drivers/platform/x86/Kconfig +@@ -182,6 +182,19 @@ config AMD_PMC + If you choose to compile this driver as a module the module will be + called amd-pmc. + ++config AMD_HSMP ++ tristate "AMD HSMP Driver" ++ depends on AMD_NB && X86_64 ++ help ++ The driver provides a way for user space tools to monitor and manage ++ system management functionality on EPYC server CPUs from AMD. ++ ++ Host System Management Port (HSMP) interface is a mailbox interface ++ between the x86 core and the System Management Unit (SMU) firmware. ++ ++ If you choose to compile this driver as a module the module will be ++ called amd_hsmp. ++ + config ADV_SWBUTTON + tristate "Advantech ACPI Software Button Driver" + depends on ACPI && INPUT +diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile +index 2734a771d1f0..95864ab02045 100644 +--- a/drivers/platform/x86/Makefile ++++ b/drivers/platform/x86/Makefile +@@ -22,6 +22,7 @@ obj-$(CONFIG_ACER_WMI) += acer-wmi.o + + # AMD + obj-$(CONFIG_AMD_PMC) += amd-pmc.o ++obj-$(CONFIG_AMD_HSMP) += amd_hsmp.o + + # Advantech + obj-$(CONFIG_ADV_SWBUTTON) += adv_swbutton.o +diff --git a/drivers/platform/x86/amd_hsmp.c b/drivers/platform/x86/amd_hsmp.c +new file mode 100644 +index 000000000000..a0c54b838c11 +--- /dev/null ++++ b/drivers/platform/x86/amd_hsmp.c +@@ -0,0 +1,425 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * AMD HSMP Platform Driver ++ * Copyright (c) 2022, AMD. ++ * All Rights Reserved. ++ * ++ * This file provides a device implementation for HSMP interface ++ */ ++ ++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt ++ ++#include <asm/amd_hsmp.h> ++#include <asm/amd_nb.h> ++#include <linux/delay.h> ++#include <linux/io.h> ++#include <linux/miscdevice.h> ++#include <linux/module.h> ++#include <linux/pci.h> ++#include <linux/platform_device.h> ++#include <linux/semaphore.h> ++ ++#define DRIVER_NAME "amd_hsmp" ++#define DRIVER_VERSION "1.0" ++ ++/* HSMP Status / Error codes */ ++#define HSMP_STATUS_NOT_READY 0x00 ++#define HSMP_STATUS_OK 0x01 ++#define HSMP_ERR_INVALID_MSG 0xFE ++#define HSMP_ERR_INVALID_INPUT 0xFF ++ ++/* Timeout in millsec */ ++#define HSMP_MSG_TIMEOUT 100 ++#define HSMP_SHORT_SLEEP 1 ++ ++#define HSMP_WR true ++#define HSMP_RD false ++ ++/* ++ * To access specific HSMP mailbox register, s/w writes the SMN address of HSMP mailbox ++ * register into the SMN_INDEX register, and reads/writes the SMN_DATA reg. ++ * Below are required SMN address for HSMP Mailbox register offsets in SMU address space ++ */ ++#define SMN_HSMP_MSG_ID 0x3B10534 ++#define SMN_HSMP_MSG_RESP 0x3B10980 ++#define SMN_HSMP_MSG_DATA 0x3B109E0 ++ ++#define HSMP_INDEX_REG 0xc4 ++#define HSMP_DATA_REG 0xc8 ++ ++static struct semaphore *hsmp_sem; ++ ++static struct miscdevice hsmp_device; ++ ++static int amd_hsmp_rdwr(struct pci_dev *root, u32 address, ++ u32 *value, bool write) ++{ ++ int ret; ++ ++ ret = pci_write_config_dword(root, HSMP_INDEX_REG, address); ++ if (ret) ++ return ret; ++ ++ ret = (write ? pci_write_config_dword(root, HSMP_DATA_REG, *value) ++ : pci_read_config_dword(root, HSMP_DATA_REG, value)); ++ ++ return ret; ++} ++ ++/* ++ * Send a message to the HSMP port via PCI-e config space registers. ++ * ++ * The caller is expected to zero out any unused arguments. ++ * If a response is expected, the number of response words should be greater than 0. ++ * ++ * Returns 0 for success and populates the requested number of arguments. ++ * Returns a negative error code for failure. ++ */ ++static int __hsmp_send_message(struct pci_dev *root, struct hsmp_message *msg) ++{ ++ unsigned long timeout, short_sleep; ++ u32 mbox_status; ++ u32 index; ++ int ret; ++ ++ /* Clear the status register */ ++ mbox_status = HSMP_STATUS_NOT_READY; ++ ret = amd_hsmp_rdwr(root, SMN_HSMP_MSG_RESP, &mbox_status, HSMP_WR); ++ if (ret) { ++ pr_err("Error %d clearing mailbox status register\n", ret); ++ return ret; ++ } ++ ++ index = 0; ++ /* Write any message arguments */ ++ while (index < msg->num_args) { ++ ret = amd_hsmp_rdwr(root, SMN_HSMP_MSG_DATA + (index << 2), ++ &msg->args[index], HSMP_WR); ++ if (ret) { ++ pr_err("Error %d writing message argument %d\n", ret, index); ++ return ret; ++ } ++ index++; ++ } ++ ++ /* Write the message ID which starts the operation */ ++ ret = amd_hsmp_rdwr(root, SMN_HSMP_MSG_ID, &msg->msg_id, HSMP_WR); ++ if (ret) { ++ pr_err("Error %d writing message ID %u\n", ret, msg->msg_id); ++ return ret; ++ } ++ ++ /* ++ * Depending on when the trigger write completes relative to the SMU ++ * firmware 1 ms cycle, the operation may take from tens of us to 1 ms ++ * to complete. Some operations may take more. Therefore we will try ++ * a few short duration sleeps and switch to long sleeps if we don't ++ * succeed quickly. ++ */ ++ short_sleep = jiffies + msecs_to_jiffies(HSMP_SHORT_SLEEP); ++ timeout = jiffies + msecs_to_jiffies(HSMP_MSG_TIMEOUT); ++ ++ while (time_before(jiffies, timeout)) { ++ ret = amd_hsmp_rdwr(root, SMN_HSMP_MSG_RESP, &mbox_status, HSMP_RD); ++ if (ret) { ++ pr_err("Error %d reading mailbox status\n", ret); ++ return ret; ++ } ++ ++ if (mbox_status != HSMP_STATUS_NOT_READY) ++ break; ++ if (time_before(jiffies, short_sleep)) ++ usleep_range(50, 100); ++ else ++ usleep_range(1000, 2000); ++ } ++ ++ if (unlikely(mbox_status == HSMP_STATUS_NOT_READY)) { ++ return -ETIMEDOUT; ++ } else if (unlikely(mbox_status == HSMP_ERR_INVALID_MSG)) { ++ return -ENOMSG; ++ } else if (unlikely(mbox_status == HSMP_ERR_INVALID_INPUT)) { ++ return -EINVAL; ++ } else if (unlikely(mbox_status != HSMP_STATUS_OK)) { ++ pr_err("Message ID %u unknown failure (status = 0x%X)\n", ++ msg->msg_id, mbox_status); ++ return -EIO; ++ } ++ ++ /* ++ * SMU has responded OK. Read response data. ++ * SMU reads the input arguments from eight 32 bit registers starting ++ * from SMN_HSMP_MSG_DATA and writes the response data to the same ++ * SMN_HSMP_MSG_DATA address. ++ * We copy the response data if any, back to the args[]. ++ */ ++ index = 0; ++ while (index < msg->response_sz) { ++ ret = amd_hsmp_rdwr(root, SMN_HSMP_MSG_DATA + (index << 2), ++ &msg->args[index], HSMP_RD); ++ if (ret) { ++ pr_err("Error %d reading response %u for message ID:%u\n", ++ ret, index, msg->msg_id); ++ break; ++ } ++ index++; ++ } ++ ++ return ret; ++} ++ ++static int validate_message(struct hsmp_message *msg) ++{ ++ /* msg_id against valid range of message IDs */ ++ if (msg->msg_id < HSMP_TEST || msg->msg_id >= HSMP_MSG_ID_MAX) ++ return -ENOMSG; ++ ++ /* msg_id is a reserved message ID */ ++ if (hsmp_msg_desc_table[msg->msg_id].type == HSMP_RSVD) ++ return -ENOMSG; ++ ++ /* num_args and response_sz against the HSMP spec */ ++ if (msg->num_args != hsmp_msg_desc_table[msg->msg_id].num_args || ++ msg->response_sz != hsmp_msg_desc_table[msg->msg_id].response_sz) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++int hsmp_send_message(struct hsmp_message *msg) ++{ ++ struct amd_northbridge *nb; ++ int ret; ++ ++ if (!msg) ++ return -EINVAL; ++ ++ nb = node_to_amd_nb(msg->sock_ind); ++ if (!nb || !nb->root) ++ return -ENODEV; ++ ++ ret = validate_message(msg); ++ if (ret) ++ return ret; ++ ++ /* ++ * The time taken by smu operation to complete is between ++ * 10us to 1ms. Sometime it may take more time. ++ * In SMP system timeout of 100 millisecs should ++ * be enough for the previous thread to finish the operation ++ */ ++ ret = down_timeout(&hsmp_sem[msg->sock_ind], ++ msecs_to_jiffies(HSMP_MSG_TIMEOUT)); ++ if (ret < 0) ++ return ret; ++ ++ ret = __hsmp_send_message(nb->root, msg); ++ ++ up(&hsmp_sem[msg->sock_ind]); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(hsmp_send_message); ++ ++static int hsmp_test(u16 sock_ind, u32 value) ++{ ++ struct hsmp_message msg = { 0 }; ++ struct amd_northbridge *nb; ++ int ret = -ENODEV; ++ ++ nb = node_to_amd_nb(sock_ind); ++ if (!nb || !nb->root) ++ return ret; ++ ++ /* ++ * Test the hsmp port by performing TEST command. The test message ++ * takes one argument and returns the value of that argument + 1. ++ */ ++ msg.msg_id = HSMP_TEST; ++ msg.num_args = 1; ++ msg.response_sz = 1; ++ msg.args[0] = value; ++ msg.sock_ind = sock_ind; ++ ++ ret = __hsmp_send_message(nb->root, &msg); ++ if (ret) ++ return ret; ++ ++ /* Check the response value */ ++ if (msg.args[0] != (value + 1)) { ++ pr_err("Socket %d test message failed, Expected 0x%08X, received 0x%08X\n", ++ sock_ind, (value + 1), msg.args[0]); ++ return -EBADE; ++ } ++ ++ return ret; ++} ++ ++static long hsmp_ioctl(struct file *fp, unsigned int cmd, unsigned long arg) ++{ ++ int __user *arguser = (int __user *)arg; ++ struct hsmp_message msg = { 0 }; ++ int ret; ++ ++ if (copy_struct_from_user(&msg, sizeof(msg), arguser, sizeof(struct hsmp_message))) ++ return -EFAULT; ++ ++ /* ++ * Check msg_id is within the range of supported msg ids ++ * i.e within the array bounds of hsmp_msg_desc_table ++ */ ++ if (msg.msg_id < HSMP_TEST || msg.msg_id >= HSMP_MSG_ID_MAX) ++ return -ENOMSG; ++ ++ switch (fp->f_mode & (FMODE_WRITE | FMODE_READ)) { ++ case FMODE_WRITE: ++ /* ++ * Device is opened in O_WRONLY mode ++ * Execute only set/configure commands ++ */ ++ if (hsmp_msg_desc_table[msg.msg_id].type != HSMP_SET) ++ return -EINVAL; ++ break; ++ case FMODE_READ: ++ /* ++ * Device is opened in O_RDONLY mode ++ * Execute only get/monitor commands ++ */ ++ if (hsmp_msg_desc_table[msg.msg_id].type != HSMP_GET) ++ return -EINVAL; ++ break; ++ case FMODE_READ | FMODE_WRITE: ++ /* ++ * Device is opened in O_RDWR mode ++ * Execute both get/monitor and set/configure commands ++ */ ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ ret = hsmp_send_message(&msg); ++ if (ret) ++ return ret; ++ ++ if (hsmp_msg_desc_table[msg.msg_id].response_sz > 0) { ++ /* Copy results back to user for get/monitor commands */ ++ if (copy_to_user(arguser, &msg, sizeof(struct hsmp_message))) ++ return -EFAULT; ++ } ++ ++ return 0; ++} ++ ++static const struct file_operations hsmp_fops = { ++ .owner = THIS_MODULE, ++ .unlocked_ioctl = hsmp_ioctl, ++ .compat_ioctl = hsmp_ioctl, ++}; ++ ++static int hsmp_pltdrv_probe(struct platform_device *pdev) ++{ ++ int i; ++ ++ hsmp_sem = devm_kzalloc(&pdev->dev, ++ (amd_nb_num() * sizeof(struct semaphore)), ++ GFP_KERNEL); ++ if (!hsmp_sem) ++ return -ENOMEM; ++ ++ for (i = 0; i < amd_nb_num(); i++) ++ sema_init(&hsmp_sem[i], 1); ++ ++ hsmp_device.name = "hsmp_cdev"; ++ hsmp_device.minor = MISC_DYNAMIC_MINOR; ++ hsmp_device.fops = &hsmp_fops; ++ hsmp_device.parent = &pdev->dev; ++ hsmp_device.nodename = "hsmp"; ++ hsmp_device.mode = 0644; ++ ++ return misc_register(&hsmp_device); ++} ++ ++static int hsmp_pltdrv_remove(struct platform_device *pdev) ++{ ++ misc_deregister(&hsmp_device); ++ ++ return 0; ++} ++ ++static struct platform_driver amd_hsmp_driver = { ++ .probe = hsmp_pltdrv_probe, ++ .remove = hsmp_pltdrv_remove, ++ .driver = { ++ .name = DRIVER_NAME, ++ }, ++}; ++ ++static struct platform_device *amd_hsmp_platdev; ++ ++static int __init hsmp_plt_init(void) ++{ ++ int ret = -ENODEV; ++ u16 num_sockets; ++ int i; ++ ++ if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD || boot_cpu_data.x86 < 0x19) { ++ pr_err("HSMP is not supported on Family:%x model:%x\n", ++ boot_cpu_data.x86, boot_cpu_data.x86_model); ++ return ret; ++ } ++ ++ /* ++ * amd_nb_num() returns number of SMN/DF interfaces present in the system ++ * if we have N SMN/DF interfaces that ideally means N sockets ++ */ ++ num_sockets = amd_nb_num(); ++ if (num_sockets == 0) ++ return ret; ++ ++ /* Test the hsmp interface on each socket */ ++ for (i = 0; i < num_sockets; i++) { ++ ret = hsmp_test(i, 0xDEADBEEF); ++ if (ret) { ++ pr_err("HSMP is not supported on Fam:%x model:%x\n", ++ boot_cpu_data.x86, boot_cpu_data.x86_model); ++ pr_err("Or Is HSMP disabled in BIOS ?\n"); ++ return -EOPNOTSUPP; ++ } ++ } ++ ++ ret = platform_driver_register(&amd_hsmp_driver); ++ if (ret) ++ return ret; ++ ++ amd_hsmp_platdev = platform_device_alloc(DRIVER_NAME, -1); ++ if (!amd_hsmp_platdev) { ++ ret = -ENOMEM; ++ goto drv_unregister; ++ } ++ ++ ret = platform_device_add(amd_hsmp_platdev); ++ if (ret) { ++ platform_device_put(amd_hsmp_platdev); ++ goto drv_unregister; ++ } ++ ++ return 0; ++ ++drv_unregister: ++ platform_driver_unregister(&amd_hsmp_driver); ++ return ret; ++} ++ ++static void __exit hsmp_plt_exit(void) ++{ ++ platform_device_unregister(amd_hsmp_platdev); ++ platform_driver_unregister(&amd_hsmp_driver); ++} ++ ++device_initcall(hsmp_plt_init); ++module_exit(hsmp_plt_exit); ++ ++MODULE_DESCRIPTION("AMD HSMP Platform Interface Driver"); ++MODULE_VERSION(DRIVER_VERSION); ++MODULE_LICENSE("GPL v2"); +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0046-amd_hsmp-Add-HSMP-protocol-version-5-messages.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0046-amd_hsmp-Add-HSMP-protocol-version-5-messages.patch new file mode 100644 index 00000000..53b3825b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0046-amd_hsmp-Add-HSMP-protocol-version-5-messages.patch @@ -0,0 +1,167 @@ +From 3ed57aeb5c0fd7c47af56459c8abff1effa758bd Mon Sep 17 00:00:00 2001 +From: Suma Hegde <suma.hegde@amd.com> +Date: Wed, 27 Apr 2022 20:52:48 +0530 +Subject: [PATCH 46/86] amd_hsmp: Add HSMP protocol version 5 messages + +commit 830fe3c30dffe0b9f9485772070c29fcd8c2473d upstream + +HSMP protocol version 5 is supported on AMD family 19h model 10h +EPYC processors. This version brings new features such as +-- DIMM statistics +-- Bandwidth for IO and xGMI links +-- Monitor socket and core frequency limits +-- Configure power efficiency modes, DF pstate range etc + +Signed-off-by: Suma Hegde <suma.hegde@amd.com> +Reviewed-by: Carlos Bilbao <carlos.bilbao@amd.com> +Signed-off-by: Naveen Krishna Chatradhi <nchatrad@amd.com> +Link: https://lore.kernel.org/r/20220427152248.25643-1-nchatrad@amd.com +Reviewed-by: Hans de Goede <hdegoede@redhat.com> +Signed-off-by: Hans de Goede <hdegoede@redhat.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/uapi/asm/amd_hsmp.h | 114 +++++++++++++++++++++++++-- + 1 file changed, 109 insertions(+), 5 deletions(-) + +diff --git a/arch/x86/include/uapi/asm/amd_hsmp.h b/arch/x86/include/uapi/asm/amd_hsmp.h +index 7ee7ba0d63a3..769b939444ae 100644 +--- a/arch/x86/include/uapi/asm/amd_hsmp.h ++++ b/arch/x86/include/uapi/asm/amd_hsmp.h +@@ -31,9 +31,22 @@ enum hsmp_message_ids { + HSMP_GET_CCLK_THROTTLE_LIMIT, /* 10h Get CCLK frequency limit in socket */ + HSMP_GET_C0_PERCENT, /* 11h Get average C0 residency in socket */ + HSMP_SET_NBIO_DPM_LEVEL, /* 12h Set max/min LCLK DPM Level for a given NBIO */ +- /* 13h Reserved */ +- HSMP_GET_DDR_BANDWIDTH = 0x14, /* 14h Get theoretical maximum and current DDR Bandwidth */ +- HSMP_GET_TEMP_MONITOR, /* 15h Get per-DIMM temperature and refresh rates */ ++ HSMP_GET_NBIO_DPM_LEVEL, /* 13h Get LCLK DPM level min and max for a given NBIO */ ++ HSMP_GET_DDR_BANDWIDTH, /* 14h Get theoretical maximum and current DDR Bandwidth */ ++ HSMP_GET_TEMP_MONITOR, /* 15h Get socket temperature */ ++ HSMP_GET_DIMM_TEMP_RANGE, /* 16h Get per-DIMM temperature range and refresh rate */ ++ HSMP_GET_DIMM_POWER, /* 17h Get per-DIMM power consumption */ ++ HSMP_GET_DIMM_THERMAL, /* 18h Get per-DIMM thermal sensors */ ++ HSMP_GET_SOCKET_FREQ_LIMIT, /* 19h Get current active frequency per socket */ ++ HSMP_GET_CCLK_CORE_LIMIT, /* 1Ah Get CCLK frequency limit per core */ ++ HSMP_GET_RAILS_SVI, /* 1Bh Get SVI-based Telemetry for all rails */ ++ HSMP_GET_SOCKET_FMAX_FMIN, /* 1Ch Get Fmax and Fmin per socket */ ++ HSMP_GET_IOLINK_BANDWITH, /* 1Dh Get current bandwidth on IO Link */ ++ HSMP_GET_XGMI_BANDWITH, /* 1Eh Get current bandwidth on xGMI Link */ ++ HSMP_SET_GMI3_WIDTH, /* 1Fh Set max and min GMI3 Link width */ ++ HSMP_SET_PCI_RATE, /* 20h Control link rate on PCIe devices */ ++ HSMP_SET_POWER_MODE, /* 21h Select power efficiency profile policy */ ++ HSMP_SET_PSTATE_MAX_MIN, /* 22h Set the max and min DF P-State */ + HSMP_MSG_ID_MAX, + }; + +@@ -175,8 +188,12 @@ static const struct hsmp_msg_desc hsmp_msg_desc_table[] = { + */ + {1, 0, HSMP_SET}, + +- /* RESERVED message */ +- {0, 0, HSMP_RSVD}, ++ /* ++ * HSMP_GET_NBIO_DPM_LEVEL, num_args = 1, response_sz = 1 ++ * input: args[0] = nbioid[23:16] ++ * output: args[0] = max dpm level[15:8] + min dpm level[7:0] ++ */ ++ {1, 1, HSMP_GET}, + + /* + * HSMP_GET_DDR_BANDWIDTH, num_args = 0, response_sz = 1 +@@ -191,6 +208,93 @@ static const struct hsmp_msg_desc hsmp_msg_desc_table[] = { + * [7:5] fractional part + */ + {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_DIMM_TEMP_RANGE, num_args = 1, response_sz = 1 ++ * input: args[0] = DIMM address[7:0] ++ * output: args[0] = refresh rate[3] + temperature range[2:0] ++ */ ++ {1, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_DIMM_POWER, num_args = 1, response_sz = 1 ++ * input: args[0] = DIMM address[7:0] ++ * output: args[0] = DIMM power in mW[31:17] + update rate in ms[16:8] + ++ * DIMM address[7:0] ++ */ ++ {1, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_DIMM_THERMAL, num_args = 1, response_sz = 1 ++ * input: args[0] = DIMM address[7:0] ++ * output: args[0] = temperature in degree celcius[31:21] + update rate in ms[16:8] + ++ * DIMM address[7:0] ++ */ ++ {1, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_SOCKET_FREQ_LIMIT, num_args = 0, response_sz = 1 ++ * output: args[0] = frequency in MHz[31:16] + frequency source[15:0] ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_CCLK_CORE_LIMIT, num_args = 1, response_sz = 1 ++ * input: args[0] = apic id [31:0] ++ * output: args[0] = frequency in MHz[31:0] ++ */ ++ {1, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_RAILS_SVI, num_args = 0, response_sz = 1 ++ * output: args[0] = power in mW[31:0] ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_SOCKET_FMAX_FMIN, num_args = 0, response_sz = 1 ++ * output: args[0] = fmax in MHz[31:16] + fmin in MHz[15:0] ++ */ ++ {0, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_IOLINK_BANDWITH, num_args = 1, response_sz = 1 ++ * input: args[0] = link id[15:8] + bw type[2:0] ++ * output: args[0] = io bandwidth in Mbps[31:0] ++ */ ++ {1, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_GET_XGMI_BANDWITH, num_args = 1, response_sz = 1 ++ * input: args[0] = link id[15:8] + bw type[2:0] ++ * output: args[0] = xgmi bandwidth in Mbps[31:0] ++ */ ++ {1, 1, HSMP_GET}, ++ ++ /* ++ * HSMP_SET_GMI3_WIDTH, num_args = 1, response_sz = 0 ++ * input: args[0] = min link width[15:8] + max link width[7:0] ++ */ ++ {1, 0, HSMP_SET}, ++ ++ /* ++ * HSMP_SET_PCI_RATE, num_args = 1, response_sz = 1 ++ * input: args[0] = link rate control value ++ * output: args[0] = previous link rate control value ++ */ ++ {1, 1, HSMP_SET}, ++ ++ /* ++ * HSMP_SET_POWER_MODE, num_args = 1, response_sz = 0 ++ * input: args[0] = power efficiency mode[2:0] ++ */ ++ {1, 0, HSMP_SET}, ++ ++ /* ++ * HSMP_SET_PSTATE_MAX_MIN, num_args = 1, response_sz = 0 ++ * input: args[0] = min df pstate[15:8] + max df pstate[7:0] ++ */ ++ {1, 0, HSMP_SET}, + }; + + /* Reset to default packing */ +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0047-watchdog-Kconfig-fix-help-text-indentation.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0047-watchdog-Kconfig-fix-help-text-indentation.patch new file mode 100644 index 00000000..b7bedb4c --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0047-watchdog-Kconfig-fix-help-text-indentation.patch @@ -0,0 +1,114 @@ +From 501a94334c3873b8aa0d01b223eb4e6cfa64b42a Mon Sep 17 00:00:00 2001 +From: Luca Ceresoli <luca@lucaceresoli.net> +Date: Sat, 11 Dec 2021 18:59:48 +0100 +Subject: [PATCH 47/86] watchdog: Kconfig: fix help text indentation + +commit 15ebdc43d703e95e4ec9bae1b5411f1afb07c0b8 upstream + +Some entries indent their help text with 1 tab + 1 space or 1 tab only +instead of 1 tab + 2 spaces. Add the missing spaces. + +Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> +Acked-by: Randy Dunlap <rdunlap@infradead.org> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Link: https://lore.kernel.org/r/20211111225852.3128201-7-luca@lucaceresoli.net +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/watchdog/Kconfig | 48 ++++++++++++++++++++-------------------- + 1 file changed, 24 insertions(+), 24 deletions(-) + +diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig +index d937f957f8df..0234476615df 100644 +--- a/drivers/watchdog/Kconfig ++++ b/drivers/watchdog/Kconfig +@@ -694,10 +694,10 @@ config MAX77620_WATCHDOG + depends on MFD_MAX77620 || COMPILE_TEST + select WATCHDOG_CORE + help +- This is the driver for the Max77620 watchdog timer. +- Say 'Y' here to enable the watchdog timer support for +- MAX77620 chips. To compile this driver as a module, +- choose M here: the module will be called max77620_wdt. ++ This is the driver for the Max77620 watchdog timer. ++ Say 'Y' here to enable the watchdog timer support for ++ MAX77620 chips. To compile this driver as a module, ++ choose M here: the module will be called max77620_wdt. + + config IMX2_WDT + tristate "IMX2+ Watchdog" +@@ -1453,26 +1453,26 @@ config TQMX86_WDT + depends on X86 + select WATCHDOG_CORE + help +- This is the driver for the hardware watchdog timer in the TQMX86 IO +- controller found on some of their ComExpress Modules. ++ This is the driver for the hardware watchdog timer in the TQMX86 IO ++ controller found on some of their ComExpress Modules. + +- To compile this driver as a module, choose M here; the module +- will be called tqmx86_wdt. ++ To compile this driver as a module, choose M here; the module ++ will be called tqmx86_wdt. + +- Most people will say N. ++ Most people will say N. + + config VIA_WDT + tristate "VIA Watchdog Timer" + depends on X86 && PCI + select WATCHDOG_CORE + help +- This is the driver for the hardware watchdog timer on VIA +- southbridge chipset CX700, VX800/VX820 or VX855/VX875. ++ This is the driver for the hardware watchdog timer on VIA ++ southbridge chipset CX700, VX800/VX820 or VX855/VX875. + +- To compile this driver as a module, choose M here; the module +- will be called via_wdt. ++ To compile this driver as a module, choose M here; the module ++ will be called via_wdt. + +- Most people will say N. ++ Most people will say N. + + config W83627HF_WDT + tristate "Watchdog timer for W83627HF/W83627DHG and compatibles" +@@ -1758,10 +1758,10 @@ config BCM7038_WDT + depends on HAS_IOMEM + depends on ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST + help +- Watchdog driver for the built-in hardware in Broadcom 7038 and +- later SoCs used in set-top boxes. BCM7038 was made public +- during the 2004 CES, and since then, many Broadcom chips use this +- watchdog block, including some cable modem chips. ++ Watchdog driver for the built-in hardware in Broadcom 7038 and ++ later SoCs used in set-top boxes. BCM7038 was made public ++ during the 2004 CES, and since then, many Broadcom chips use this ++ watchdog block, including some cable modem chips. + + config IMGPDC_WDT + tristate "Imagination Technologies PDC Watchdog Timer" +@@ -2122,12 +2122,12 @@ config KEEMBAY_WATCHDOG + depends on ARCH_KEEMBAY || (ARM64 && COMPILE_TEST) + select WATCHDOG_CORE + help +- This option enable support for an In-secure watchdog timer driver for +- Intel Keem Bay SoC. This WDT has a 32 bit timer and decrements in every +- count unit. An interrupt will be triggered, when the count crosses +- the threshold configured in the register. ++ This option enable support for an In-secure watchdog timer driver for ++ Intel Keem Bay SoC. This WDT has a 32 bit timer and decrements in every ++ count unit. An interrupt will be triggered, when the count crosses ++ the threshold configured in the register. + +- To compile this driver as a module, choose M here: the +- module will be called keembay_wdt. ++ To compile this driver as a module, choose M here: the ++ module will be called keembay_wdt. + + endif # WATCHDOG +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0048-watchdog-Allow-building-BCM7038_WDT-for-BCM63XX.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0048-watchdog-Allow-building-BCM7038_WDT-for-BCM63XX.patch new file mode 100644 index 00000000..98ae9d73 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0048-watchdog-Allow-building-BCM7038_WDT-for-BCM63XX.patch @@ -0,0 +1,48 @@ +From 39bdf7bfeafdabdf0e150ba121405c61f5f692f0 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli <f.fainelli@gmail.com> +Date: Fri, 12 Nov 2021 14:46:33 -0800 +Subject: [PATCH 48/86] watchdog: Allow building BCM7038_WDT for BCM63XX + +commit cd91fb2776967b2b2dea27307a3f23ba3d9bbb32 upstream + +CONFIG_BCM63XX denotes the legacy MIPS-based DSL SoCs which utilize the +same piece of hardware as a watchdog, make it possible to select that +driver for those platforms. + +Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Link: https://lore.kernel.org/r/20211112224636.395101-5-f.fainelli@gmail.com +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/watchdog/Kconfig | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig +index 0234476615df..e7176f2a4491 100644 +--- a/drivers/watchdog/Kconfig ++++ b/drivers/watchdog/Kconfig +@@ -1753,15 +1753,16 @@ config BCM_KONA_WDT_DEBUG + If in doubt, say 'N'. + + config BCM7038_WDT +- tristate "BCM7038 Watchdog" ++ tristate "BCM63xx/BCM7038 Watchdog" + select WATCHDOG_CORE + depends on HAS_IOMEM +- depends on ARCH_BRCMSTB || BMIPS_GENERIC || COMPILE_TEST ++ depends on ARCH_BRCMSTB || BMIPS_GENERIC || BCM63XX || COMPILE_TEST + help + Watchdog driver for the built-in hardware in Broadcom 7038 and + later SoCs used in set-top boxes. BCM7038 was made public + during the 2004 CES, and since then, many Broadcom chips use this +- watchdog block, including some cable modem chips. ++ watchdog block, including some cable modem chips and DSL (63xx) ++ chips. + + config IMGPDC_WDT + tristate "Imagination Technologies PDC Watchdog Timer" +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0049-watchdog-renesas_wdt-Add-R-Car-Gen4-support.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0049-watchdog-renesas_wdt-Add-R-Car-Gen4-support.patch new file mode 100644 index 00000000..0797fbde --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0049-watchdog-renesas_wdt-Add-R-Car-Gen4-support.patch @@ -0,0 +1,37 @@ +From 9ac1e470fb8301d9ea2c609f974a525485464961 Mon Sep 17 00:00:00 2001 +From: Thanh Quan <thanh.quan.xn@renesas.com> +Date: Tue, 18 Jan 2022 18:09:03 +0100 +Subject: [PATCH 49/86] watchdog: renesas_wdt: Add R-Car Gen4 support + +commit 823a20e3c78be40a2bc88a5727a9c32ad6bb0b99 upstream + +Add the compatible string for the R-Car Gen4 family. +No further driver changes are needed. + +Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com> +Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> +Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Link: https://lore.kernel.org/r/cc395105e1d34aab2c076d368c0737833970b9d2.1642525158.git.geert+renesas@glider.be +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/watchdog/renesas_wdt.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c +index 5791198960e6..41d58ea5eb2f 100644 +--- a/drivers/watchdog/renesas_wdt.c ++++ b/drivers/watchdog/renesas_wdt.c +@@ -327,6 +327,7 @@ static SIMPLE_DEV_PM_OPS(rwdt_pm_ops, rwdt_suspend, rwdt_resume); + static const struct of_device_id rwdt_ids[] = { + { .compatible = "renesas,rcar-gen2-wdt", }, + { .compatible = "renesas,rcar-gen3-wdt", }, ++ { .compatible = "renesas,rcar-gen4-wdt", }, + { /* sentinel */ } + }; + MODULE_DEVICE_TABLE(of, rwdt_ids); +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0050-watchdog-allow-building-BCM7038_WDT-for-BCM4908.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0050-watchdog-allow-building-BCM7038_WDT-for-BCM4908.patch new file mode 100644 index 00000000..345a3c34 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0050-watchdog-allow-building-BCM7038_WDT-for-BCM4908.patch @@ -0,0 +1,40 @@ +From b40909202c4b23e5b07f66eeb4e3ee84130d94e2 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl> +Date: Wed, 9 Feb 2022 21:32:02 +0100 +Subject: [PATCH 50/86] watchdog: allow building BCM7038_WDT for BCM4908 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +commit cd91fb2776967b2b2dea27307a3f23ba3d9bbb32 upstream + +BCM4908 is a SoCs family that shares a lot of hardware with BCM63xx +including the watchdog block. Allow building this driver for it. + +Signed-off-by: RafaÅ‚ MiÅ‚ecki <rafal@milecki.pl> +Acked-by: Florian Fainelli <f.fainelli@gmail.com> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Link: https://lore.kernel.org/r/20220209203202.26395-1-zajec5@gmail.com +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/watchdog/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig +index e7176f2a4491..bfd10bdaf19a 100644 +--- a/drivers/watchdog/Kconfig ++++ b/drivers/watchdog/Kconfig +@@ -1756,7 +1756,7 @@ config BCM7038_WDT + tristate "BCM63xx/BCM7038 Watchdog" + select WATCHDOG_CORE + depends on HAS_IOMEM +- depends on ARCH_BRCMSTB || BMIPS_GENERIC || BCM63XX || COMPILE_TEST ++ depends on ARCH_BCM4908 || ARCH_BRCMSTB || BMIPS_GENERIC || BCM63XX || COMPILE_TEST + help + Watchdog driver for the built-in hardware in Broadcom 7038 and + later SoCs used in set-top boxes. BCM7038 was made public +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0051-watchdog-orion_wdt-support-pretimeout-on-Armada-XP.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0051-watchdog-orion_wdt-support-pretimeout-on-Armada-XP.patch new file mode 100644 index 00000000..946e187b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0051-watchdog-orion_wdt-support-pretimeout-on-Armada-XP.patch @@ -0,0 +1,65 @@ +From 578c70b22a4847bd2f58678383d684aeb01054cf Mon Sep 17 00:00:00 2001 +From: Chris Packham <chris.packham@alliedtelesis.co.nz> +Date: Fri, 11 Feb 2022 13:32:57 +1300 +Subject: [PATCH 51/86] watchdog: orion_wdt: support pretimeout on Armada-XP + +commit 7a6b3d8a432d18f48f3390de48f4361bc677712e upstream + +Commit e07a4c79ca75 ("watchdog: orion_wdt: use timer1 as a pretimeout") +added support for a pretimeout on Armada-38x variants. Because the +Armada-XP variants use armada370_start/armada370_stop (due to missing an +explicit RSTOUT mask bit for the watchdog). Add the required pretimeout +support to armada370_start/armada370_stop for Armada-XP. + +Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> +Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Link: https://lore.kernel.org/r/20220211003257.2037332-3-chris.packham@alliedtelesis.co.nz +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/watchdog/orion_wdt.c | 13 +++++++++---- + 1 file changed, 9 insertions(+), 4 deletions(-) + +diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c +index 127eefc9161d..e25e6bf4647f 100644 +--- a/drivers/watchdog/orion_wdt.c ++++ b/drivers/watchdog/orion_wdt.c +@@ -238,8 +238,10 @@ static int armada370_start(struct watchdog_device *wdt_dev) + atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0); + + /* Enable watchdog timer */ +- atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, +- dev->data->wdt_enable_bit); ++ reg = dev->data->wdt_enable_bit; ++ if (dev->wdt.info->options & WDIOF_PRETIMEOUT) ++ reg |= TIMER1_ENABLE_BIT; ++ atomic_io_modify(dev->reg + TIMER_CTRL, reg, reg); + + /* Enable reset on watchdog */ + reg = readl(dev->rstout); +@@ -312,7 +314,7 @@ static int armada375_stop(struct watchdog_device *wdt_dev) + static int armada370_stop(struct watchdog_device *wdt_dev) + { + struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev); +- u32 reg; ++ u32 reg, mask; + + /* Disable reset on watchdog */ + reg = readl(dev->rstout); +@@ -320,7 +322,10 @@ static int armada370_stop(struct watchdog_device *wdt_dev) + writel(reg, dev->rstout); + + /* Disable watchdog timer */ +- atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); ++ mask = dev->data->wdt_enable_bit; ++ if (wdt_dev->info->options & WDIOF_PRETIMEOUT) ++ mask |= TIMER1_ENABLE_BIT; ++ atomic_io_modify(dev->reg + TIMER_CTRL, mask, 0); + + return 0; + } +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0052-watchdog-ixp4xx-Implement-restart.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0052-watchdog-ixp4xx-Implement-restart.patch new file mode 100644 index 00000000..403e9725 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0052-watchdog-ixp4xx-Implement-restart.patch @@ -0,0 +1,51 @@ +From 0b531a140a06ff68bce9bf3ed881d2daf40eec7e Mon Sep 17 00:00:00 2001 +From: Linus Walleij <linus.walleij@linaro.org> +Date: Mon, 7 Feb 2022 00:00:28 +0100 +Subject: [PATCH 52/86] watchdog: ixp4xx: Implement restart + +commit 1aea522809e67f42295ceb1d21429d76c43697e4 upstream + +Implement watchdog restart in the IXP4xx watchdog timer. + +Signed-off-by: Linus Walleij <linus.walleij@linaro.org> +Reviewed-by: Guenter Roeck <linux@roeck-us.net> +Link: https://lore.kernel.org/r/20220206230028.476659-1-linus.walleij@linaro.org +Signed-off-by: Guenter Roeck <linux@roeck-us.net> +Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/watchdog/ixp4xx_wdt.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +diff --git a/drivers/watchdog/ixp4xx_wdt.c b/drivers/watchdog/ixp4xx_wdt.c +index 31b03fa71341..281a48d9889f 100644 +--- a/drivers/watchdog/ixp4xx_wdt.c ++++ b/drivers/watchdog/ixp4xx_wdt.c +@@ -84,10 +84,24 @@ static int ixp4xx_wdt_set_timeout(struct watchdog_device *wdd, + return 0; + } + ++static int ixp4xx_wdt_restart(struct watchdog_device *wdd, ++ unsigned long action, void *data) ++{ ++ struct ixp4xx_wdt *iwdt = to_ixp4xx_wdt(wdd); ++ ++ __raw_writel(IXP4XX_WDT_KEY, iwdt->base + IXP4XX_OSWK_OFFSET); ++ __raw_writel(0, iwdt->base + IXP4XX_OSWT_OFFSET); ++ __raw_writel(IXP4XX_WDT_COUNT_ENABLE | IXP4XX_WDT_RESET_ENABLE, ++ iwdt->base + IXP4XX_OSWE_OFFSET); ++ ++ return 0; ++} ++ + static const struct watchdog_ops ixp4xx_wdt_ops = { + .start = ixp4xx_wdt_start, + .stop = ixp4xx_wdt_stop, + .set_timeout = ixp4xx_wdt_set_timeout, ++ .restart = ixp4xx_wdt_restart, + .owner = THIS_MODULE, + }; + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0053-perf-Enable-branch-record-for-software-events.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0053-perf-Enable-branch-record-for-software-events.patch new file mode 100644 index 00000000..47e6c182 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0053-perf-Enable-branch-record-for-software-events.patch @@ -0,0 +1,279 @@ +From b04d643c11b5a3ce0571c39fd4c1f87a0fd2e9c9 Mon Sep 17 00:00:00 2001 +From: Song Liu <songliubraving@fb.com> +Date: Fri, 10 Sep 2021 11:33:50 -0700 +Subject: [PATCH 53/86] perf: Enable branch record for software events + +commit c22ac2a3d4bd83411ebf0b1726e9e5fc4f5e7ebf upstream + +The typical way to access branch record (e.g. Intel LBR) is via hardware +perf_event. For CPUs with FREEZE_LBRS_ON_PMI support, PMI could capture +reliable LBR. On the other hand, LBR could also be useful in non-PMI +scenario. For example, in kretprobe or bpf fexit program, LBR could +provide a lot of information on what happened with the function. Add API +to use branch record for software use. + +Note that, when the software event triggers, it is necessary to stop the +branch record hardware asap. Therefore, static_call is used to remove some +branch instructions in this process. + +Suggested-by: Peter Zijlstra <peterz@infradead.org> +Signed-off-by: Song Liu <songliubraving@fb.com> +Signed-off-by: Alexei Starovoitov <ast@kernel.org> +Acked-by: John Fastabend <john.fastabend@gmail.com> +Acked-by: Andrii Nakryiko <andrii@kernel.org> +Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/bpf/20210910183352.3151445-2-songliubraving@fb.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/intel/core.c | 67 ++++++++++++++++++++++++++++++++---- + arch/x86/events/intel/ds.c | 2 +- + arch/x86/events/intel/lbr.c | 20 +++-------- + arch/x86/events/perf_event.h | 19 ++++++++++ + include/linux/perf_event.h | 23 +++++++++++++ + kernel/events/core.c | 2 ++ + 6 files changed, 111 insertions(+), 22 deletions(-) + +diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c +index 588b83cc730d..9918f0b08552 100644 +--- a/arch/x86/events/intel/core.c ++++ b/arch/x86/events/intel/core.c +@@ -2145,19 +2145,19 @@ static __initconst const u64 knl_hw_cache_extra_regs + * However, there are some cases which may change PEBS status, e.g. PMI + * throttle. The PEBS_ENABLE should be updated where the status changes. + */ +-static void __intel_pmu_disable_all(void) ++static __always_inline void __intel_pmu_disable_all(bool bts) + { + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); + + wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0); + +- if (test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) ++ if (bts && test_bit(INTEL_PMC_IDX_FIXED_BTS, cpuc->active_mask)) + intel_pmu_disable_bts(); + } + +-static void intel_pmu_disable_all(void) ++static __always_inline void intel_pmu_disable_all(void) + { +- __intel_pmu_disable_all(); ++ __intel_pmu_disable_all(true); + intel_pmu_pebs_disable_all(); + intel_pmu_lbr_disable_all(); + } +@@ -2188,6 +2188,49 @@ static void intel_pmu_enable_all(int added) + __intel_pmu_enable_all(added, false); + } + ++static noinline int ++__intel_pmu_snapshot_branch_stack(struct perf_branch_entry *entries, ++ unsigned int cnt, unsigned long flags) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ ++ intel_pmu_lbr_read(); ++ cnt = min_t(unsigned int, cnt, x86_pmu.lbr_nr); ++ ++ memcpy(entries, cpuc->lbr_entries, sizeof(struct perf_branch_entry) * cnt); ++ intel_pmu_enable_all(0); ++ local_irq_restore(flags); ++ return cnt; ++} ++ ++static int ++intel_pmu_snapshot_branch_stack(struct perf_branch_entry *entries, unsigned int cnt) ++{ ++ unsigned long flags; ++ ++ /* must not have branches... */ ++ local_irq_save(flags); ++ __intel_pmu_disable_all(false); /* we don't care about BTS */ ++ __intel_pmu_pebs_disable_all(); ++ __intel_pmu_lbr_disable(); ++ /* ... until here */ ++ return __intel_pmu_snapshot_branch_stack(entries, cnt, flags); ++} ++ ++static int ++intel_pmu_snapshot_arch_branch_stack(struct perf_branch_entry *entries, unsigned int cnt) ++{ ++ unsigned long flags; ++ ++ /* must not have branches... */ ++ local_irq_save(flags); ++ __intel_pmu_disable_all(false); /* we don't care about BTS */ ++ __intel_pmu_pebs_disable_all(); ++ __intel_pmu_arch_lbr_disable(); ++ /* ... until here */ ++ return __intel_pmu_snapshot_branch_stack(entries, cnt, flags); ++} ++ + /* + * Workaround for: + * Intel Errata AAK100 (model 26) +@@ -2934,7 +2977,7 @@ static int intel_pmu_handle_irq(struct pt_regs *regs) + apic_write(APIC_LVTPC, APIC_DM_NMI); + intel_bts_disable_local(); + cpuc->enabled = 0; +- __intel_pmu_disable_all(); ++ __intel_pmu_disable_all(true); + handled = intel_pmu_drain_bts_buffer(); + handled += intel_bts_interrupt(); + status = intel_pmu_get_status(); +@@ -6320,9 +6363,21 @@ __init int intel_pmu_init(void) + x86_pmu.lbr_nr = 0; + } + +- if (x86_pmu.lbr_nr) ++ if (x86_pmu.lbr_nr) { + pr_cont("%d-deep LBR, ", x86_pmu.lbr_nr); + ++ /* only support branch_stack snapshot for perfmon >= v2 */ ++ if (x86_pmu.disable_all == intel_pmu_disable_all) { ++ if (boot_cpu_has(X86_FEATURE_ARCH_LBR)) { ++ static_call_update(perf_snapshot_branch_stack, ++ intel_pmu_snapshot_arch_branch_stack); ++ } else { ++ static_call_update(perf_snapshot_branch_stack, ++ intel_pmu_snapshot_branch_stack); ++ } ++ } ++ } ++ + intel_pmu_check_extra_regs(x86_pmu.extra_regs); + + /* Support full width counters using alternative MSR range */ +diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c +index 266ac8263696..bda7b1d41b48 100644 +--- a/arch/x86/events/intel/ds.c ++++ b/arch/x86/events/intel/ds.c +@@ -1310,7 +1310,7 @@ void intel_pmu_pebs_disable_all(void) + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); + + if (cpuc->pebs_enabled) +- wrmsrl(MSR_IA32_PEBS_ENABLE, 0); ++ __intel_pmu_pebs_disable_all(); + } + + static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs) +diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c +index 673721387391..513bf1f30c2a 100644 +--- a/arch/x86/events/intel/lbr.c ++++ b/arch/x86/events/intel/lbr.c +@@ -228,20 +228,6 @@ static void __intel_pmu_lbr_enable(bool pmi) + wrmsrl(MSR_ARCH_LBR_CTL, lbr_select | ARCH_LBR_CTL_LBREN); + } + +-static void __intel_pmu_lbr_disable(void) +-{ +- u64 debugctl; +- +- if (static_cpu_has(X86_FEATURE_ARCH_LBR)) { +- wrmsrl(MSR_ARCH_LBR_CTL, 0); +- return; +- } +- +- rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); +- debugctl &= ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI); +- wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); +-} +- + void intel_pmu_lbr_reset_32(void) + { + int i; +@@ -779,8 +765,12 @@ void intel_pmu_lbr_disable_all(void) + { + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); + +- if (cpuc->lbr_users && !vlbr_exclude_host()) ++ if (cpuc->lbr_users && !vlbr_exclude_host()) { ++ if (static_cpu_has(X86_FEATURE_ARCH_LBR)) ++ return __intel_pmu_arch_lbr_disable(); ++ + __intel_pmu_lbr_disable(); ++ } + } + + void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc) +diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h +index e3ac05c97b5e..0e3e596e33cd 100644 +--- a/arch/x86/events/perf_event.h ++++ b/arch/x86/events/perf_event.h +@@ -1240,6 +1240,25 @@ static inline bool intel_pmu_has_bts(struct perf_event *event) + return intel_pmu_has_bts_period(event, hwc->sample_period); + } + ++static __always_inline void __intel_pmu_pebs_disable_all(void) ++{ ++ wrmsrl(MSR_IA32_PEBS_ENABLE, 0); ++} ++ ++static __always_inline void __intel_pmu_arch_lbr_disable(void) ++{ ++ wrmsrl(MSR_ARCH_LBR_CTL, 0); ++} ++ ++static __always_inline void __intel_pmu_lbr_disable(void) ++{ ++ u64 debugctl; ++ ++ rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); ++ debugctl &= ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_FREEZE_LBRS_ON_PMI); ++ wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); ++} ++ + int intel_pmu_save_and_restart(struct perf_event *event); + + struct event_constraint * +diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h +index 6cce33e7e7ac..6c309a7dd622 100644 +--- a/include/linux/perf_event.h ++++ b/include/linux/perf_event.h +@@ -57,6 +57,7 @@ struct perf_guest_info_callbacks { + #include <linux/cgroup.h> + #include <linux/refcount.h> + #include <linux/security.h> ++#include <linux/static_call.h> + #include <asm/local.h> + + struct perf_callchain_entry { +@@ -1616,4 +1617,26 @@ extern void __weak arch_perf_update_userpage(struct perf_event *event, + extern __weak u64 arch_perf_get_page_size(struct mm_struct *mm, unsigned long addr); + #endif + ++/* ++ * Snapshot branch stack on software events. ++ * ++ * Branch stack can be very useful in understanding software events. For ++ * example, when a long function, e.g. sys_perf_event_open, returns an ++ * errno, it is not obvious why the function failed. Branch stack could ++ * provide very helpful information in this type of scenarios. ++ * ++ * On software event, it is necessary to stop the hardware branch recorder ++ * fast. Otherwise, the hardware register/buffer will be flushed with ++ * entries of the triggering event. Therefore, static call is used to ++ * stop the hardware recorder. ++ */ ++ ++/* ++ * cnt is the number of entries allocated for entries. ++ * Return number of entries copied to . ++ */ ++typedef int (perf_snapshot_branch_stack_t)(struct perf_branch_entry *entries, ++ unsigned int cnt); ++DECLARE_STATIC_CALL(perf_snapshot_branch_stack, perf_snapshot_branch_stack_t); ++ + #endif /* _LINUX_PERF_EVENT_H */ +diff --git a/kernel/events/core.c b/kernel/events/core.c +index c6c7a4d80573..7f8daa803b4e 100644 +--- a/kernel/events/core.c ++++ b/kernel/events/core.c +@@ -13585,3 +13585,5 @@ struct cgroup_subsys perf_event_cgrp_subsys = { + .threaded = true, + }; + #endif /* CONFIG_CGROUP_PERF */ ++ ++DEFINE_STATIC_CALL_RET0(perf_snapshot_branch_stack, perf_snapshot_branch_stack_t); +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0054-x86-cpufeatures-Add-AMD-Collaborative-Processor-Perf.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0054-x86-cpufeatures-Add-AMD-Collaborative-Processor-Perf.patch new file mode 100644 index 00000000..0c1c511a --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0054-x86-cpufeatures-Add-AMD-Collaborative-Processor-Perf.patch @@ -0,0 +1,40 @@ +From ea860095231253ca7a4d06919918a281998f1f27 Mon Sep 17 00:00:00 2001 +From: Huang Rui <ray.huang@amd.com> +Date: Fri, 24 Dec 2021 09:04:55 +0800 +Subject: [PATCH 54/86] x86/cpufeatures: Add AMD Collaborative Processor + Performance Control feature flag + +commit d341db8f48ea43314f489921962c7f8f4ec27239 upstream + +Add Collaborative Processor Performance Control feature flag for AMD +processors. + +This feature flag will be used on the following AMD P-State driver. The +AMD P-State driver has two approaches to implement the frequency control +behavior. That depends on the CPU hardware implementation. One is "Full +MSR Support" and another is "Shared Memory Support". The feature flag +indicates the current processors with "Full MSR Support". + +Acked-by: Borislav Petkov <bp@suse.de> +Signed-off-by: Huang Rui <ray.huang@amd.com> +Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/cpufeatures.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h +index 2b56bfef9917..ebe6666bbc71 100644 +--- a/arch/x86/include/asm/cpufeatures.h ++++ b/arch/x86/include/asm/cpufeatures.h +@@ -321,6 +321,7 @@ + #define X86_FEATURE_AMD_SSBD (13*32+24) /* "" Speculative Store Bypass Disable */ + #define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */ + #define X86_FEATURE_AMD_SSB_NO (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */ ++#define X86_FEATURE_CPPC (13*32+27) /* Collaborative Processor Performance Control */ + #define X86_FEATURE_BTC_NO (13*32+29) /* "" Not vulnerable to Branch Type Confusion */ + + /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */ +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0055-x86-perf-Move-RDPMC-event-flag-to-a-common-definitio.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0055-x86-perf-Move-RDPMC-event-flag-to-a-common-definitio.patch new file mode 100644 index 00000000..9a91474d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0055-x86-perf-Move-RDPMC-event-flag-to-a-common-definitio.patch @@ -0,0 +1,123 @@ +From 57ca0da51da238153252c384d8f5e0c17db361a7 Mon Sep 17 00:00:00 2001 +From: Rob Herring <robh@kernel.org> +Date: Wed, 8 Dec 2021 14:11:20 -0600 +Subject: [PATCH 55/86] x86: perf: Move RDPMC event flag to a common definition + +commit 369461ce8fb6c8156206c7110d7da48e9fbc41bb upstream + +In preparation to enable user counter access on arm64 and to move some +of the user access handling to perf core, create a common event flag for +user counter access and convert x86 to use it. + +Since the architecture specific flags start at the LSB, starting at the +MSB for common flags. + +Cc: Peter Zijlstra <peterz@infradead.org> +Cc: Ingo Molnar <mingo@redhat.com> +Cc: Arnaldo Carvalho de Melo <acme@kernel.org> +Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> +Cc: Jiri Olsa <jolsa@redhat.com> +Cc: Namhyung Kim <namhyung@kernel.org> +Cc: Kan Liang <kan.liang@linux.intel.com> +Cc: Thomas Gleixner <tglx@linutronix.de> +Cc: Borislav Petkov <bp@alien8.de> +Cc: x86@kernel.org +Cc: "H. Peter Anvin" <hpa@zytor.com> +Cc: linux-perf-users@vger.kernel.org +Reviewed-by: Mark Rutland <mark.rutland@arm.com> +Reviewed-by: Thomas Gleixner <tglx@linutronix.de> +Signed-off-by: Rob Herring <robh@kernel.org> +Link: https://lore.kernel.org/r/20211208201124.310740-2-robh@kernel.org +Signed-off-by: Will Deacon <will@kernel.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/core.c | 10 +++++----- + arch/x86/events/perf_event.h | 2 +- + include/linux/perf_event.h | 9 +++++++++ + 3 files changed, 15 insertions(+), 6 deletions(-) + +diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c +index 81d5e0a1f48c..4147c9b94929 100644 +--- a/arch/x86/events/core.c ++++ b/arch/x86/events/core.c +@@ -2470,7 +2470,7 @@ static int x86_pmu_event_init(struct perf_event *event) + + if (READ_ONCE(x86_pmu.attr_rdpmc) && + !(event->hw.flags & PERF_X86_EVENT_LARGE_PEBS)) +- event->hw.flags |= PERF_X86_EVENT_RDPMC_ALLOWED; ++ event->hw.flags |= PERF_EVENT_FLAG_USER_READ_CNT; + + return err; + } +@@ -2504,7 +2504,7 @@ void perf_clear_dirty_counters(void) + + static void x86_pmu_event_mapped(struct perf_event *event, struct mm_struct *mm) + { +- if (!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED)) ++ if (!(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT)) + return; + + /* +@@ -2525,7 +2525,7 @@ static void x86_pmu_event_mapped(struct perf_event *event, struct mm_struct *mm) + + static void x86_pmu_event_unmapped(struct perf_event *event, struct mm_struct *mm) + { +- if (!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED)) ++ if (!(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT)) + return; + + if (atomic_dec_and_test(&mm->context.perf_rdpmc_allowed)) +@@ -2536,7 +2536,7 @@ static int x86_pmu_event_idx(struct perf_event *event) + { + struct hw_perf_event *hwc = &event->hw; + +- if (!(hwc->flags & PERF_X86_EVENT_RDPMC_ALLOWED)) ++ if (!(hwc->flags & PERF_EVENT_FLAG_USER_READ_CNT)) + return 0; + + if (is_metric_idx(hwc->idx)) +@@ -2719,7 +2719,7 @@ void arch_perf_update_userpage(struct perf_event *event, + userpg->cap_user_time = 0; + userpg->cap_user_time_zero = 0; + userpg->cap_user_rdpmc = +- !!(event->hw.flags & PERF_X86_EVENT_RDPMC_ALLOWED); ++ !!(event->hw.flags & PERF_EVENT_FLAG_USER_READ_CNT); + userpg->pmc_width = x86_pmu.cntval_bits; + + if (!using_native_sched_clock() || !sched_clock_stable()) +diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h +index 0e3e596e33cd..b48f3ab9125f 100644 +--- a/arch/x86/events/perf_event.h ++++ b/arch/x86/events/perf_event.h +@@ -73,7 +73,7 @@ static inline bool constraint_match(struct event_constraint *c, u64 ecode) + #define PERF_X86_EVENT_PEBS_NA_HSW 0x0010 /* haswell style datala, unknown */ + #define PERF_X86_EVENT_EXCL 0x0020 /* HT exclusivity on counter */ + #define PERF_X86_EVENT_DYNAMIC 0x0040 /* dynamic alloc'd constraint */ +-#define PERF_X86_EVENT_RDPMC_ALLOWED 0x0080 /* grant rdpmc permission */ ++ + #define PERF_X86_EVENT_EXCL_ACCT 0x0100 /* accounted EXCL event */ + #define PERF_X86_EVENT_AUTO_RELOAD 0x0200 /* use PEBS auto-reload */ + #define PERF_X86_EVENT_LARGE_PEBS 0x0400 /* use large PEBS */ +diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h +index 6c309a7dd622..d66053503e7f 100644 +--- a/include/linux/perf_event.h ++++ b/include/linux/perf_event.h +@@ -129,6 +129,15 @@ struct hw_perf_event_extra { + int idx; /* index in shared_regs->regs[] */ + }; + ++/** ++ * hw_perf_event::flag values ++ * ++ * PERF_EVENT_FLAG_ARCH bits are reserved for architecture-specific ++ * usage. ++ */ ++#define PERF_EVENT_FLAG_ARCH 0x0000ffff ++#define PERF_EVENT_FLAG_USER_READ_CNT 0x80000000 ++ + /** + * struct hw_perf_event - performance event hardware details: + */ +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0056-x86-msr-Add-AMD-CPPC-MSR-definitions.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0056-x86-msr-Add-AMD-CPPC-MSR-definitions.patch new file mode 100644 index 00000000..c4d54051 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0056-x86-msr-Add-AMD-CPPC-MSR-definitions.patch @@ -0,0 +1,50 @@ +From 309f58419652f454bcb7b728beb375bb49117a63 Mon Sep 17 00:00:00 2001 +From: Huang Rui <ray.huang@amd.com> +Date: Fri, 24 Dec 2021 09:04:56 +0800 +Subject: [PATCH 56/86] x86/msr: Add AMD CPPC MSR definitions + +commit 89aa94b4a218339b08f052a28c55322d5a13fc9e upstream + +AMD CPPC (Collaborative Processor Performance Control) function uses MSR +registers to manage the performance hints. So add the MSR register macro +here. + +Signed-off-by: Huang Rui <ray.huang@amd.com> +Acked-by: Borislav Petkov <bp@suse.de> +Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/msr-index.h | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h +index 8f38265bc81d..23efce987acf 100644 +--- a/arch/x86/include/asm/msr-index.h ++++ b/arch/x86/include/asm/msr-index.h +@@ -525,6 +525,23 @@ + + #define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f + ++/* AMD Collaborative Processor Performance Control MSRs */ ++#define MSR_AMD_CPPC_CAP1 0xc00102b0 ++#define MSR_AMD_CPPC_ENABLE 0xc00102b1 ++#define MSR_AMD_CPPC_CAP2 0xc00102b2 ++#define MSR_AMD_CPPC_REQ 0xc00102b3 ++#define MSR_AMD_CPPC_STATUS 0xc00102b4 ++ ++#define AMD_CPPC_LOWEST_PERF(x) (((x) >> 0) & 0xff) ++#define AMD_CPPC_LOWNONLIN_PERF(x) (((x) >> 8) & 0xff) ++#define AMD_CPPC_NOMINAL_PERF(x) (((x) >> 16) & 0xff) ++#define AMD_CPPC_HIGHEST_PERF(x) (((x) >> 24) & 0xff) ++ ++#define AMD_CPPC_MAX_PERF(x) (((x) & 0xff) << 0) ++#define AMD_CPPC_MIN_PERF(x) (((x) & 0xff) << 8) ++#define AMD_CPPC_DES_PERF(x) (((x) & 0xff) << 16) ++#define AMD_CPPC_ENERGY_PERF_PREF(x) (((x) & 0xff) << 24) ++ + /* Fam 17h MSRs */ + #define MSR_F17H_IRPERF 0xc00000e9 + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0057-perf-x86-intel-lbr-Support-LBR-format-V7.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0057-perf-x86-intel-lbr-Support-LBR-format-V7.patch new file mode 100644 index 00000000..2d9ca24a --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0057-perf-x86-intel-lbr-Support-LBR-format-V7.patch @@ -0,0 +1,296 @@ +From 6577a635e80832fdae2b2c4b7a68639203b77f7a Mon Sep 17 00:00:00 2001 +From: "Peter Zijlstra (Intel)" <peterz@infradead.org> +Date: Tue, 4 Jan 2022 08:51:16 -0800 +Subject: [PATCH 57/86] perf/x86/intel/lbr: Support LBR format V7 + +commit 1ac7fd8159a842b3aa51f0b46a351fa3eeb8fbf3 upstream + +The Goldmont plus and Tremont have LBR format V7. The V7 has LBR_INFO, +which is the same as LBR format V5. But V7 doesn't support TSX. + +Without the patch, the associated misprediction and cycles information +in the LBR_INFO may be lost on a Goldmont plus platform. +For Tremont, the patch only impacts the non-PEBS events. Because of the +adaptive PEBS, the LBR_INFO is always processed for a PEBS event. + +Currently, two different ways are used to check the LBR capabilities, +which make the codes complex and confusing. +For the LBR format V4 and earlier, the global static lbr_desc array is +used to store the flags for the LBR capabilities in each LBR format. +For LBR format V5 and V6, the current code checks the version number +for the LBR capabilities. + +There are common LBR capabilities among LBR format versions. Several +flags for the LBR capabilities are introduced into the struct x86_pmu. +The flags, which can be shared among LBR formats, are used to check +the LBR capabilities. Add intel_pmu_lbr_init() to set the flags +accordingly at boot time. + +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Signed-off-by: Kan Liang <kan.liang@linux.intel.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Tested-by: Kan Liang <kan.liang@linux.intel.com> +Link: https://lkml.kernel.org/r/1641315077-96661-1-git-send-email-peterz@infradead.org +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/intel/core.c | 2 + + arch/x86/events/intel/lbr.c | 114 ++++++++++++++++++++--------------- + arch/x86/events/perf_event.h | 10 ++- + 3 files changed, 75 insertions(+), 51 deletions(-) + +diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c +index 9918f0b08552..9089b13d1a9b 100644 +--- a/arch/x86/events/intel/core.c ++++ b/arch/x86/events/intel/core.c +@@ -6364,6 +6364,8 @@ __init int intel_pmu_init(void) + } + + if (x86_pmu.lbr_nr) { ++ intel_pmu_lbr_init(); ++ + pr_cont("%d-deep LBR, ", x86_pmu.lbr_nr); + + /* only support branch_stack snapshot for perfmon >= v2 */ +diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c +index 513bf1f30c2a..f8e7dc02846d 100644 +--- a/arch/x86/events/intel/lbr.c ++++ b/arch/x86/events/intel/lbr.c +@@ -8,14 +8,6 @@ + + #include "../perf_event.h" + +-static const enum { +- LBR_EIP_FLAGS = 1, +- LBR_TSX = 2, +-} lbr_desc[LBR_FORMAT_MAX_KNOWN + 1] = { +- [LBR_FORMAT_EIP_FLAGS] = LBR_EIP_FLAGS, +- [LBR_FORMAT_EIP_FLAGS2] = LBR_EIP_FLAGS | LBR_TSX, +-}; +- + /* + * Intel LBR_SELECT bits + * Intel Vol3a, April 2011, Section 16.7 Table 16-10 +@@ -243,7 +235,7 @@ void intel_pmu_lbr_reset_64(void) + for (i = 0; i < x86_pmu.lbr_nr; i++) { + wrmsrl(x86_pmu.lbr_from + i, 0); + wrmsrl(x86_pmu.lbr_to + i, 0); +- if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO) ++ if (x86_pmu.lbr_has_info) + wrmsrl(x86_pmu.lbr_info + i, 0); + } + } +@@ -303,11 +295,10 @@ enum { + */ + static inline bool lbr_from_signext_quirk_needed(void) + { +- int lbr_format = x86_pmu.intel_cap.lbr_format; + bool tsx_support = boot_cpu_has(X86_FEATURE_HLE) || + boot_cpu_has(X86_FEATURE_RTM); + +- return !tsx_support && (lbr_desc[lbr_format] & LBR_TSX); ++ return !tsx_support && x86_pmu.lbr_has_tsx; + } + + static DEFINE_STATIC_KEY_FALSE(lbr_from_quirk_key); +@@ -425,12 +416,12 @@ rdlbr_all(struct lbr_entry *lbr, unsigned int idx, bool need_info) + + void intel_pmu_lbr_restore(void *ctx) + { +- bool need_info = x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO; + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); + struct x86_perf_task_context *task_ctx = ctx; +- int i; +- unsigned lbr_idx, mask; ++ bool need_info = x86_pmu.lbr_has_info; + u64 tos = task_ctx->tos; ++ unsigned lbr_idx, mask; ++ int i; + + mask = x86_pmu.lbr_nr - 1; + for (i = 0; i < task_ctx->valid_lbrs; i++) { +@@ -442,7 +433,7 @@ void intel_pmu_lbr_restore(void *ctx) + lbr_idx = (tos - i) & mask; + wrlbr_from(lbr_idx, 0); + wrlbr_to(lbr_idx, 0); +- if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO) ++ if (need_info) + wrlbr_info(lbr_idx, 0); + } + +@@ -517,9 +508,9 @@ static void __intel_pmu_lbr_restore(void *ctx) + + void intel_pmu_lbr_save(void *ctx) + { +- bool need_info = x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO; + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); + struct x86_perf_task_context *task_ctx = ctx; ++ bool need_info = x86_pmu.lbr_has_info; + unsigned lbr_idx, mask; + u64 tos; + int i; +@@ -814,7 +805,6 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) + { + bool need_info = false, call_stack = false; + unsigned long mask = x86_pmu.lbr_nr - 1; +- int lbr_format = x86_pmu.intel_cap.lbr_format; + u64 tos = intel_pmu_lbr_tos(); + int i; + int out = 0; +@@ -829,9 +819,7 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) + for (i = 0; i < num; i++) { + unsigned long lbr_idx = (tos - i) & mask; + u64 from, to, mis = 0, pred = 0, in_tx = 0, abort = 0; +- int skip = 0; + u16 cycles = 0; +- int lbr_flags = lbr_desc[lbr_format]; + + from = rdlbr_from(lbr_idx, NULL); + to = rdlbr_to(lbr_idx, NULL); +@@ -843,37 +831,39 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) + if (call_stack && !from) + break; + +- if (lbr_format == LBR_FORMAT_INFO && need_info) { +- u64 info; +- +- info = rdlbr_info(lbr_idx, NULL); +- mis = !!(info & LBR_INFO_MISPRED); +- pred = !mis; +- in_tx = !!(info & LBR_INFO_IN_TX); +- abort = !!(info & LBR_INFO_ABORT); +- cycles = (info & LBR_INFO_CYCLES); +- } +- +- if (lbr_format == LBR_FORMAT_TIME) { +- mis = !!(from & LBR_FROM_FLAG_MISPRED); +- pred = !mis; +- skip = 1; +- cycles = ((to >> 48) & LBR_INFO_CYCLES); +- +- to = (u64)((((s64)to) << 16) >> 16); +- } +- +- if (lbr_flags & LBR_EIP_FLAGS) { +- mis = !!(from & LBR_FROM_FLAG_MISPRED); +- pred = !mis; +- skip = 1; +- } +- if (lbr_flags & LBR_TSX) { +- in_tx = !!(from & LBR_FROM_FLAG_IN_TX); +- abort = !!(from & LBR_FROM_FLAG_ABORT); +- skip = 3; ++ if (x86_pmu.lbr_has_info) { ++ if (need_info) { ++ u64 info; ++ ++ info = rdlbr_info(lbr_idx, NULL); ++ mis = !!(info & LBR_INFO_MISPRED); ++ pred = !mis; ++ cycles = (info & LBR_INFO_CYCLES); ++ if (x86_pmu.lbr_has_tsx) { ++ in_tx = !!(info & LBR_INFO_IN_TX); ++ abort = !!(info & LBR_INFO_ABORT); ++ } ++ } ++ } else { ++ int skip = 0; ++ ++ if (x86_pmu.lbr_from_flags) { ++ mis = !!(from & LBR_FROM_FLAG_MISPRED); ++ pred = !mis; ++ skip = 1; ++ } ++ if (x86_pmu.lbr_has_tsx) { ++ in_tx = !!(from & LBR_FROM_FLAG_IN_TX); ++ abort = !!(from & LBR_FROM_FLAG_ABORT); ++ skip = 3; ++ } ++ from = (u64)((((s64)from) << skip) >> skip); ++ ++ if (x86_pmu.lbr_to_cycles) { ++ cycles = ((to >> 48) & LBR_INFO_CYCLES); ++ to = (u64)((((s64)to) << 16) >> 16); ++ } + } +- from = (u64)((((s64)from) << skip) >> skip); + + /* + * Some CPUs report duplicated abort records, +@@ -1126,7 +1116,7 @@ static int intel_pmu_setup_hw_lbr_filter(struct perf_event *event) + + if ((br_type & PERF_SAMPLE_BRANCH_NO_CYCLES) && + (br_type & PERF_SAMPLE_BRANCH_NO_FLAGS) && +- (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)) ++ x86_pmu.lbr_has_info) + reg->config |= LBR_NO_INFO; + + return 0; +@@ -1712,6 +1702,30 @@ void intel_pmu_lbr_init_knl(void) + x86_pmu.intel_cap.lbr_format = LBR_FORMAT_EIP_FLAGS; + } + ++void intel_pmu_lbr_init(void) ++{ ++ switch (x86_pmu.intel_cap.lbr_format) { ++ case LBR_FORMAT_EIP_FLAGS2: ++ x86_pmu.lbr_has_tsx = 1; ++ fallthrough; ++ case LBR_FORMAT_EIP_FLAGS: ++ x86_pmu.lbr_from_flags = 1; ++ break; ++ ++ case LBR_FORMAT_INFO: ++ x86_pmu.lbr_has_tsx = 1; ++ fallthrough; ++ case LBR_FORMAT_INFO2: ++ x86_pmu.lbr_has_info = 1; ++ break; ++ ++ case LBR_FORMAT_TIME: ++ x86_pmu.lbr_from_flags = 1; ++ x86_pmu.lbr_to_cycles = 1; ++ break; ++ } ++} ++ + /* + * LBR state size is variable based on the max number of registers. + * This calculates the expected state size, which should match +diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h +index b48f3ab9125f..84d9bef41159 100644 +--- a/arch/x86/events/perf_event.h ++++ b/arch/x86/events/perf_event.h +@@ -214,7 +214,8 @@ enum { + LBR_FORMAT_EIP_FLAGS2 = 0x04, + LBR_FORMAT_INFO = 0x05, + LBR_FORMAT_TIME = 0x06, +- LBR_FORMAT_MAX_KNOWN = LBR_FORMAT_TIME, ++ LBR_FORMAT_INFO2 = 0x07, ++ LBR_FORMAT_MAX_KNOWN = LBR_FORMAT_INFO2, + }; + + enum { +@@ -838,6 +839,11 @@ struct x86_pmu { + bool lbr_double_abort; /* duplicated lbr aborts */ + bool lbr_pt_coexist; /* (LBR|BTS) may coexist with PT */ + ++ unsigned int lbr_has_info:1; ++ unsigned int lbr_has_tsx:1; ++ unsigned int lbr_from_flags:1; ++ unsigned int lbr_to_cycles:1; ++ + /* + * Intel Architectural LBR CPUID Enumeration + */ +@@ -1390,6 +1396,8 @@ void intel_pmu_lbr_init_skl(void); + + void intel_pmu_lbr_init_knl(void); + ++void intel_pmu_lbr_init(void); ++ + void intel_pmu_arch_lbr_init(void); + + void intel_pmu_pebs_data_source_nhm(void); +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0058-perf-core-Add-perf_clear_branch_entry_bitfields-help.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0058-perf-core-Add-perf_clear_branch_entry_bitfields-help.patch new file mode 100644 index 00000000..f3bada41 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0058-perf-core-Add-perf_clear_branch_entry_bitfields-help.patch @@ -0,0 +1,135 @@ +From 92b53198f9dfb171e5f02c28e1d07d77ef53959f Mon Sep 17 00:00:00 2001 +From: Stephane Eranian <eranian@google.com> +Date: Tue, 22 Mar 2022 15:15:05 -0700 +Subject: [PATCH 58/86] perf/core: Add perf_clear_branch_entry_bitfields() + helper + +commit bfe4daf850f45d92dcd3da477f0b0456620294c3 upstream + +Make it simpler to reset all the info fields on the +perf_branch_entry by adding a helper inline function. + +The goal is to centralize the initialization to avoid missing +a field in case more are added. + +Signed-off-by: Stephane Eranian <eranian@google.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220322221517.2510440-2-eranian@google.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/intel/lbr.c | 36 +++++++++++++++++------------------- + include/linux/perf_event.h | 16 ++++++++++++++++ + 2 files changed, 33 insertions(+), 19 deletions(-) + +diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c +index f8e7dc02846d..f583075957f2 100644 +--- a/arch/x86/events/intel/lbr.c ++++ b/arch/x86/events/intel/lbr.c +@@ -767,6 +767,7 @@ void intel_pmu_lbr_disable_all(void) + void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc) + { + unsigned long mask = x86_pmu.lbr_nr - 1; ++ struct perf_branch_entry *br = cpuc->lbr_entries; + u64 tos = intel_pmu_lbr_tos(); + int i; + +@@ -782,15 +783,11 @@ void intel_pmu_lbr_read_32(struct cpu_hw_events *cpuc) + + rdmsrl(x86_pmu.lbr_from + lbr_idx, msr_lastbranch.lbr); + +- cpuc->lbr_entries[i].from = msr_lastbranch.from; +- cpuc->lbr_entries[i].to = msr_lastbranch.to; +- cpuc->lbr_entries[i].mispred = 0; +- cpuc->lbr_entries[i].predicted = 0; +- cpuc->lbr_entries[i].in_tx = 0; +- cpuc->lbr_entries[i].abort = 0; +- cpuc->lbr_entries[i].cycles = 0; +- cpuc->lbr_entries[i].type = 0; +- cpuc->lbr_entries[i].reserved = 0; ++ perf_clear_branch_entry_bitfields(br); ++ ++ br->from = msr_lastbranch.from; ++ br->to = msr_lastbranch.to; ++ br++; + } + cpuc->lbr_stack.nr = i; + cpuc->lbr_stack.hw_idx = tos; +@@ -805,6 +802,7 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) + { + bool need_info = false, call_stack = false; + unsigned long mask = x86_pmu.lbr_nr - 1; ++ struct perf_branch_entry *br = cpuc->lbr_entries; + u64 tos = intel_pmu_lbr_tos(); + int i; + int out = 0; +@@ -876,15 +874,14 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) + if (abort && x86_pmu.lbr_double_abort && out > 0) + out--; + +- cpuc->lbr_entries[out].from = from; +- cpuc->lbr_entries[out].to = to; +- cpuc->lbr_entries[out].mispred = mis; +- cpuc->lbr_entries[out].predicted = pred; +- cpuc->lbr_entries[out].in_tx = in_tx; +- cpuc->lbr_entries[out].abort = abort; +- cpuc->lbr_entries[out].cycles = cycles; +- cpuc->lbr_entries[out].type = 0; +- cpuc->lbr_entries[out].reserved = 0; ++ perf_clear_branch_entry_bitfields(br+out); ++ br[out].from = from; ++ br[out].to = to; ++ br[out].mispred = mis; ++ br[out].predicted = pred; ++ br[out].in_tx = in_tx; ++ br[out].abort = abort; ++ br[out].cycles = cycles; + out++; + } + cpuc->lbr_stack.nr = out; +@@ -946,6 +943,8 @@ static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc, + to = rdlbr_to(i, lbr); + info = rdlbr_info(i, lbr); + ++ perf_clear_branch_entry_bitfields(e); ++ + e->from = from; + e->to = to; + e->mispred = get_lbr_mispred(info); +@@ -954,7 +953,6 @@ static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc, + e->abort = !!(info & LBR_INFO_ABORT); + e->cycles = get_lbr_cycles(info); + e->type = get_lbr_br_type(info); +- e->reserved = 0; + } + + cpuc->lbr_stack.nr = i; +diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h +index d66053503e7f..5d65aa186c1a 100644 +--- a/include/linux/perf_event.h ++++ b/include/linux/perf_event.h +@@ -1059,6 +1059,22 @@ static inline void perf_sample_data_init(struct perf_sample_data *data, + data->txn = 0; + } + ++/* ++ * Clear all bitfields in the perf_branch_entry. ++ * The to and from fields are not cleared because they are ++ * systematically modified by caller. ++ */ ++static inline void perf_clear_branch_entry_bitfields(struct perf_branch_entry *br) ++{ ++ br->mispred = 0; ++ br->predicted = 0; ++ br->in_tx = 0; ++ br->abort = 0; ++ br->cycles = 0; ++ br->type = 0; ++ br->reserved = 0; ++} ++ + extern void perf_output_sample(struct perf_output_handle *handle, + struct perf_event_header *header, + struct perf_sample_data *data, +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0059-x86-cpufeatures-Add-AMD-Fam19h-Branch-Sampling-featu.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0059-x86-cpufeatures-Add-AMD-Fam19h-Branch-Sampling-featu.patch new file mode 100644 index 00000000..335d75e5 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0059-x86-cpufeatures-Add-AMD-Fam19h-Branch-Sampling-featu.patch @@ -0,0 +1,33 @@ +From 3078e3a38ac059945f1ea3f318c47e3760256548 Mon Sep 17 00:00:00 2001 +From: Stephane Eranian <eranian@google.com> +Date: Tue, 22 Mar 2022 15:15:06 -0700 +Subject: [PATCH 59/86] x86/cpufeatures: Add AMD Fam19h Branch Sampling feature + +commit a77d41ac3a0f41c80120ec5b8b08ab284fec950a upstream + +Add a cpu feature for AMD Fam19h Branch Sampling feature as bit +31 of EBX on CPUID leaf function 0x80000008. + +Signed-off-by: Stephane Eranian <eranian@google.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220322221517.2510440-3-eranian@google.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/cpufeatures.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h +index ebe6666bbc71..4ae869607697 100644 +--- a/arch/x86/include/asm/cpufeatures.h ++++ b/arch/x86/include/asm/cpufeatures.h +@@ -323,6 +323,7 @@ + #define X86_FEATURE_AMD_SSB_NO (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */ + #define X86_FEATURE_CPPC (13*32+27) /* Collaborative Processor Performance Control */ + #define X86_FEATURE_BTC_NO (13*32+29) /* "" Not vulnerable to Branch Type Confusion */ ++#define X86_FEATURE_BRS (13*32+31) /* Branch Sampling available */ + + /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */ + #define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */ +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0060-perf-x86-amd-Add-AMD-Fam19h-Branch-Sampling-support.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0060-perf-x86-amd-Add-AMD-Fam19h-Branch-Sampling-support.patch new file mode 100644 index 00000000..742373d6 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0060-perf-x86-amd-Add-AMD-Fam19h-Branch-Sampling-support.patch @@ -0,0 +1,940 @@ +From cb555e5e85438938a91440bd9594ca145505039c Mon Sep 17 00:00:00 2001 +From: Stephane Eranian <eranian@google.com> +Date: Tue, 22 Mar 2022 15:15:07 -0700 +Subject: [PATCH 60/86] perf/x86/amd: Add AMD Fam19h Branch Sampling support + +commit ada543459cab7f653dcacdaba4011a8bb19c627c upstream + +Add support for the AMD Fam19h 16-deep branch sampling feature as +described in the AMD PPR Fam19h Model 01h Revision B1. This is a model +specific extension. It is not an architected AMD feature. + +The Branch Sampling (BRS) operates with a 16-deep saturating buffer in MSR +registers. There is no branch type filtering. All control flow changes are +captured. BRS relies on specific programming of the core PMU of Fam19h. In +particular, the following requirements must be met: + - the sampling period be greater than 16 (BRS depth) + - the sampling period must use a fixed and not frequency mode + +BRS interacts with the NMI interrupt as well. Because enabling BRS is +expensive, it is only activated after P event occurrences, where P is the +desired sampling period. At P occurrences of the event, the counter +overflows, the CPU catches the interrupt, activates BRS for 16 branches until +it saturates, and then delivers the NMI to the kernel. Between the overflow +and the time BRS activates more branches may be executed skewing the period. +All along, the sampling event keeps counting. The skid may be attenuated by +reducing the sampling period by 16 (subsequent patch). + +BRS is integrated into perf_events seamlessly via the same +PERF_RECORD_BRANCH_STACK sample format. BRS generates perf_branch_entry +records in the sampling buffer. No prediction information is supported. The +branches are stored in reverse order of execution. The most recent branch is +the first entry in each record. + +No modification to the perf tool is necessary. + +BRS can be used with any sampling event. However, it is recommended to use +the RETIRED_BRANCH_INSTRUCTIONS event because it matches what the BRS +captures. + +$ perf record -b -c 1000037 -e cpu/event=0xc2,name=ret_br_instructions/ test + +$ perf report -D +56531696056126 0x193c000 [0x1a8]: PERF_RECORD_SAMPLE(IP, 0x2): 18122/18230: 0x401d24 period: 1000037 addr: 0 +... branch stack: nr:16 +..... 0: 0000000000401d24 -> 0000000000401d5a 0 cycles 0 +..... 1: 0000000000401d5c -> 0000000000401d24 0 cycles 0 +..... 2: 0000000000401d22 -> 0000000000401d5c 0 cycles 0 +..... 3: 0000000000401d5e -> 0000000000401d22 0 cycles 0 +..... 4: 0000000000401d20 -> 0000000000401d5e 0 cycles 0 +..... 5: 0000000000401d3e -> 0000000000401d20 0 cycles 0 +..... 6: 0000000000401d42 -> 0000000000401d3e 0 cycles 0 +..... 7: 0000000000401d3c -> 0000000000401d42 0 cycles 0 +..... 8: 0000000000401d44 -> 0000000000401d3c 0 cycles 0 +..... 9: 0000000000401d3a -> 0000000000401d44 0 cycles 0 +..... 10: 0000000000401d46 -> 0000000000401d3a 0 cycles 0 +..... 11: 0000000000401d38 -> 0000000000401d46 0 cycles 0 +..... 12: 0000000000401d48 -> 0000000000401d38 0 cycles 0 +..... 13: 0000000000401d36 -> 0000000000401d48 0 cycles 0 +..... 14: 0000000000401d4a -> 0000000000401d36 0 cycles 0 +..... 15: 0000000000401d34 -> 0000000000401d4a 0 cycles 0 + ... thread: test:18230 + ...... dso: test + +Signed-off-by: Stephane Eranian <eranian@google.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220322221517.2510440-4-eranian@google.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/Makefile | 2 +- + arch/x86/events/amd/brs.c | 317 +++++++++++++++++++++++++++++++ + arch/x86/events/amd/core.c | 233 ++++++++++++++++++++++- + arch/x86/events/core.c | 10 +- + arch/x86/events/perf_event.h | 101 ++++++++-- + arch/x86/include/asm/msr-index.h | 4 + + 6 files changed, 645 insertions(+), 22 deletions(-) + create mode 100644 arch/x86/events/amd/brs.c + +diff --git a/arch/x86/events/amd/Makefile b/arch/x86/events/amd/Makefile +index 6cbe38d5fd9d..cf323ffab5cd 100644 +--- a/arch/x86/events/amd/Makefile ++++ b/arch/x86/events/amd/Makefile +@@ -1,5 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 +-obj-$(CONFIG_CPU_SUP_AMD) += core.o ++obj-$(CONFIG_CPU_SUP_AMD) += core.o brs.o + obj-$(CONFIG_PERF_EVENTS_AMD_POWER) += power.o + obj-$(CONFIG_X86_LOCAL_APIC) += ibs.o + obj-$(CONFIG_PERF_EVENTS_AMD_UNCORE) += amd-uncore.o +diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c +new file mode 100644 +index 000000000000..3c13c484c637 +--- /dev/null ++++ b/arch/x86/events/amd/brs.c +@@ -0,0 +1,317 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Implement support for AMD Fam19h Branch Sampling feature ++ * Based on specifications published in AMD PPR Fam19 Model 01 ++ * ++ * Copyright 2021 Google LLC ++ * Contributed by Stephane Eranian <eranian@google.com> ++ */ ++#include <linux/kernel.h> ++#include <asm/msr.h> ++#include <asm/cpufeature.h> ++ ++#include "../perf_event.h" ++ ++#define BRS_POISON 0xFFFFFFFFFFFFFFFEULL /* mark limit of valid entries */ ++ ++/* Debug Extension Configuration register layout */ ++union amd_debug_extn_cfg { ++ __u64 val; ++ struct { ++ __u64 rsvd0:2, /* reserved */ ++ brsmen:1, /* branch sample enable */ ++ rsvd4_3:2,/* reserved - must be 0x3 */ ++ vb:1, /* valid branches recorded */ ++ rsvd2:10, /* reserved */ ++ msroff:4, /* index of next entry to write */ ++ rsvd3:4, /* reserved */ ++ pmc:3, /* #PMC holding the sampling event */ ++ rsvd4:37; /* reserved */ ++ }; ++}; ++ ++static inline unsigned int brs_from(int idx) ++{ ++ return MSR_AMD_SAMP_BR_FROM + 2 * idx; ++} ++ ++static inline unsigned int brs_to(int idx) ++{ ++ return MSR_AMD_SAMP_BR_FROM + 2 * idx + 1; ++} ++ ++static inline void set_debug_extn_cfg(u64 val) ++{ ++ /* bits[4:3] must always be set to 11b */ ++ wrmsrl(MSR_AMD_DBG_EXTN_CFG, val | 3ULL << 3); ++} ++ ++static inline u64 get_debug_extn_cfg(void) ++{ ++ u64 val; ++ ++ rdmsrl(MSR_AMD_DBG_EXTN_CFG, val); ++ return val; ++} ++ ++static bool __init amd_brs_detect(void) ++{ ++ if (!boot_cpu_has(X86_FEATURE_BRS)) ++ return false; ++ ++ switch (boot_cpu_data.x86) { ++ case 0x19: /* AMD Fam19h (Zen3) */ ++ x86_pmu.lbr_nr = 16; ++ ++ /* No hardware filtering supported */ ++ x86_pmu.lbr_sel_map = NULL; ++ x86_pmu.lbr_sel_mask = 0; ++ break; ++ default: ++ return false; ++ } ++ ++ return true; ++} ++ ++/* ++ * Current BRS implementation does not support branch type or privilege level ++ * filtering. Therefore, this function simply enforces these limitations. No need for ++ * a br_sel_map. Software filtering is not supported because it would not correlate well ++ * with a sampling period. ++ */ ++int amd_brs_setup_filter(struct perf_event *event) ++{ ++ u64 type = event->attr.branch_sample_type; ++ ++ /* No BRS support */ ++ if (!x86_pmu.lbr_nr) ++ return -EOPNOTSUPP; ++ ++ /* Can only capture all branches, i.e., no filtering */ ++ if ((type & ~PERF_SAMPLE_BRANCH_PLM_ALL) != PERF_SAMPLE_BRANCH_ANY) ++ return -EINVAL; ++ ++ /* can only capture at all priv levels due to the way BRS works */ ++ if ((type & PERF_SAMPLE_BRANCH_PLM_ALL) != PERF_SAMPLE_BRANCH_PLM_ALL) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++/* tos = top of stack, i.e., last valid entry written */ ++static inline int amd_brs_get_tos(union amd_debug_extn_cfg *cfg) ++{ ++ /* ++ * msroff: index of next entry to write so top-of-stack is one off ++ * if BRS is full then msroff is set back to 0. ++ */ ++ return (cfg->msroff ? cfg->msroff : x86_pmu.lbr_nr) - 1; ++} ++ ++/* ++ * make sure we have a sane BRS offset to begin with ++ * especially with kexec ++ */ ++void amd_brs_reset(void) ++{ ++ /* ++ * Reset config ++ */ ++ set_debug_extn_cfg(0); ++ ++ /* ++ * Mark first entry as poisoned ++ */ ++ wrmsrl(brs_to(0), BRS_POISON); ++} ++ ++int __init amd_brs_init(void) ++{ ++ if (!amd_brs_detect()) ++ return -EOPNOTSUPP; ++ ++ pr_cont("%d-deep BRS, ", x86_pmu.lbr_nr); ++ ++ return 0; ++} ++ ++void amd_brs_enable(void) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ union amd_debug_extn_cfg cfg; ++ ++ /* Activate only on first user */ ++ if (++cpuc->brs_active > 1) ++ return; ++ ++ cfg.val = 0; /* reset all fields */ ++ cfg.brsmen = 1; /* enable branch sampling */ ++ ++ /* Set enable bit */ ++ set_debug_extn_cfg(cfg.val); ++} ++ ++void amd_brs_enable_all(void) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ if (cpuc->lbr_users) ++ amd_brs_enable(); ++} ++ ++void amd_brs_disable(void) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ union amd_debug_extn_cfg cfg; ++ ++ /* Check if active (could be disabled via x86_pmu_disable_all()) */ ++ if (!cpuc->brs_active) ++ return; ++ ++ /* Only disable for last user */ ++ if (--cpuc->brs_active) ++ return; ++ ++ /* ++ * Clear the brsmen bit but preserve the others as they contain ++ * useful state such as vb and msroff ++ */ ++ cfg.val = get_debug_extn_cfg(); ++ ++ /* ++ * When coming in on interrupt and BRS is full, then hw will have ++ * already stopped BRS, no need to issue wrmsr again ++ */ ++ if (cfg.brsmen) { ++ cfg.brsmen = 0; ++ set_debug_extn_cfg(cfg.val); ++ } ++} ++ ++void amd_brs_disable_all(void) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ if (cpuc->lbr_users) ++ amd_brs_disable(); ++} ++ ++/* ++ * Caller must ensure amd_brs_inuse() is true before calling ++ * return: ++ */ ++void amd_brs_drain(void) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ struct perf_event *event = cpuc->events[0]; ++ struct perf_branch_entry *br = cpuc->lbr_entries; ++ union amd_debug_extn_cfg cfg; ++ u32 i, nr = 0, num, tos, start; ++ u32 shift = 64 - boot_cpu_data.x86_virt_bits; ++ ++ /* ++ * BRS event forced on PMC0, ++ * so check if there is an event. ++ * It is possible to have lbr_users > 0 but the event ++ * not yet scheduled due to long latency PMU irq ++ */ ++ if (!event) ++ goto empty; ++ ++ cfg.val = get_debug_extn_cfg(); ++ ++ /* Sanity check [0-x86_pmu.lbr_nr] */ ++ if (WARN_ON_ONCE(cfg.msroff >= x86_pmu.lbr_nr)) ++ goto empty; ++ ++ /* No valid branch */ ++ if (cfg.vb == 0) ++ goto empty; ++ ++ /* ++ * msr.off points to next entry to be written ++ * tos = most recent entry index = msr.off - 1 ++ * BRS register buffer saturates, so we know we have ++ * start < tos and that we have to read from start to tos ++ */ ++ start = 0; ++ tos = amd_brs_get_tos(&cfg); ++ ++ num = tos - start + 1; ++ ++ /* ++ * BRS is only one pass (saturation) from MSROFF to depth-1 ++ * MSROFF wraps to zero when buffer is full ++ */ ++ for (i = 0; i < num; i++) { ++ u32 brs_idx = tos - i; ++ u64 from, to; ++ ++ rdmsrl(brs_to(brs_idx), to); ++ ++ /* Entry does not belong to us (as marked by kernel) */ ++ if (to == BRS_POISON) ++ break; ++ ++ rdmsrl(brs_from(brs_idx), from); ++ ++ /* ++ * Sign-extend SAMP_BR_TO to 64 bits, bits 61-63 are reserved. ++ * Necessary to generate proper virtual addresses suitable for ++ * symbolization ++ */ ++ to = (u64)(((s64)to << shift) >> shift); ++ ++ perf_clear_branch_entry_bitfields(br+nr); ++ ++ br[nr].from = from; ++ br[nr].to = to; ++ ++ nr++; ++ } ++empty: ++ /* Record number of sampled branches */ ++ cpuc->lbr_stack.nr = nr; ++} ++ ++/* ++ * Poison most recent entry to prevent reuse by next task ++ * required because BRS entry are not tagged by PID ++ */ ++static void amd_brs_poison_buffer(void) ++{ ++ union amd_debug_extn_cfg cfg; ++ unsigned int idx; ++ ++ /* Get current state */ ++ cfg.val = get_debug_extn_cfg(); ++ ++ /* idx is most recently written entry */ ++ idx = amd_brs_get_tos(&cfg); ++ ++ /* Poison target of entry */ ++ wrmsrl(brs_to(idx), BRS_POISON); ++} ++ ++/* ++ * On context switch in, we need to make sure no samples from previous user ++ * are left in the BRS. ++ * ++ * On ctxswin, sched_in = true, called after the PMU has started ++ * On ctxswout, sched_in = false, called before the PMU is stopped ++ */ ++void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool sched_in) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ ++ /* no active users */ ++ if (!cpuc->lbr_users) ++ return; ++ ++ /* ++ * On context switch in, we need to ensure we do not use entries ++ * from previous BRS user on that CPU, so we poison the buffer as ++ * a faster way compared to resetting all entries. ++ */ ++ if (sched_in) ++ amd_brs_poison_buffer(); ++} +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index 9687a8aef01c..c7ac70d8ed9a 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -325,8 +325,16 @@ static inline bool amd_is_pair_event_code(struct hw_perf_event *hwc) + } + } + ++#define AMD_FAM19H_BRS_EVENT 0xc4 /* RETIRED_TAKEN_BRANCH_INSTRUCTIONS */ ++static inline int amd_is_brs_event(struct perf_event *e) ++{ ++ return (e->hw.config & AMD64_RAW_EVENT_MASK) == AMD_FAM19H_BRS_EVENT; ++} ++ + static int amd_core_hw_config(struct perf_event *event) + { ++ int ret = 0; ++ + if (event->attr.exclude_host && event->attr.exclude_guest) + /* + * When HO == GO == 1 the hardware treats that as GO == HO == 0 +@@ -343,7 +351,66 @@ static int amd_core_hw_config(struct perf_event *event) + if ((x86_pmu.flags & PMU_FL_PAIR) && amd_is_pair_event_code(&event->hw)) + event->hw.flags |= PERF_X86_EVENT_PAIR; + +- return 0; ++ /* ++ * if branch stack is requested ++ */ ++ if (has_branch_stack(event)) { ++ /* ++ * Due to interrupt holding, BRS is not recommended in ++ * counting mode. ++ */ ++ if (!is_sampling_event(event)) ++ return -EINVAL; ++ ++ /* ++ * Due to the way BRS operates by holding the interrupt until ++ * lbr_nr entries have been captured, it does not make sense ++ * to allow sampling on BRS with an event that does not match ++ * what BRS is capturing, i.e., retired taken branches. ++ * Otherwise the correlation with the event's period is even ++ * more loose: ++ * ++ * With retired taken branch: ++ * Effective P = P + 16 + X ++ * With any other event: ++ * Effective P = P + Y + X ++ * ++ * Where X is the number of taken branches due to interrupt ++ * skid. Skid is large. ++ * ++ * Where Y is the occurences of the event while BRS is ++ * capturing the lbr_nr entries. ++ * ++ * By using retired taken branches, we limit the impact on the ++ * Y variable. We know it cannot be more than the depth of ++ * BRS. ++ */ ++ if (!amd_is_brs_event(event)) ++ return -EINVAL; ++ ++ /* ++ * BRS implementation does not work with frequency mode ++ * reprogramming of the period. ++ */ ++ if (event->attr.freq) ++ return -EINVAL; ++ /* ++ * The kernel subtracts BRS depth from period, so it must ++ * be big enough. ++ */ ++ if (event->attr.sample_period <= x86_pmu.lbr_nr) ++ return -EINVAL; ++ ++ /* ++ * Check if we can allow PERF_SAMPLE_BRANCH_STACK ++ */ ++ ret = amd_brs_setup_filter(event); ++ ++ /* only set in case of success */ ++ if (!ret) ++ event->hw.flags |= PERF_X86_EVENT_AMD_BRS; ++ } ++ return ret; + } + + static inline int amd_is_nb_event(struct hw_perf_event *hwc) +@@ -366,7 +433,7 @@ static int amd_pmu_hw_config(struct perf_event *event) + if (event->attr.precise_ip && get_ibs_caps()) + return -ENOENT; + +- if (has_branch_stack(event)) ++ if (has_branch_stack(event) && !x86_pmu.lbr_nr) + return -EOPNOTSUPP; + + ret = x86_pmu_hw_config(event); +@@ -555,6 +622,8 @@ static void amd_pmu_cpu_starting(int cpu) + + cpuc->amd_nb->nb_id = nb_id; + cpuc->amd_nb->refcnt++; ++ ++ amd_brs_reset(); + } + + static void amd_pmu_cpu_dead(int cpu) +@@ -610,6 +679,8 @@ static void amd_pmu_disable_all(void) + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); + int idx; + ++ amd_brs_disable_all(); ++ + x86_pmu_disable_all(); + + /* +@@ -634,6 +705,30 @@ static void amd_pmu_disable_all(void) + } + } + ++static void amd_pmu_enable_event(struct perf_event *event) ++{ ++ x86_pmu_enable_event(event); ++} ++ ++static void amd_pmu_enable_all(int added) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ struct hw_perf_event *hwc; ++ int idx; ++ ++ amd_brs_enable_all(); ++ ++ for (idx = 0; idx < x86_pmu.num_counters; idx++) { ++ hwc = &cpuc->events[idx]->hw; ++ ++ /* only activate events which are marked as active */ ++ if (!test_bit(idx, cpuc->active_mask)) ++ continue; ++ ++ amd_pmu_enable_event(cpuc->events[idx]); ++ } ++} ++ + static void amd_pmu_disable_event(struct perf_event *event) + { + x86_pmu_disable_event(event); +@@ -651,6 +746,18 @@ static void amd_pmu_disable_event(struct perf_event *event) + amd_pmu_wait_on_overflow(event->hw.idx); + } + ++static void amd_pmu_add_event(struct perf_event *event) ++{ ++ if (needs_branch_stack(event)) ++ amd_pmu_brs_add(event); ++} ++ ++static void amd_pmu_del_event(struct perf_event *event) ++{ ++ if (needs_branch_stack(event)) ++ amd_pmu_brs_del(event); ++} ++ + /* + * Because of NMI latency, if multiple PMC counters are active or other sources + * of NMIs are received, the perf NMI handler can handle one or more overflowed +@@ -671,11 +778,31 @@ static void amd_pmu_disable_event(struct perf_event *event) + */ + static int amd_pmu_handle_irq(struct pt_regs *regs) + { ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); + int handled; ++ int pmu_enabled; ++ ++ /* ++ * Save the PMU state. ++ * It needs to be restored when leaving the handler. ++ */ ++ pmu_enabled = cpuc->enabled; ++ cpuc->enabled = 0; ++ ++ /* stop everything (includes BRS) */ ++ amd_pmu_disable_all(); ++ ++ /* Drain BRS is in use (could be inactive) */ ++ if (cpuc->lbr_users) ++ amd_brs_drain(); + + /* Process any counter overflows */ + handled = x86_pmu_handle_irq(regs); + ++ cpuc->enabled = pmu_enabled; ++ if (pmu_enabled) ++ amd_pmu_enable_all(0); ++ + /* + * If a counter was handled, record a timestamp such that un-handled + * NMIs will be claimed if arriving within that window. +@@ -897,6 +1024,51 @@ static void amd_put_event_constraints_f17h(struct cpu_hw_events *cpuc, + --cpuc->n_pair; + } + ++/* ++ * Because of the way BRS operates with an inactive and active phases, and ++ * the link to one counter, it is not possible to have two events using BRS ++ * scheduled at the same time. There would be an issue with enforcing the ++ * period of each one and given that the BRS saturates, it would not be possible ++ * to guarantee correlated content for all events. Therefore, in situations ++ * where multiple events want to use BRS, the kernel enforces mutual exclusion. ++ * Exclusion is enforced by chosing only one counter for events using BRS. ++ * The event scheduling logic will then automatically multiplex the ++ * events and ensure that at most one event is actively using BRS. ++ * ++ * The BRS counter could be any counter, but there is no constraint on Fam19h, ++ * therefore all counters are equal and thus we pick the first one: PMC0 ++ */ ++static struct event_constraint amd_fam19h_brs_cntr0_constraint = ++ EVENT_CONSTRAINT(0, 0x1, AMD64_RAW_EVENT_MASK); ++ ++static struct event_constraint amd_fam19h_brs_pair_cntr0_constraint = ++ __EVENT_CONSTRAINT(0, 0x1, AMD64_RAW_EVENT_MASK, 1, 0, PERF_X86_EVENT_PAIR); ++ ++static struct event_constraint * ++amd_get_event_constraints_f19h(struct cpu_hw_events *cpuc, int idx, ++ struct perf_event *event) ++{ ++ struct hw_perf_event *hwc = &event->hw; ++ bool has_brs = has_amd_brs(hwc); ++ ++ /* ++ * In case BRS is used with an event requiring a counter pair, ++ * the kernel allows it but only on counter 0 & 1 to enforce ++ * multiplexing requiring to protect BRS in case of multiple ++ * BRS users ++ */ ++ if (amd_is_pair_event_code(hwc)) { ++ return has_brs ? &amd_fam19h_brs_pair_cntr0_constraint ++ : &pair_constraint; ++ } ++ ++ if (has_brs) ++ return &amd_fam19h_brs_cntr0_constraint; ++ ++ return &unconstrained; ++} ++ ++ + static ssize_t amd_event_sysfs_show(char *page, u64 config) + { + u64 event = (config & ARCH_PERFMON_EVENTSEL_EVENT) | +@@ -905,12 +1077,19 @@ static ssize_t amd_event_sysfs_show(char *page, u64 config) + return x86_event_sysfs_show(page, config, event); + } + ++static void amd_pmu_sched_task(struct perf_event_context *ctx, ++ bool sched_in) ++{ ++ if (sched_in && x86_pmu.lbr_nr) ++ amd_pmu_brs_sched_task(ctx, sched_in); ++} ++ + static __initconst const struct x86_pmu amd_pmu = { + .name = "AMD", + .handle_irq = amd_pmu_handle_irq, + .disable_all = amd_pmu_disable_all, +- .enable_all = x86_pmu_enable_all, +- .enable = x86_pmu_enable_event, ++ .enable_all = amd_pmu_enable_all, ++ .enable = amd_pmu_enable_event, + .disable = amd_pmu_disable_event, + .hw_config = amd_pmu_hw_config, + .schedule_events = x86_schedule_events, +@@ -920,6 +1099,8 @@ static __initconst const struct x86_pmu amd_pmu = { + .event_map = amd_pmu_event_map, + .max_events = ARRAY_SIZE(amd_perfmon_event_map), + .num_counters = AMD64_NUM_COUNTERS, ++ .add = amd_pmu_add_event, ++ .del = amd_pmu_del_event, + .cntval_bits = 48, + .cntval_mask = (1ULL << 48) - 1, + .apic = 1, +@@ -938,6 +1119,37 @@ static __initconst const struct x86_pmu amd_pmu = { + .amd_nb_constraints = 1, + }; + ++static ssize_t branches_show(struct device *cdev, ++ struct device_attribute *attr, ++ char *buf) ++{ ++ return snprintf(buf, PAGE_SIZE, "%d\n", x86_pmu.lbr_nr); ++} ++ ++static DEVICE_ATTR_RO(branches); ++ ++static struct attribute *amd_pmu_brs_attrs[] = { ++ &dev_attr_branches.attr, ++ NULL, ++}; ++ ++static umode_t ++amd_brs_is_visible(struct kobject *kobj, struct attribute *attr, int i) ++{ ++ return x86_pmu.lbr_nr ? attr->mode : 0; ++} ++ ++static struct attribute_group group_caps_amd_brs = { ++ .name = "caps", ++ .attrs = amd_pmu_brs_attrs, ++ .is_visible = amd_brs_is_visible, ++}; ++ ++static const struct attribute_group *amd_attr_update[] = { ++ &group_caps_amd_brs, ++ NULL, ++}; ++ + static int __init amd_core_pmu_init(void) + { + u64 even_ctr_mask = 0ULL; +@@ -989,6 +1201,19 @@ static int __init amd_core_pmu_init(void) + x86_pmu.flags |= PMU_FL_PAIR; + } + ++ /* ++ * BRS requires special event constraints and flushing on ctxsw. ++ */ ++ if (boot_cpu_data.x86 >= 0x19 && !amd_brs_init()) { ++ x86_pmu.get_event_constraints = amd_get_event_constraints_f19h; ++ x86_pmu.sched_task = amd_pmu_sched_task; ++ /* ++ * put_event_constraints callback same as Fam17h, set above ++ */ ++ } ++ ++ x86_pmu.attr_update = amd_attr_update; ++ + pr_cont("core perfctr, "); + return 0; + } +diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c +index 4147c9b94929..ddbfbf304b2d 100644 +--- a/arch/x86/events/core.c ++++ b/arch/x86/events/core.c +@@ -1334,6 +1334,10 @@ static void x86_pmu_enable(struct pmu *pmu) + if (hwc->state & PERF_HES_ARCH) + continue; + ++ /* ++ * if cpuc->enabled = 0, then no wrmsr as ++ * per x86_pmu_enable_event() ++ */ + x86_pmu_start(event, PERF_EF_RELOAD); + } + cpuc->n_added = 0; +@@ -1700,11 +1704,15 @@ int x86_pmu_handle_irq(struct pt_regs *regs) + * event overflow + */ + handled++; +- perf_sample_data_init(&data, 0, event->hw.last_period); + + if (!x86_perf_event_set_period(event)) + continue; + ++ perf_sample_data_init(&data, 0, event->hw.last_period); ++ ++ if (has_branch_stack(event)) ++ data.br_stack = &cpuc->lbr_stack; ++ + if (perf_event_overflow(event, &data, regs)) + x86_pmu_stop(event, 0); + } +diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h +index 84d9bef41159..ec7eb3fedbce 100644 +--- a/arch/x86/events/perf_event.h ++++ b/arch/x86/events/perf_event.h +@@ -66,22 +66,23 @@ static inline bool constraint_match(struct event_constraint *c, u64 ecode) + /* + * struct hw_perf_event.flags flags + */ +-#define PERF_X86_EVENT_PEBS_LDLAT 0x0001 /* ld+ldlat data address sampling */ +-#define PERF_X86_EVENT_PEBS_ST 0x0002 /* st data address sampling */ +-#define PERF_X86_EVENT_PEBS_ST_HSW 0x0004 /* haswell style datala, store */ +-#define PERF_X86_EVENT_PEBS_LD_HSW 0x0008 /* haswell style datala, load */ +-#define PERF_X86_EVENT_PEBS_NA_HSW 0x0010 /* haswell style datala, unknown */ +-#define PERF_X86_EVENT_EXCL 0x0020 /* HT exclusivity on counter */ +-#define PERF_X86_EVENT_DYNAMIC 0x0040 /* dynamic alloc'd constraint */ +- +-#define PERF_X86_EVENT_EXCL_ACCT 0x0100 /* accounted EXCL event */ +-#define PERF_X86_EVENT_AUTO_RELOAD 0x0200 /* use PEBS auto-reload */ +-#define PERF_X86_EVENT_LARGE_PEBS 0x0400 /* use large PEBS */ +-#define PERF_X86_EVENT_PEBS_VIA_PT 0x0800 /* use PT buffer for PEBS */ +-#define PERF_X86_EVENT_PAIR 0x1000 /* Large Increment per Cycle */ +-#define PERF_X86_EVENT_LBR_SELECT 0x2000 /* Save/Restore MSR_LBR_SELECT */ +-#define PERF_X86_EVENT_TOPDOWN 0x4000 /* Count Topdown slots/metrics events */ +-#define PERF_X86_EVENT_PEBS_STLAT 0x8000 /* st+stlat data address sampling */ ++#define PERF_X86_EVENT_PEBS_LDLAT 0x00001 /* ld+ldlat data address sampling */ ++#define PERF_X86_EVENT_PEBS_ST 0x00002 /* st data address sampling */ ++#define PERF_X86_EVENT_PEBS_ST_HSW 0x00004 /* haswell style datala, store */ ++#define PERF_X86_EVENT_PEBS_LD_HSW 0x00008 /* haswell style datala, load */ ++#define PERF_X86_EVENT_PEBS_NA_HSW 0x00010 /* haswell style datala, unknown */ ++#define PERF_X86_EVENT_EXCL 0x00020 /* HT exclusivity on counter */ ++#define PERF_X86_EVENT_DYNAMIC 0x00040 /* dynamic alloc'd constraint */ ++ ++#define PERF_X86_EVENT_EXCL_ACCT 0x00100 /* accounted EXCL event */ ++#define PERF_X86_EVENT_AUTO_RELOAD 0x00200 /* use PEBS auto-reload */ ++#define PERF_X86_EVENT_LARGE_PEBS 0x00400 /* use large PEBS */ ++#define PERF_X86_EVENT_PEBS_VIA_PT 0x00800 /* use PT buffer for PEBS */ ++#define PERF_X86_EVENT_PAIR 0x01000 /* Large Increment per Cycle */ ++#define PERF_X86_EVENT_LBR_SELECT 0x02000 /* Save/Restore MSR_LBR_SELECT */ ++#define PERF_X86_EVENT_TOPDOWN 0x04000 /* Count Topdown slots/metrics events */ ++#define PERF_X86_EVENT_PEBS_STLAT 0x08000 /* st+stlat data address sampling */ ++#define PERF_X86_EVENT_AMD_BRS 0x10000 /* AMD Branch Sampling */ + + static inline bool is_topdown_count(struct perf_event *event) + { +@@ -324,6 +325,8 @@ struct cpu_hw_events { + * AMD specific bits + */ + struct amd_nb *amd_nb; ++ int brs_active; /* BRS is enabled */ ++ + /* Inverted mask of bits to clear in the perf_ctr ctrl registers */ + u64 perf_ctr_virt_mask; + int n_pair; /* Large increment events */ +@@ -1103,6 +1106,11 @@ int x86_pmu_hw_config(struct perf_event *event); + + void x86_pmu_disable_all(void); + ++static inline bool has_amd_brs(struct hw_perf_event *hwc) ++{ ++ return hwc->flags & PERF_X86_EVENT_AMD_BRS; ++} ++ + static inline bool is_counter_pair(struct hw_perf_event *hwc) + { + return hwc->flags & PERF_X86_EVENT_PAIR; +@@ -1208,6 +1216,50 @@ static inline bool fixed_counter_disabled(int i, struct pmu *pmu) + #ifdef CONFIG_CPU_SUP_AMD + + int amd_pmu_init(void); ++int amd_brs_init(void); ++void amd_brs_disable(void); ++void amd_brs_enable(void); ++void amd_brs_enable_all(void); ++void amd_brs_disable_all(void); ++void amd_brs_drain(void); ++void amd_brs_disable_all(void); ++int amd_brs_setup_filter(struct perf_event *event); ++void amd_brs_reset(void); ++ ++static inline void amd_pmu_brs_add(struct perf_event *event) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ ++ perf_sched_cb_inc(event->ctx->pmu); ++ cpuc->lbr_users++; ++ /* ++ * No need to reset BRS because it is reset ++ * on brs_enable() and it is saturating ++ */ ++} ++ ++static inline void amd_pmu_brs_del(struct perf_event *event) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ ++ cpuc->lbr_users--; ++ WARN_ON_ONCE(cpuc->lbr_users < 0); ++ ++ perf_sched_cb_dec(event->ctx->pmu); ++} ++ ++void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool sched_in); ++ ++/* ++ * check if BRS is activated on the CPU ++ * active defined as it has non-zero users and DBG_EXT_CFG.BRSEN=1 ++ */ ++static inline bool amd_brs_active(void) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ ++ return cpuc->brs_active; ++} + + #else /* CONFIG_CPU_SUP_AMD */ + +@@ -1216,6 +1268,23 @@ static inline int amd_pmu_init(void) + return 0; + } + ++static inline int amd_brs_init(void) ++{ ++ return -EOPNOTSUPP; ++} ++ ++static inline void amd_brs_drain(void) ++{ ++} ++ ++static inline void amd_brs_enable_all(void) ++{ ++} ++ ++static inline void amd_brs_disable_all(void) ++{ ++} ++ + #endif /* CONFIG_CPU_SUP_AMD */ + + static inline int is_pebs_pt(struct perf_event *event) +diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h +index 23efce987acf..480e4870aa42 100644 +--- a/arch/x86/include/asm/msr-index.h ++++ b/arch/x86/include/asm/msr-index.h +@@ -707,6 +707,10 @@ + #define MSR_IA32_PERF_CTL 0x00000199 + #define INTEL_PERF_CTL_MASK 0xffff + ++/* AMD Branch Sampling configuration */ ++#define MSR_AMD_DBG_EXTN_CFG 0xc000010f ++#define MSR_AMD_SAMP_BR_FROM 0xc0010300 ++ + #define MSR_IA32_MPERF 0x000000e7 + #define MSR_IA32_APERF 0x000000e8 + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0061-perf-x86-amd-Add-branch-brs-helper-event-for-Fam19h-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0061-perf-x86-amd-Add-branch-brs-helper-event-for-Fam19h-.patch new file mode 100644 index 00000000..c5f1e1cc --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0061-perf-x86-amd-Add-branch-brs-helper-event-for-Fam19h-.patch @@ -0,0 +1,55 @@ +From 74f949e5e8a95cc6d9e8eae42768ba5e814a8eb0 Mon Sep 17 00:00:00 2001 +From: Stephane Eranian <eranian@google.com> +Date: Tue, 22 Mar 2022 15:15:08 -0700 +Subject: [PATCH 61/86] perf/x86/amd: Add branch-brs helper event for Fam19h + BRS + +commit 44175993efbae04e8b2d7f7795ff512c3a726db0 upstream + +Add a pseudo event called branch-brs to help use the FAM Fam19h +Branch Sampling feature (BRS). BRS samples taken branches, so it is best used +when sampling on a retired taken branch event (0xc4) which is what BRS +captures. Instead of trying to remember the event code or actual event name, +users can simply do: + +$ perf record -b -e cpu/branch-brs/ -c 1000037 ..... + +Signed-off-by: Stephane Eranian <eranian@google.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220322221517.2510440-5-eranian@google.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/core.c | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index c7ac70d8ed9a..f7bce8364fe4 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -1145,8 +1145,23 @@ static struct attribute_group group_caps_amd_brs = { + .is_visible = amd_brs_is_visible, + }; + ++EVENT_ATTR_STR(branch-brs, amd_branch_brs, ++ "event=" __stringify(AMD_FAM19H_BRS_EVENT)"\n"); ++ ++static struct attribute *amd_brs_events_attrs[] = { ++ EVENT_PTR(amd_branch_brs), ++ NULL, ++}; ++ ++static struct attribute_group group_events_amd_brs = { ++ .name = "events", ++ .attrs = amd_brs_events_attrs, ++ .is_visible = amd_brs_is_visible, ++}; ++ + static const struct attribute_group *amd_attr_update[] = { + &group_caps_amd_brs, ++ &group_events_amd_brs, + NULL, + }; + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0062-perf-x86-amd-Enable-branch-sampling-priv-level-filte.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0062-perf-x86-amd-Enable-branch-sampling-priv-level-filte.patch new file mode 100644 index 00000000..056b8ec1 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0062-perf-x86-amd-Enable-branch-sampling-priv-level-filte.patch @@ -0,0 +1,93 @@ +From 78a43944d3509d24b180da236561b6721167f009 Mon Sep 17 00:00:00 2001 +From: Stephane Eranian <eranian@google.com> +Date: Tue, 22 Mar 2022 15:15:09 -0700 +Subject: [PATCH 62/86] perf/x86/amd: Enable branch sampling priv level + filtering + +commit 8910075d61a37e5b0d82e6c83ed9a0a31fe9ea08 upstream + +The AMD Branch Sampling features does not provide hardware filtering by +privilege level. The associated PMU counter does but not the branch sampling +by itself. Given how BRS operates there is a possibility that BRS captures +kernel level branches even though the event is programmed to count only at +the user level. + +Implement a workaround in software by removing the branches which belong to +the wrong privilege level. The privilege level is evaluated on the target of +the branch and not the source so as to be compatible with other architectures. +As a consequence of this patch, the number of entries in the +PERF_RECORD_BRANCH_STACK buffer may be less than the maximum (16). It could +even be zero. Another consequence is that consecutive entries in the branch +stack may not reflect actual code path and may have discontinuities, in case +kernel branches were suppressed. But this is no different than what happens +on other architectures. + +Signed-off-by: Stephane Eranian <eranian@google.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220322221517.2510440-6-eranian@google.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/brs.c | 26 ++++++++++++++++++++------ + 1 file changed, 20 insertions(+), 6 deletions(-) + +diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c +index 3c13c484c637..40461c3ce714 100644 +--- a/arch/x86/events/amd/brs.c ++++ b/arch/x86/events/amd/brs.c +@@ -92,10 +92,6 @@ int amd_brs_setup_filter(struct perf_event *event) + if ((type & ~PERF_SAMPLE_BRANCH_PLM_ALL) != PERF_SAMPLE_BRANCH_ANY) + return -EINVAL; + +- /* can only capture at all priv levels due to the way BRS works */ +- if ((type & PERF_SAMPLE_BRANCH_PLM_ALL) != PERF_SAMPLE_BRANCH_PLM_ALL) +- return -EINVAL; +- + return 0; + } + +@@ -195,6 +191,21 @@ void amd_brs_disable_all(void) + amd_brs_disable(); + } + ++static bool amd_brs_match_plm(struct perf_event *event, u64 to) ++{ ++ int type = event->attr.branch_sample_type; ++ int plm_k = PERF_SAMPLE_BRANCH_KERNEL | PERF_SAMPLE_BRANCH_HV; ++ int plm_u = PERF_SAMPLE_BRANCH_USER; ++ ++ if (!(type & plm_k) && kernel_ip(to)) ++ return 0; ++ ++ if (!(type & plm_u) && !kernel_ip(to)) ++ return 0; ++ ++ return 1; ++} ++ + /* + * Caller must ensure amd_brs_inuse() is true before calling + * return: +@@ -252,8 +263,6 @@ void amd_brs_drain(void) + if (to == BRS_POISON) + break; + +- rdmsrl(brs_from(brs_idx), from); +- + /* + * Sign-extend SAMP_BR_TO to 64 bits, bits 61-63 are reserved. + * Necessary to generate proper virtual addresses suitable for +@@ -261,6 +270,11 @@ void amd_brs_drain(void) + */ + to = (u64)(((s64)to << shift) >> shift); + ++ if (!amd_brs_match_plm(event, to)) ++ continue; ++ ++ rdmsrl(brs_from(brs_idx), from); ++ + perf_clear_branch_entry_bitfields(br+nr); + + br[nr].from = from; +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0063-perf-x86-amd-Add-AMD-branch-sampling-period-adjustme.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0063-perf-x86-amd-Add-AMD-branch-sampling-period-adjustme.patch new file mode 100644 index 00000000..aa553a1c --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0063-perf-x86-amd-Add-AMD-branch-sampling-period-adjustme.patch @@ -0,0 +1,79 @@ +From c9c86880f212bdb168b231fb770e2f4d05a84cc9 Mon Sep 17 00:00:00 2001 +From: Stephane Eranian <eranian@google.com> +Date: Tue, 22 Mar 2022 15:15:10 -0700 +Subject: [PATCH 63/86] perf/x86/amd: Add AMD branch sampling period adjustment + +commit ba2fe7500845a30fc845a72081999cf632051862 upstream + +Add code to adjust the sampling event period when used with the Branch +Sampling feature (BRS). Given the depth of the BRS (16), the period is +reduced by that depth such that in the best case scenario, BRS saturates at +the desired sampling period. In practice, though, the processor may execute +more branches. Given a desired period P and a depth D, the kernel programs +the actual period at P - D. After P occurrences of the sampling event, the +counter overflows. It then may take X branches (skid) before the NMI is +caught and held by the hardware and BRS activates. Then, after D branches, +BRS saturates and the NMI is delivered. With no skid, the effective period +would be (P - D) + D = P. In practice, however, it will likely be (P - D) + +X + D. There is no way to eliminate X or predict X. + +Signed-off-by: Stephane Eranian <eranian@google.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220322221517.2510440-7-eranian@google.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/core.c | 7 +++++++ + arch/x86/events/perf_event.h | 12 ++++++++++++ + 2 files changed, 19 insertions(+) + +diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c +index ddbfbf304b2d..91ed45c98353 100644 +--- a/arch/x86/events/core.c ++++ b/arch/x86/events/core.c +@@ -1370,6 +1370,13 @@ int x86_perf_event_set_period(struct perf_event *event) + x86_pmu.set_topdown_event_period) + return x86_pmu.set_topdown_event_period(event); + ++ /* ++ * decrease period by the depth of the BRS feature to get ++ * the last N taken branches and approximate the desired period ++ */ ++ if (has_branch_stack(event)) ++ period = amd_brs_adjust_period(period); ++ + /* + * If we are way outside a reasonable range then just skip forward: + */ +diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h +index ec7eb3fedbce..19a254cf8c7d 100644 +--- a/arch/x86/events/perf_event.h ++++ b/arch/x86/events/perf_event.h +@@ -1261,6 +1261,14 @@ static inline bool amd_brs_active(void) + return cpuc->brs_active; + } + ++static inline s64 amd_brs_adjust_period(s64 period) ++{ ++ if (period > x86_pmu.lbr_nr) ++ return period - x86_pmu.lbr_nr; ++ ++ return period; ++} ++ + #else /* CONFIG_CPU_SUP_AMD */ + + static inline int amd_pmu_init(void) +@@ -1285,6 +1293,10 @@ static inline void amd_brs_disable_all(void) + { + } + ++static inline s64 amd_brs_adjust_period(s64 period) ++{ ++ return period; ++} + #endif /* CONFIG_CPU_SUP_AMD */ + + static inline int is_pebs_pt(struct perf_event *event) +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0064-perf-x86-amd-Make-Zen3-branch-sampling-opt-in.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0064-perf-x86-amd-Make-Zen3-branch-sampling-opt-in.patch new file mode 100644 index 00000000..49b0d70d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0064-perf-x86-amd-Make-Zen3-branch-sampling-opt-in.patch @@ -0,0 +1,129 @@ +From cde85a9d795f51d0fcdc6f0e7e5f15aa15101d5f Mon Sep 17 00:00:00 2001 +From: Stephane Eranian <eranian@google.com> +Date: Tue, 22 Mar 2022 15:15:11 -0700 +Subject: [PATCH 64/86] perf/x86/amd: Make Zen3 branch sampling opt-in + +commit cc37e520a236069c0de0e7ea455082fa11c73b12 upstream + +Add a kernel config option CONFIG_PERF_EVENTS_AMD_BRS +to make the support for AMD Zen3 Branch Sampling (BRS) an opt-in +compile time option. + +Signed-off-by: Stephane Eranian <eranian@google.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220322221517.2510440-8-eranian@google.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/Kconfig | 8 ++++++ + arch/x86/events/amd/Makefile | 3 ++- + arch/x86/events/perf_event.h | 49 ++++++++++++++++++++++++++++-------- + 3 files changed, 49 insertions(+), 11 deletions(-) + +diff --git a/arch/x86/events/Kconfig b/arch/x86/events/Kconfig +index d6cdfe631674..09c56965750a 100644 +--- a/arch/x86/events/Kconfig ++++ b/arch/x86/events/Kconfig +@@ -44,4 +44,12 @@ config PERF_EVENTS_AMD_UNCORE + + To compile this driver as a module, choose M here: the + module will be called 'amd-uncore'. ++ ++config PERF_EVENTS_AMD_BRS ++ depends on PERF_EVENTS && CPU_SUP_AMD ++ bool "AMD Zen3 Branch Sampling support" ++ help ++ Enable AMD Zen3 branch sampling support (BRS) which samples up to ++ 16 consecutive taken branches in registers. ++ + endmenu +diff --git a/arch/x86/events/amd/Makefile b/arch/x86/events/amd/Makefile +index cf323ffab5cd..b9f5d4610256 100644 +--- a/arch/x86/events/amd/Makefile ++++ b/arch/x86/events/amd/Makefile +@@ -1,5 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0 +-obj-$(CONFIG_CPU_SUP_AMD) += core.o brs.o ++obj-$(CONFIG_CPU_SUP_AMD) += core.o ++obj-$(CONFIG_PERF_EVENTS_AMD_BRS) += brs.o + obj-$(CONFIG_PERF_EVENTS_AMD_POWER) += power.o + obj-$(CONFIG_X86_LOCAL_APIC) += ibs.o + obj-$(CONFIG_PERF_EVENTS_AMD_UNCORE) += amd-uncore.o +diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h +index 19a254cf8c7d..e2c4dc114bda 100644 +--- a/arch/x86/events/perf_event.h ++++ b/arch/x86/events/perf_event.h +@@ -1216,6 +1216,8 @@ static inline bool fixed_counter_disabled(int i, struct pmu *pmu) + #ifdef CONFIG_CPU_SUP_AMD + + int amd_pmu_init(void); ++ ++#ifdef CONFIG_PERF_EVENTS_AMD_BRS + int amd_brs_init(void); + void amd_brs_disable(void); + void amd_brs_enable(void); +@@ -1250,25 +1252,52 @@ static inline void amd_pmu_brs_del(struct perf_event *event) + + void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool sched_in); + +-/* +- * check if BRS is activated on the CPU +- * active defined as it has non-zero users and DBG_EXT_CFG.BRSEN=1 +- */ +-static inline bool amd_brs_active(void) ++static inline s64 amd_brs_adjust_period(s64 period) + { +- struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ if (period > x86_pmu.lbr_nr) ++ return period - x86_pmu.lbr_nr; + +- return cpuc->brs_active; ++ return period; ++} ++#else ++static inline int amd_brs_init(void) ++{ ++ return 0; + } ++static inline void amd_brs_disable(void) {} ++static inline void amd_brs_enable(void) {} ++static inline void amd_brs_drain(void) {} ++static inline void amd_brs_lopwr_init(void) {} ++static inline void amd_brs_disable_all(void) {} ++static inline int amd_brs_setup_filter(struct perf_event *event) ++{ ++ return 0; ++} ++static inline void amd_brs_reset(void) {} + +-static inline s64 amd_brs_adjust_period(s64 period) ++static inline void amd_pmu_brs_add(struct perf_event *event) + { +- if (period > x86_pmu.lbr_nr) +- return period - x86_pmu.lbr_nr; ++} ++ ++static inline void amd_pmu_brs_del(struct perf_event *event) ++{ ++} ++ ++static inline void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool sched_in) ++{ ++} + ++static inline s64 amd_brs_adjust_period(s64 period) ++{ + return period; + } + ++static inline void amd_brs_enable_all(void) ++{ ++} ++ ++#endif ++ + #else /* CONFIG_CPU_SUP_AMD */ + + static inline int amd_pmu_init(void) +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0065-ACPI-processor-idle-Use-swap-instead-of-open-coding-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0065-ACPI-processor-idle-Use-swap-instead-of-open-coding-.patch new file mode 100644 index 00000000..2d2b9df3 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0065-ACPI-processor-idle-Use-swap-instead-of-open-coding-.patch @@ -0,0 +1,54 @@ +From e024f669994ad52e1df2ff4001f7715f9a86566b Mon Sep 17 00:00:00 2001 +From: Guo Zhengkui <guozhengkui@vivo.com> +Date: Tue, 9 Nov 2021 15:50:51 +0800 +Subject: [PATCH 65/86] ACPI: processor idle: Use swap() instead of open coding + it + +commit 0e6078c3c6737df7d0bd0c890fbadf24a27fffbb upstream + +Address the following coccicheck warning: + +./drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c:914:40-41: +WARNING opportunity for swap(). + +by using swap() for the swapping of variable values and drop +the tmp variable that is not needed any more. + +Signed-off-by: Guo Zhengkui <guozhengkui@vivo.com> +[ rjw: Subject and changelog rewrite ] +Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/acpi/processor_idle.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c +index dc880dad2ade..fdd0ce789cc8 100644 +--- a/drivers/acpi/processor_idle.c ++++ b/drivers/acpi/processor_idle.c +@@ -20,6 +20,7 @@ + #include <linux/tick.h> + #include <linux/cpuidle.h> + #include <linux/cpu.h> ++#include <linux/minmax.h> + #include <acpi/processor.h> + + /* +@@ -400,13 +401,10 @@ static int acpi_cst_latency_cmp(const void *a, const void *b) + static void acpi_cst_latency_swap(void *a, void *b, int n) + { + struct acpi_processor_cx *x = a, *y = b; +- u32 tmp; + + if (!(x->valid && y->valid)) + return; +- tmp = x->latency; +- x->latency = y->latency; +- y->latency = tmp; ++ swap(x->latency, y->latency); + } + + static int acpi_processor_power_verify(struct acpi_processor *pr) +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0066-ACPI-Add-perf-low-power-callback.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0066-ACPI-Add-perf-low-power-callback.patch new file mode 100644 index 00000000..7c94617c --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0066-ACPI-Add-perf-low-power-callback.patch @@ -0,0 +1,106 @@ +From 39c93781d2b6f3f1b5d695fd74bf0ddca720fdea Mon Sep 17 00:00:00 2001 +From: Stephane Eranian <eranian@google.com> +Date: Tue, 22 Mar 2022 15:15:12 -0700 +Subject: [PATCH 66/86] ACPI: Add perf low power callback + +commit 2a606a18cd672a16343d146a126721b34cc6adbd upstream + +Add an optional callback needed by some PMU features, e.g., AMD +BRS, to give a chance to the perf_events code to change its state before +a CPU goes to low power and after it comes back. + +The callback is void when the PERF_NEEDS_LOPWR_CB flag is not set. +This flag must be set in arch specific perf_event.h header whenever needed. +When not set, there is no impact on the ACPI code. + +Signed-off-by: Stephane Eranian <eranian@google.com> +[peterz: build fix] +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220322221517.2510440-9-eranian@google.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/acpi/acpi_pad.c | 7 +++++++ + drivers/acpi/processor_idle.c | 5 +++++ + include/linux/perf_event.h | 6 ++++++ + 3 files changed, 18 insertions(+) + +diff --git a/drivers/acpi/acpi_pad.c b/drivers/acpi/acpi_pad.c +index f45979aa2d64..ec0e22a1e25d 100644 +--- a/drivers/acpi/acpi_pad.c ++++ b/drivers/acpi/acpi_pad.c +@@ -17,6 +17,7 @@ + #include <linux/tick.h> + #include <linux/slab.h> + #include <linux/acpi.h> ++#include <linux/perf_event.h> + #include <asm/mwait.h> + #include <xen/xen.h> + +@@ -164,6 +165,9 @@ static int power_saving_thread(void *data) + tsc_marked_unstable = 1; + } + local_irq_disable(); ++ ++ perf_lopwr_cb(true); ++ + tick_broadcast_enable(); + tick_broadcast_enter(); + stop_critical_timings(); +@@ -172,6 +176,9 @@ static int power_saving_thread(void *data) + + start_critical_timings(); + tick_broadcast_exit(); ++ ++ perf_lopwr_cb(false); ++ + local_irq_enable(); + + if (time_before(expire_time, jiffies)) { +diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c +index fdd0ce789cc8..c8b651eca333 100644 +--- a/drivers/acpi/processor_idle.c ++++ b/drivers/acpi/processor_idle.c +@@ -21,6 +21,7 @@ + #include <linux/cpuidle.h> + #include <linux/cpu.h> + #include <linux/minmax.h> ++#include <linux/perf_event.h> + #include <acpi/processor.h> + + /* +@@ -544,6 +545,8 @@ static void wait_for_freeze(void) + */ + static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx) + { ++ perf_lopwr_cb(true); ++ + if (cx->entry_method == ACPI_CSTATE_FFH) { + /* Call into architectural FFH based C-state */ + acpi_processor_ffh_cstate_enter(cx); +@@ -554,6 +557,8 @@ static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx) + inb(cx->address); + wait_for_freeze(); + } ++ ++ perf_lopwr_cb(false); + } + + /** +diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h +index 5d65aa186c1a..24f7c2e7423b 100644 +--- a/include/linux/perf_event.h ++++ b/include/linux/perf_event.h +@@ -1664,4 +1664,10 @@ typedef int (perf_snapshot_branch_stack_t)(struct perf_branch_entry *entries, + unsigned int cnt); + DECLARE_STATIC_CALL(perf_snapshot_branch_stack, perf_snapshot_branch_stack_t); + ++#ifndef PERF_NEEDS_LOPWR_CB ++static inline void perf_lopwr_cb(bool mode) ++{ ++} ++#endif ++ + #endif /* _LINUX_PERF_EVENT_H */ +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0067-perf-x86-amd-Add-idle-hooks-for-branch-sampling.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0067-perf-x86-amd-Add-idle-hooks-for-branch-sampling.patch new file mode 100644 index 00000000..fe0cd084 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0067-perf-x86-amd-Add-idle-hooks-for-branch-sampling.patch @@ -0,0 +1,153 @@ +From fbc9f8129c3070cebecd797ee9f9facfc238dd1e Mon Sep 17 00:00:00 2001 +From: Stephane Eranian <eranian@google.com> +Date: Tue, 22 Mar 2022 15:15:13 -0700 +Subject: [PATCH 67/86] perf/x86/amd: Add idle hooks for branch sampling + +commit d5616bac7adadbf42a3b63b8717e75eb82a2cc2c upstream + +On AMD Fam19h Zen3, the branch sampling (BRS) feature must be disabled before +entering low power and re-enabled (if was active) when returning from low +power. Otherwise, the NMI interrupt may be held up for too long and cause +problems. Stopping BRS will cause the NMI to be delivered if it was held up. + +Define a perf_amd_brs_lopwr_cb() callback to stop/restart BRS. The callback +is protected by a jump label which is enabled only when AMD BRS is detected. +In all other cases, the callback is never called. + +Signed-off-by: Stephane Eranian <eranian@google.com> +[peterz: static_call() and build fixes] +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220322221517.2510440-10-eranian@google.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/brs.c | 33 +++++++++++++++++++++++++++++++ + arch/x86/events/amd/core.c | 4 ++++ + arch/x86/events/perf_event.h | 1 + + arch/x86/include/asm/perf_event.h | 23 +++++++++++++++++++++ + 4 files changed, 61 insertions(+) + +diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c +index 40461c3ce714..895c82165d85 100644 +--- a/arch/x86/events/amd/brs.c ++++ b/arch/x86/events/amd/brs.c +@@ -7,6 +7,7 @@ + * Contributed by Stephane Eranian <eranian@google.com> + */ + #include <linux/kernel.h> ++#include <linux/jump_label.h> + #include <asm/msr.h> + #include <asm/cpufeature.h> + +@@ -329,3 +330,35 @@ void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool sched_in) + if (sched_in) + amd_brs_poison_buffer(); + } ++ ++/* ++ * called from ACPI processor_idle.c or acpi_pad.c ++ * with interrupts disabled ++ */ ++void perf_amd_brs_lopwr_cb(bool lopwr_in) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ union amd_debug_extn_cfg cfg; ++ ++ /* ++ * on mwait in, we may end up in non C0 state. ++ * we must disable branch sampling to avoid holding the NMI ++ * for too long. We disable it in hardware but we ++ * keep the state in cpuc, so we can re-enable. ++ * ++ * The hardware will deliver the NMI if needed when brsmen cleared ++ */ ++ if (cpuc->brs_active) { ++ cfg.val = get_debug_extn_cfg(); ++ cfg.brsmen = !lopwr_in; ++ set_debug_extn_cfg(cfg.val); ++ } ++} ++ ++DEFINE_STATIC_CALL_NULL(perf_lopwr_cb, perf_amd_brs_lopwr_cb); ++EXPORT_STATIC_CALL_TRAMP_GPL(perf_lopwr_cb); ++ ++void __init amd_brs_lopwr_init(void) ++{ ++ static_call_update(perf_lopwr_cb, perf_amd_brs_lopwr_cb); ++} +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index f7bce8364fe4..8e1e818f8195 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -1,5 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0-only + #include <linux/perf_event.h> ++#include <linux/jump_label.h> + #include <linux/export.h> + #include <linux/types.h> + #include <linux/init.h> +@@ -1225,6 +1226,9 @@ static int __init amd_core_pmu_init(void) + /* + * put_event_constraints callback same as Fam17h, set above + */ ++ ++ /* branch sampling must be stopped when entering low power */ ++ amd_brs_lopwr_init(); + } + + x86_pmu.attr_update = amd_attr_update; +diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h +index e2c4dc114bda..49948372b44a 100644 +--- a/arch/x86/events/perf_event.h ++++ b/arch/x86/events/perf_event.h +@@ -1224,6 +1224,7 @@ void amd_brs_enable(void); + void amd_brs_enable_all(void); + void amd_brs_disable_all(void); + void amd_brs_drain(void); ++void amd_brs_lopwr_init(void); + void amd_brs_disable_all(void); + int amd_brs_setup_filter(struct perf_event *event); + void amd_brs_reset(void); +diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h +index a2b6626c681f..0e72770c45ff 100644 +--- a/arch/x86/include/asm/perf_event.h ++++ b/arch/x86/include/asm/perf_event.h +@@ -2,6 +2,8 @@ + #ifndef _ASM_X86_PERF_EVENT_H + #define _ASM_X86_PERF_EVENT_H + ++#include <linux/static_call.h> ++ + /* + * Performance event hw details: + */ +@@ -518,6 +520,27 @@ static inline void intel_pt_handle_vmx(int on) + #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD) + extern void amd_pmu_enable_virt(void); + extern void amd_pmu_disable_virt(void); ++ ++#if defined(CONFIG_PERF_EVENTS_AMD_BRS) ++ ++#define PERF_NEEDS_LOPWR_CB 1 ++ ++/* ++ * architectural low power callback impacts ++ * drivers/acpi/processor_idle.c ++ * drivers/acpi/acpi_pad.c ++ */ ++extern void perf_amd_brs_lopwr_cb(bool lopwr_in); ++ ++DECLARE_STATIC_CALL(perf_lopwr_cb, perf_amd_brs_lopwr_cb); ++ ++static inline void perf_lopwr_cb(bool lopwr_in) ++{ ++ static_call_mod(perf_lopwr_cb)(lopwr_in); ++} ++ ++#endif /* PERF_NEEDS_LOPWR_CB */ ++ + #else + static inline void amd_pmu_enable_virt(void) { } + static inline void amd_pmu_disable_virt(void) { } +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0068-perf-x86-Unify-format-of-events-sysfs-show.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0068-perf-x86-Unify-format-of-events-sysfs-show.patch new file mode 100644 index 00000000..381cf205 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0068-perf-x86-Unify-format-of-events-sysfs-show.patch @@ -0,0 +1,79 @@ +From 36a6af1e1191c98724f981ef8a4b522191c072a7 Mon Sep 17 00:00:00 2001 +From: Yang Jihong <yangjihong1@huawei.com> +Date: Thu, 24 Mar 2022 11:19:57 +0800 +Subject: [PATCH 68/86] perf/x86: Unify format of events sysfs show + +commit 7bebfe9dd802b80abff5a43e00ab68d98893a22c upstream + +Sysfs show formats of files in /sys/devices/cpu/events/ are not unified, +some end with "\n", and some do not. Modify sysfs show format of events +defined by EVENT_ATTR_STR to end with "\n". + +Before: + $ ls /sys/devices/cpu/events/* | xargs -i sh -c 'echo -n "{}: "; cat -A {}; echo' + branch-instructions: event=0xc4$ + + branch-misses: event=0xc5$ + + bus-cycles: event=0x3c,umask=0x01$ + + cache-misses: event=0x2e,umask=0x41$ + + cache-references: event=0x2e,umask=0x4f$ + + cpu-cycles: event=0x3c$ + + instructions: event=0xc0$ + + ref-cycles: event=0x00,umask=0x03$ + + slots: event=0x00,umask=0x4 + topdown-bad-spec: event=0x00,umask=0x81 + topdown-be-bound: event=0x00,umask=0x83 + topdown-fe-bound: event=0x00,umask=0x82 + topdown-retiring: event=0x00,umask=0x80 + +After: + $ ls /sys/devices/cpu/events/* | xargs -i sh -c 'echo -n "{}: "; cat -A {}; echo' + /sys/devices/cpu/events/branch-instructions: event=0xc4$ + + /sys/devices/cpu/events/branch-misses: event=0xc5$ + + /sys/devices/cpu/events/bus-cycles: event=0x3c,umask=0x01$ + + /sys/devices/cpu/events/cache-misses: event=0x2e,umask=0x41$ + + /sys/devices/cpu/events/cache-references: event=0x2e,umask=0x4f$ + + /sys/devices/cpu/events/cpu-cycles: event=0x3c$ + + /sys/devices/cpu/events/instructions: event=0xc0$ + + /sys/devices/cpu/events/ref-cycles: event=0x00,umask=0x03$ + + /sys/devices/cpu/events/slots: event=0x00,umask=0x4$ + +Signed-off-by: Yang Jihong <yangjihong1@huawei.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lkml.kernel.org/r/20220324031957.135595-1-yangjihong1@huawei.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c +index 91ed45c98353..fcc25b4783a3 100644 +--- a/arch/x86/events/core.c ++++ b/arch/x86/events/core.c +@@ -1848,7 +1848,7 @@ ssize_t events_sysfs_show(struct device *dev, struct device_attribute *attr, cha + + /* string trumps id */ + if (pmu_attr->event_str) +- return sprintf(page, "%s", pmu_attr->event_str); ++ return sprintf(page, "%s\n", pmu_attr->event_str); + + return x86_pmu.events_sysfs_show(page, config); + } +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0069-x86-cpufeatures-Add-PerfMonV2-feature-bit.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0069-x86-cpufeatures-Add-PerfMonV2-feature-bit.patch new file mode 100644 index 00000000..6abf9476 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0069-x86-cpufeatures-Add-PerfMonV2-feature-bit.patch @@ -0,0 +1,57 @@ +From 26f8e6b4feed94c2b7abd7b9e3d9511d5166eb80 Mon Sep 17 00:00:00 2001 +From: Sandipan Das <sandipan.das@amd.com> +Date: Thu, 21 Apr 2022 11:16:53 +0530 +Subject: [PATCH 69/86] x86/cpufeatures: Add PerfMonV2 feature bit + +commit d6d0c7f681fda1d07e005c8f653e578b77a0eb40 upstream + +CPUID leaf 0x80000022 i.e. ExtPerfMonAndDbg advertises some +new performance monitoring features for AMD processors. + +Bit 0 of EAX indicates support for Performance Monitoring +Version 2 (PerfMonV2) features. If found to be set during +PMU initialization, the EBX bits of the same CPUID function +can be used to determine the number of available PMCs for +different PMU types. Additionally, Core PMCs can be managed +using new global control and status registers. + +For better utilization of feature words, PerfMonV2 is added +as a scattered feature bit. + +Signed-off-by: Sandipan Das <sandipan.das@amd.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lkml.kernel.org/r/c70e497e22f18e7f05b025bb64ca21cc12b17792.1650515382.git.sandipan.das@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/cpufeatures.h | 2 +- + arch/x86/kernel/cpu/scattered.c | 1 + + 2 files changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h +index 4ae869607697..1db6a7bd51d6 100644 +--- a/arch/x86/include/asm/cpufeatures.h ++++ b/arch/x86/include/asm/cpufeatures.h +@@ -211,7 +211,7 @@ + #define X86_FEATURE_SSBD ( 7*32+17) /* Speculative Store Bypass Disable */ + #define X86_FEATURE_MBA ( 7*32+18) /* Memory Bandwidth Allocation */ + #define X86_FEATURE_RSB_CTXSW ( 7*32+19) /* "" Fill RSB on context switches */ +-/* FREE! ( 7*32+20) */ ++#define X86_FEATURE_PERFMON_V2 ( 7*32+20) /* AMD Performance Monitoring Version 2 */ + #define X86_FEATURE_USE_IBPB ( 7*32+21) /* "" Indirect Branch Prediction Barrier enabled */ + #define X86_FEATURE_USE_IBRS_FW ( 7*32+22) /* "" Use IBRS during runtime firmware calls */ + #define X86_FEATURE_SPEC_STORE_BYPASS_DISABLE ( 7*32+23) /* "" Disable Speculative Store Bypass. */ +diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c +index 06bfef1c4175..c0cdd8ddde66 100644 +--- a/arch/x86/kernel/cpu/scattered.c ++++ b/arch/x86/kernel/cpu/scattered.c +@@ -43,6 +43,7 @@ static const struct cpuid_bit cpuid_bits[] = { + { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, + { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, + { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, ++ { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, + { 0, 0, 0, 0, 0 } + }; + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0070-x86-msr-Add-PerfCntrGlobal-registers.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0070-x86-msr-Add-PerfCntrGlobal-registers.patch new file mode 100644 index 00000000..6f05845c --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0070-x86-msr-Add-PerfCntrGlobal-registers.patch @@ -0,0 +1,50 @@ +From a4dfc3b9a600e737446dcaf18952fe7c74f3b7ea Mon Sep 17 00:00:00 2001 +From: Sandipan Das <sandipan.das@amd.com> +Date: Thu, 21 Apr 2022 11:16:54 +0530 +Subject: [PATCH 70/86] x86/msr: Add PerfCntrGlobal* registers + +commit 089be16d5992dd0bc6df15ef12042fd1023ded9a upstream + +Add MSR definitions that will be used to enable the new AMD +Performance Monitoring Version 2 (PerfMonV2) features. These +include: + + * Performance Counter Global Control (PerfCntrGlobalCtl) + * Performance Counter Global Status (PerfCntrGlobalStatus) + * Performance Counter Global Status Clear (PerfCntrGlobalStatusClr) + +The new Performance Counter Global Control and Status MSRs +provide an interface for enabling or disabling multiple +counters at the same time and for testing overflow without +probing the individual registers for each PMC. + +The availability of these registers is indicated through the +PerfMonV2 feature bit of CPUID leaf 0x80000022 EAX. + +Signed-off-by: Sandipan Das <sandipan.das@amd.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lkml.kernel.org/r/cdc0d8f75bd519848731b5c64d924f5a0619a573.1650515382.git.sandipan.das@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/msr-index.h | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h +index 480e4870aa42..9629a054c199 100644 +--- a/arch/x86/include/asm/msr-index.h ++++ b/arch/x86/include/asm/msr-index.h +@@ -542,6 +542,11 @@ + #define AMD_CPPC_DES_PERF(x) (((x) & 0xff) << 16) + #define AMD_CPPC_ENERGY_PERF_PREF(x) (((x) & 0xff) << 24) + ++/* AMD Performance Counter Global Status and Control MSRs */ ++#define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS 0xc0000300 ++#define MSR_AMD64_PERF_CNTR_GLOBAL_CTL 0xc0000301 ++#define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR 0xc0000302 ++ + /* Fam 17h MSRs */ + #define MSR_F17H_IRPERF 0xc00000e9 + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0071-perf-x86-amd-core-Detect-PerfMonV2-support.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0071-perf-x86-amd-core-Detect-PerfMonV2-support.patch new file mode 100644 index 00000000..69a8b20a --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0071-perf-x86-amd-core-Detect-PerfMonV2-support.patch @@ -0,0 +1,97 @@ +From 0ab25d82c2929c87fc132e92192c88eeffd6f438 Mon Sep 17 00:00:00 2001 +From: Sandipan Das <sandipan.das@amd.com> +Date: Thu, 21 Apr 2022 11:16:55 +0530 +Subject: [PATCH 71/86] perf/x86/amd/core: Detect PerfMonV2 support + +commit 21d59e3e2c403c83ba196a5857d517054124168e upstream + +AMD Performance Monitoring Version 2 (PerfMonV2) introduces +some new Core PMU features such as detection of the number +of available PMCs and managing PMCs using global registers +namely, PerfCntrGlobalCtl and PerfCntrGlobalStatus. + +Clearing PerfCntrGlobalCtl and PerfCntrGlobalStatus ensures +that all PMCs are inactive and have no pending overflows +when CPUs are onlined or offlined. + +The PMU version (x86_pmu.version) now indicates PerfMonV2 +support and will be used to bypass the new features on +unsupported processors. + +Signed-off-by: Sandipan Das <sandipan.das@amd.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lkml.kernel.org/r/dc8672ecbddff394e088ca8abf94b089b8ecc2e7.1650515382.git.sandipan.das@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/core.c | 27 +++++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index 8e1e818f8195..b70dfa028ba5 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -19,6 +19,9 @@ static unsigned long perf_nmi_window; + #define AMD_MERGE_EVENT ((0xFULL << 32) | 0xFFULL) + #define AMD_MERGE_EVENT_ENABLE (AMD_MERGE_EVENT | ARCH_PERFMON_EVENTSEL_ENABLE) + ++/* PMC Enable and Overflow bits for PerfCntrGlobal* registers */ ++static u64 amd_pmu_global_cntr_mask __read_mostly; ++ + static __initconst const u64 amd_hw_cache_event_ids + [PERF_COUNT_HW_CACHE_MAX] + [PERF_COUNT_HW_CACHE_OP_MAX] +@@ -578,6 +581,18 @@ static struct amd_nb *amd_alloc_nb(int cpu) + return nb; + } + ++static void amd_pmu_cpu_reset(int cpu) ++{ ++ if (x86_pmu.version < 2) ++ return; ++ ++ /* Clear enable bits i.e. PerfCntrGlobalCtl.PerfCntrEn */ ++ wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, 0); ++ ++ /* Clear overflow bits i.e. PerfCntrGLobalStatus.PerfCntrOvfl */ ++ wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR, amd_pmu_global_cntr_mask); ++} ++ + static int amd_pmu_cpu_prepare(int cpu) + { + struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu); +@@ -625,6 +640,7 @@ static void amd_pmu_cpu_starting(int cpu) + cpuc->amd_nb->refcnt++; + + amd_brs_reset(); ++ amd_pmu_cpu_reset(cpu); + } + + static void amd_pmu_cpu_dead(int cpu) +@@ -644,6 +660,8 @@ static void amd_pmu_cpu_dead(int cpu) + + cpuhw->amd_nb = NULL; + } ++ ++ amd_pmu_cpu_reset(cpu); + } + + /* +@@ -1185,6 +1203,15 @@ static int __init amd_core_pmu_init(void) + x86_pmu.eventsel = MSR_F15H_PERF_CTL; + x86_pmu.perfctr = MSR_F15H_PERF_CTR; + x86_pmu.num_counters = AMD64_NUM_COUNTERS_CORE; ++ ++ /* Check for Performance Monitoring v2 support */ ++ if (boot_cpu_has(X86_FEATURE_PERFMON_V2)) { ++ /* Update PMU version for later usage */ ++ x86_pmu.version = 2; ++ ++ amd_pmu_global_cntr_mask = (1ULL << x86_pmu.num_counters) - 1; ++ } ++ + /* + * AMD Core perfctr has separate MSRs for the NB events, see + * the amd/uncore.c driver. +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0072-perf-x86-amd-core-Detect-available-counters.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0072-perf-x86-amd-core-Detect-available-counters.patch new file mode 100644 index 00000000..0ce157b6 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0072-perf-x86-amd-core-Detect-available-counters.patch @@ -0,0 +1,86 @@ +From 21e62a82997c18eb4d417350753ee242821ea972 Mon Sep 17 00:00:00 2001 +From: Sandipan Das <sandipan.das@amd.com> +Date: Thu, 21 Apr 2022 11:16:56 +0530 +Subject: [PATCH 72/86] perf/x86/amd/core: Detect available counters + +commit 56e026a7ca3f92b8e44359e1f705febd1833f701 upstream + +If AMD Performance Monitoring Version 2 (PerfMonV2) is +supported, use CPUID leaf 0x80000022 EBX to detect the +number of Core PMCs. This offers more flexibility if the +counts change in later processor families. + +Signed-off-by: Sandipan Das <sandipan.das@amd.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lkml.kernel.org/r/68a6d9688df189267db26530378870edd34f7b06.1650515382.git.sandipan.das@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/core.c | 6 ++++++ + arch/x86/include/asm/perf_event.h | 17 +++++++++++++++++ + 2 files changed, 23 insertions(+) + +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index b70dfa028ba5..52fd7941a724 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -1186,6 +1186,7 @@ static const struct attribute_group *amd_attr_update[] = { + + static int __init amd_core_pmu_init(void) + { ++ union cpuid_0x80000022_ebx ebx; + u64 even_ctr_mask = 0ULL; + int i; + +@@ -1206,9 +1207,14 @@ static int __init amd_core_pmu_init(void) + + /* Check for Performance Monitoring v2 support */ + if (boot_cpu_has(X86_FEATURE_PERFMON_V2)) { ++ ebx.full = cpuid_ebx(EXT_PERFMON_DEBUG_FEATURES); ++ + /* Update PMU version for later usage */ + x86_pmu.version = 2; + ++ /* Find the number of available Core PMCs */ ++ x86_pmu.num_counters = ebx.split.num_core_pmc; ++ + amd_pmu_global_cntr_mask = (1ULL << x86_pmu.num_counters) - 1; + } + +diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h +index 0e72770c45ff..92d72a4db57b 100644 +--- a/arch/x86/include/asm/perf_event.h ++++ b/arch/x86/include/asm/perf_event.h +@@ -186,6 +186,18 @@ union cpuid28_ecx { + unsigned int full; + }; + ++/* ++ * AMD "Extended Performance Monitoring and Debug" CPUID ++ * detection/enumeration details: ++ */ ++union cpuid_0x80000022_ebx { ++ struct { ++ /* Number of Core Performance Counters */ ++ unsigned int num_core_pmc:4; ++ } split; ++ unsigned int full; ++}; ++ + struct x86_pmu_capability { + int version; + int num_counters_gp; +@@ -372,6 +384,11 @@ struct pebs_xmm { + u64 xmm[16*2]; /* two entries for each register */ + }; + ++/* ++ * AMD Extended Performance Monitoring and Debug cpuid feature detection ++ */ ++#define EXT_PERFMON_DEBUG_FEATURES 0x80000022 ++ + /* + * IBS cpuid feature detection + */ +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0073-perf-x86-amd-core-Add-PerfMonV2-counter-control.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0073-perf-x86-amd-core-Add-PerfMonV2-counter-control.patch new file mode 100644 index 00000000..afd91e4e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0073-perf-x86-amd-core-Add-PerfMonV2-counter-control.patch @@ -0,0 +1,138 @@ +From 21ca98c4c18bf0b0c13e77180a713a33401d539d Mon Sep 17 00:00:00 2001 +From: Sandipan Das <sandipan.das@amd.com> +Date: Thu, 21 Apr 2022 11:16:57 +0530 +Subject: [PATCH 73/86] perf/x86/amd/core: Add PerfMonV2 counter control + +commit 9622e67e3980c01872490de0925e5c6c23247c94 upstream + +If AMD Performance Monitoring Version 2 (PerfMonV2) is +supported, use a new scheme to manage the Core PMCs using +the new global control and status registers. This will be +bypassed on unsupported hardware (x86_pmu.version < 2). + +Currently, all PMCs have dedicated control (PERF_CTL) and +counter (PERF_CTR) registers. For a given PMC, the enable +(En) bit of its PERF_CTL register is used to start or stop +counting. + +The Performance Counter Global Control (PerfCntrGlobalCtl) +register has enable (PerfCntrEn) bits for each PMC. For a +PMC to start counting, both PERF_CTL and PerfCntrGlobalCtl +enable bits must be set. If either of those are cleared, +the PMC stops counting. + +In x86_pmu_{en,dis}able_all(), the PERF_CTL registers of +all active PMCs are written to in a loop. Ideally, PMCs +counting the same event that were started and stopped at +the same time should record the same counts. Due to delays +in between writes to the PERF_CTL registers across loop +iterations, the PMCs cannot be enabled or disabled at the +same instant and hence, record slightly different counts. +This is fixed by enabling or disabling all active PMCs at +the same time with a single write to the PerfCntrGlobalCtl +register. + +Signed-off-by: Sandipan Das <sandipan.das@amd.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lkml.kernel.org/r/dfe8e934074aaabc6ba748dfaccd0a77c974bb82.1650515382.git.sandipan.das@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/core.c | 50 ++++++++++++++++++++++++++++++++++---- + 1 file changed, 45 insertions(+), 5 deletions(-) + +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index 52fd7941a724..a339c3e0be33 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -664,6 +664,11 @@ static void amd_pmu_cpu_dead(int cpu) + amd_pmu_cpu_reset(cpu); + } + ++static inline void amd_pmu_set_global_ctl(u64 ctl) ++{ ++ wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, ctl); ++} ++ + /* + * When a PMC counter overflows, an NMI is used to process the event and + * reset the counter. NMI latency can result in the counter being updated +@@ -693,15 +698,11 @@ static void amd_pmu_wait_on_overflow(int idx) + } + } + +-static void amd_pmu_disable_all(void) ++static void amd_pmu_check_overflow(void) + { + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); + int idx; + +- amd_brs_disable_all(); +- +- x86_pmu_disable_all(); +- + /* + * This shouldn't be called from NMI context, but add a safeguard here + * to return, since if we're in NMI context we can't wait for an NMI +@@ -748,6 +749,26 @@ static void amd_pmu_enable_all(int added) + } + } + ++static void amd_pmu_v2_enable_event(struct perf_event *event) ++{ ++ struct hw_perf_event *hwc = &event->hw; ++ ++ /* ++ * Testing cpu_hw_events.enabled should be skipped in this case unlike ++ * in x86_pmu_enable_event(). ++ * ++ * Since cpu_hw_events.enabled is set only after returning from ++ * x86_pmu_start(), the PMCs must be programmed and kept ready. ++ * Counting starts only after x86_pmu_enable_all() is called. ++ */ ++ __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); ++} ++ ++static void amd_pmu_v2_enable_all(int added) ++{ ++ amd_pmu_set_global_ctl(amd_pmu_global_cntr_mask); ++} ++ + static void amd_pmu_disable_event(struct perf_event *event) + { + x86_pmu_disable_event(event); +@@ -765,6 +786,20 @@ static void amd_pmu_disable_event(struct perf_event *event) + amd_pmu_wait_on_overflow(event->hw.idx); + } + ++static void amd_pmu_disable_all(void) ++{ ++ amd_brs_disable_all(); ++ x86_pmu_disable_all(); ++ amd_pmu_check_overflow(); ++} ++ ++static void amd_pmu_v2_disable_all(void) ++{ ++ /* Disable all PMCs */ ++ amd_pmu_set_global_ctl(0); ++ amd_pmu_check_overflow(); ++} ++ + static void amd_pmu_add_event(struct perf_event *event) + { + if (needs_branch_stack(event)) +@@ -1216,6 +1251,11 @@ static int __init amd_core_pmu_init(void) + x86_pmu.num_counters = ebx.split.num_core_pmc; + + amd_pmu_global_cntr_mask = (1ULL << x86_pmu.num_counters) - 1; ++ ++ /* Update PMC handling functions */ ++ x86_pmu.enable_all = amd_pmu_v2_enable_all; ++ x86_pmu.disable_all = amd_pmu_v2_disable_all; ++ x86_pmu.enable = amd_pmu_v2_enable_event; + } + + /* +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0074-perf-x86-amd-core-Add-PerfMonV2-overflow-handling.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0074-perf-x86-amd-core-Add-PerfMonV2-overflow-handling.patch new file mode 100644 index 00000000..eba808c4 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0074-perf-x86-amd-core-Add-PerfMonV2-overflow-handling.patch @@ -0,0 +1,246 @@ +From 44118d4b0482167b136929aed8efda00b013fff8 Mon Sep 17 00:00:00 2001 +From: Sandipan Das <sandipan.das@amd.com> +Date: Thu, 21 Apr 2022 11:16:58 +0530 +Subject: [PATCH 74/86] perf/x86/amd/core: Add PerfMonV2 overflow handling + +commit 7685665c390dc68c2d9a74e8445f41494cc8f6cf upstream + +If AMD Performance Monitoring Version 2 (PerfMonV2) is +supported, use a new scheme to process Core PMC overflows +in the NMI handler using the new global control and status +registers. This will be bypassed on unsupported hardware +(x86_pmu.version < 2). + +In x86_pmu_handle_irq(), overflows are detected by testing +the contents of the PERF_CTR register for each active PMC in +a loop. The new scheme instead inspects the overflow bits of +the global status register. + +The Performance Counter Global Status (PerfCntrGlobalStatus) +register has overflow (PerfCntrOvfl) bits for each PMC. This +is, however, a read-only MSR. To acknowledge that overflows +have been processed, the NMI handler must clear the bits by +writing to the PerfCntrGlobalStatusClr register. + +In x86_pmu_handle_irq(), PMCs counting the same event that +are started and stopped at the same time record slightly +different counts due to delays in between reads from the +PERF_CTR registers. This is fixed by stopping and starting +the PMCs at the same before and with a single write to the +Performance Counter Global Control (PerfCntrGlobalCtl) upon +entering and before exiting the NMI handler. + +Signed-off-by: Sandipan Das <sandipan.das@amd.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lkml.kernel.org/r/f20b7e4da0b0a83bdbe05857f354146623bc63ab.1650515382.git.sandipan.das@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/core.c | 144 ++++++++++++++++++++++++++++++++++--- + 1 file changed, 133 insertions(+), 11 deletions(-) + +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index a339c3e0be33..262e39a85031 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -8,6 +8,7 @@ + #include <linux/delay.h> + #include <linux/jiffies.h> + #include <asm/apicdef.h> ++#include <asm/apic.h> + #include <asm/nmi.h> + + #include "../perf_event.h" +@@ -669,6 +670,45 @@ static inline void amd_pmu_set_global_ctl(u64 ctl) + wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, ctl); + } + ++static inline u64 amd_pmu_get_global_status(void) ++{ ++ u64 status; ++ ++ /* PerfCntrGlobalStatus is read-only */ ++ rdmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS, status); ++ ++ return status & amd_pmu_global_cntr_mask; ++} ++ ++static inline void amd_pmu_ack_global_status(u64 status) ++{ ++ /* ++ * PerfCntrGlobalStatus is read-only but an overflow acknowledgment ++ * mechanism exists; writing 1 to a bit in PerfCntrGlobalStatusClr ++ * clears the same bit in PerfCntrGlobalStatus ++ */ ++ ++ /* Only allow modifications to PerfCntrGlobalStatus.PerfCntrOvfl */ ++ status &= amd_pmu_global_cntr_mask; ++ wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR, status); ++} ++ ++static bool amd_pmu_test_overflow_topbit(int idx) ++{ ++ u64 counter; ++ ++ rdmsrl(x86_pmu_event_addr(idx), counter); ++ ++ return !(counter & BIT_ULL(x86_pmu.cntval_bits - 1)); ++} ++ ++static bool amd_pmu_test_overflow_status(int idx) ++{ ++ return amd_pmu_get_global_status() & BIT_ULL(idx); ++} ++ ++DEFINE_STATIC_CALL(amd_pmu_test_overflow, amd_pmu_test_overflow_topbit); ++ + /* + * When a PMC counter overflows, an NMI is used to process the event and + * reset the counter. NMI latency can result in the counter being updated +@@ -681,7 +721,6 @@ static inline void amd_pmu_set_global_ctl(u64 ctl) + static void amd_pmu_wait_on_overflow(int idx) + { + unsigned int i; +- u64 counter; + + /* + * Wait for the counter to be reset if it has overflowed. This loop +@@ -689,8 +728,7 @@ static void amd_pmu_wait_on_overflow(int idx) + * forever... + */ + for (i = 0; i < OVERFLOW_WAIT_COUNT; i++) { +- rdmsrl(x86_pmu_event_addr(idx), counter); +- if (counter & (1ULL << (x86_pmu.cntval_bits - 1))) ++ if (!static_call(amd_pmu_test_overflow)(idx)) + break; + + /* Might be in IRQ context, so can't sleep */ +@@ -830,6 +868,24 @@ static void amd_pmu_del_event(struct perf_event *event) + * handled a counter. When an un-handled NMI is received, it will be claimed + * only if arriving within that window. + */ ++static inline int amd_pmu_adjust_nmi_window(int handled) ++{ ++ /* ++ * If a counter was handled, record a timestamp such that un-handled ++ * NMIs will be claimed if arriving within that window. ++ */ ++ if (handled) { ++ this_cpu_write(perf_nmi_tstamp, jiffies + perf_nmi_window); ++ ++ return handled; ++ } ++ ++ if (time_after(jiffies, this_cpu_read(perf_nmi_tstamp))) ++ return NMI_DONE; ++ ++ return NMI_HANDLED; ++} ++ + static int amd_pmu_handle_irq(struct pt_regs *regs) + { + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); +@@ -857,20 +913,84 @@ static int amd_pmu_handle_irq(struct pt_regs *regs) + if (pmu_enabled) + amd_pmu_enable_all(0); + ++ return amd_pmu_adjust_nmi_window(handled); ++} ++ ++static int amd_pmu_v2_handle_irq(struct pt_regs *regs) ++{ ++ struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); ++ struct perf_sample_data data; ++ struct hw_perf_event *hwc; ++ struct perf_event *event; ++ int handled = 0, idx; ++ u64 status, mask; ++ bool pmu_enabled; ++ + /* +- * If a counter was handled, record a timestamp such that un-handled +- * NMIs will be claimed if arriving within that window. ++ * Save the PMU state as it needs to be restored when leaving the ++ * handler + */ +- if (handled) { +- this_cpu_write(perf_nmi_tstamp, jiffies + perf_nmi_window); ++ pmu_enabled = cpuc->enabled; ++ cpuc->enabled = 0; + +- return handled; ++ /* Stop counting */ ++ amd_pmu_v2_disable_all(); ++ ++ status = amd_pmu_get_global_status(); ++ ++ /* Check if any overflows are pending */ ++ if (!status) ++ goto done; ++ ++ for (idx = 0; idx < x86_pmu.num_counters; idx++) { ++ if (!test_bit(idx, cpuc->active_mask)) ++ continue; ++ ++ event = cpuc->events[idx]; ++ hwc = &event->hw; ++ x86_perf_event_update(event); ++ mask = BIT_ULL(idx); ++ ++ if (!(status & mask)) ++ continue; ++ ++ /* Event overflow */ ++ handled++; ++ perf_sample_data_init(&data, 0, hwc->last_period); ++ ++ if (!x86_perf_event_set_period(event)) ++ continue; ++ ++ if (perf_event_overflow(event, &data, regs)) ++ x86_pmu_stop(event, 0); ++ ++ status &= ~mask; + } + +- if (time_after(jiffies, this_cpu_read(perf_nmi_tstamp))) +- return NMI_DONE; ++ /* ++ * It should never be the case that some overflows are not handled as ++ * the corresponding PMCs are expected to be inactive according to the ++ * active_mask ++ */ ++ WARN_ON(status > 0); + +- return NMI_HANDLED; ++ /* Clear overflow bits */ ++ amd_pmu_ack_global_status(~status); ++ ++ /* ++ * Unmasking the LVTPC is not required as the Mask (M) bit of the LVT ++ * PMI entry is not set by the local APIC when a PMC overflow occurs ++ */ ++ inc_irq_stat(apic_perf_irqs); ++ ++done: ++ cpuc->enabled = pmu_enabled; ++ ++ /* Resume counting only if PMU is active */ ++ if (pmu_enabled) ++ amd_pmu_v2_enable_all(0); ++ ++ return amd_pmu_adjust_nmi_window(handled); + } + + static struct event_constraint * +@@ -1256,6 +1376,8 @@ static int __init amd_core_pmu_init(void) + x86_pmu.enable_all = amd_pmu_v2_enable_all; + x86_pmu.disable_all = amd_pmu_v2_disable_all; + x86_pmu.enable = amd_pmu_v2_enable_event; ++ x86_pmu.handle_irq = amd_pmu_v2_handle_irq; ++ static_call_update(amd_pmu_test_overflow, amd_pmu_test_overflow_status); + } + + /* +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0075-perf-amd-ibs-Use-is_visible-callback-for-dynamic-att.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0075-perf-amd-ibs-Use-is_visible-callback-for-dynamic-att.patch new file mode 100644 index 00000000..9469d4b9 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0075-perf-amd-ibs-Use-is_visible-callback-for-dynamic-att.patch @@ -0,0 +1,177 @@ +From 20efc1f83222c3003aed82f0c7e10e0379d6c40d Mon Sep 17 00:00:00 2001 +From: Ravi Bangoria <ravi.bangoria@amd.com> +Date: Mon, 9 May 2022 10:19:08 +0530 +Subject: [PATCH 75/86] perf/amd/ibs: Use ->is_visible callback for dynamic + attributes + +commit 2a7a7e658682bfd7501dc6b4c9d365aa6c79788a upstream + +Currently, some attributes are added at build time whereas others +at boot time depending on IBS pmu capabilities. Instead, we can +just add all attribute groups at build time but hide individual +group at boot time using more appropriate ->is_visible() callback. + +Also, struct perf_ibs has bunch of fields for pmu attributes which +just pass on the pointer, does not do anything else. Remove them. + +Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220509044914.1473-3-ravi.bangoria@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/ibs.c | 78 +++++++++++++++++++++++++++------------ + 1 file changed, 54 insertions(+), 24 deletions(-) + +diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c +index 2704ec1e42a3..ece4f6a7d24b 100644 +--- a/arch/x86/events/amd/ibs.c ++++ b/arch/x86/events/amd/ibs.c +@@ -94,10 +94,6 @@ struct perf_ibs { + unsigned int fetch_ignore_if_zero_rip : 1; + struct cpu_perf_ibs __percpu *pcpu; + +- struct attribute **format_attrs; +- struct attribute_group format_group; +- const struct attribute_group *attr_groups[2]; +- + u64 (*get_count)(u64 config); + }; + +@@ -528,16 +524,61 @@ static void perf_ibs_del(struct perf_event *event, int flags) + + static void perf_ibs_read(struct perf_event *event) { } + ++/* ++ * We need to initialize with empty group if all attributes in the ++ * group are dynamic. ++ */ ++static struct attribute *attrs_empty[] = { ++ NULL, ++}; ++ ++static struct attribute_group empty_format_group = { ++ .name = "format", ++ .attrs = attrs_empty, ++}; ++ ++static const struct attribute_group *empty_attr_groups[] = { ++ &empty_format_group, ++ NULL, ++}; ++ + PMU_FORMAT_ATTR(rand_en, "config:57"); + PMU_FORMAT_ATTR(cnt_ctl, "config:19"); + +-static struct attribute *ibs_fetch_format_attrs[] = { ++static struct attribute *rand_en_attrs[] = { + &format_attr_rand_en.attr, + NULL, + }; + +-static struct attribute *ibs_op_format_attrs[] = { +- NULL, /* &format_attr_cnt_ctl.attr if IBS_CAPS_OPCNT */ ++static struct attribute_group group_rand_en = { ++ .name = "format", ++ .attrs = rand_en_attrs, ++}; ++ ++static const struct attribute_group *fetch_attr_groups[] = { ++ &group_rand_en, ++ NULL, ++}; ++ ++static umode_t ++cnt_ctl_is_visible(struct kobject *kobj, struct attribute *attr, int i) ++{ ++ return ibs_caps & IBS_CAPS_OPCNT ? attr->mode : 0; ++} ++ ++static struct attribute *cnt_ctl_attrs[] = { ++ &format_attr_cnt_ctl.attr, ++ NULL, ++}; ++ ++static struct attribute_group group_cnt_ctl = { ++ .name = "format", ++ .attrs = cnt_ctl_attrs, ++ .is_visible = cnt_ctl_is_visible, ++}; ++ ++static const struct attribute_group *op_attr_update[] = { ++ &group_cnt_ctl, + NULL, + }; + +@@ -561,7 +602,6 @@ static struct perf_ibs perf_ibs_fetch = { + .max_period = IBS_FETCH_MAX_CNT << 4, + .offset_mask = { MSR_AMD64_IBSFETCH_REG_MASK }, + .offset_max = MSR_AMD64_IBSFETCH_REG_COUNT, +- .format_attrs = ibs_fetch_format_attrs, + + .get_count = get_ibs_fetch_count, + }; +@@ -587,7 +627,6 @@ static struct perf_ibs perf_ibs_op = { + .max_period = IBS_OP_MAX_CNT << 4, + .offset_mask = { MSR_AMD64_IBSOP_REG_MASK }, + .offset_max = MSR_AMD64_IBSOP_REG_COUNT, +- .format_attrs = ibs_op_format_attrs, + + .get_count = get_ibs_op_count, + }; +@@ -757,17 +796,6 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name) + + perf_ibs->pcpu = pcpu; + +- /* register attributes */ +- if (perf_ibs->format_attrs[0]) { +- memset(&perf_ibs->format_group, 0, sizeof(perf_ibs->format_group)); +- perf_ibs->format_group.name = "format"; +- perf_ibs->format_group.attrs = perf_ibs->format_attrs; +- +- memset(&perf_ibs->attr_groups, 0, sizeof(perf_ibs->attr_groups)); +- perf_ibs->attr_groups[0] = &perf_ibs->format_group; +- perf_ibs->pmu.attr_groups = perf_ibs->attr_groups; +- } +- + ret = perf_pmu_register(&perf_ibs->pmu, name, -1); + if (ret) { + perf_ibs->pcpu = NULL; +@@ -779,7 +807,6 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name) + + static __init int perf_event_ibs_init(void) + { +- struct attribute **attr = ibs_op_format_attrs; + int ret; + + /* +@@ -792,14 +819,14 @@ static __init int perf_event_ibs_init(void) + if (boot_cpu_data.x86 == 0x19 && boot_cpu_data.x86_model < 0x10) + perf_ibs_fetch.fetch_ignore_if_zero_rip = 1; + ++ perf_ibs_fetch.pmu.attr_groups = fetch_attr_groups; ++ + ret = perf_ibs_pmu_init(&perf_ibs_fetch, "ibs_fetch"); + if (ret) + return ret; + +- if (ibs_caps & IBS_CAPS_OPCNT) { ++ if (ibs_caps & IBS_CAPS_OPCNT) + perf_ibs_op.config_mask |= IBS_OP_CNT_CTL; +- *attr++ = &format_attr_cnt_ctl.attr; +- } + + if (ibs_caps & IBS_CAPS_OPCNTEXT) { + perf_ibs_op.max_period |= IBS_OP_MAX_CNT_EXT_MASK; +@@ -807,6 +834,9 @@ static __init int perf_event_ibs_init(void) + perf_ibs_op.cnt_mask |= IBS_OP_MAX_CNT_EXT_MASK; + } + ++ perf_ibs_op.pmu.attr_groups = empty_attr_groups; ++ perf_ibs_op.pmu.attr_update = op_attr_update; ++ + ret = perf_ibs_pmu_init(&perf_ibs_op, "ibs_op"); + if (ret) + goto err_op; +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0076-perf-amd-ibs-Add-support-for-L3-miss-filtering.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0076-perf-amd-ibs-Add-support-for-L3-miss-filtering.patch new file mode 100644 index 00000000..8dfcef2b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0076-perf-amd-ibs-Add-support-for-L3-miss-filtering.patch @@ -0,0 +1,197 @@ +From 9f9d4ab0ec570a5ca9d1057127ad26fdbd6cbf15 Mon Sep 17 00:00:00 2001 +From: Ravi Bangoria <ravi.bangoria@amd.com> +Date: Mon, 9 May 2022 10:19:09 +0530 +Subject: [PATCH 76/86] perf/amd/ibs: Add support for L3 miss filtering + +commit ba5d35b442c65f32d38ef61f732218274c6dcf4c upstream + +IBS L3 miss filtering works by tagging an instruction on IBS counter +overflow and generating an NMI if the tagged instruction causes an L3 +miss. Samples without an L3 miss are discarded and counter is reset +with random value (between 1-15 for fetch pmu and 1-127 for op pmu). +This helps in reducing sampling overhead when user is interested only +in such samples. One of the use case of such filtered samples is to +feed data to page-migration daemon in tiered memory systems. + +Add support for L3 miss filtering in IBS driver via new pmu attribute +"l3missonly". Example usage: + + # perf record -a -e ibs_op/l3missonly=1/ --raw-samples sleep 5 + +Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220509044914.1473-4-ravi.bangoria@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/ibs.c | 67 +++++++++++++++++++++++++++---- + arch/x86/include/asm/perf_event.h | 3 ++ + 2 files changed, 63 insertions(+), 7 deletions(-) + +diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c +index ece4f6a7d24b..2dc8b7ec030a 100644 +--- a/arch/x86/events/amd/ibs.c ++++ b/arch/x86/events/amd/ibs.c +@@ -544,22 +544,46 @@ static const struct attribute_group *empty_attr_groups[] = { + + PMU_FORMAT_ATTR(rand_en, "config:57"); + PMU_FORMAT_ATTR(cnt_ctl, "config:19"); ++PMU_EVENT_ATTR_STRING(l3missonly, fetch_l3missonly, "config:59"); ++PMU_EVENT_ATTR_STRING(l3missonly, op_l3missonly, "config:16"); ++ ++static umode_t ++zen4_ibs_extensions_is_visible(struct kobject *kobj, struct attribute *attr, int i) ++{ ++ return ibs_caps & IBS_CAPS_ZEN4 ? attr->mode : 0; ++} + + static struct attribute *rand_en_attrs[] = { + &format_attr_rand_en.attr, + NULL, + }; + ++static struct attribute *fetch_l3missonly_attrs[] = { ++ &fetch_l3missonly.attr.attr, ++ NULL, ++}; ++ + static struct attribute_group group_rand_en = { + .name = "format", + .attrs = rand_en_attrs, + }; + ++static struct attribute_group group_fetch_l3missonly = { ++ .name = "format", ++ .attrs = fetch_l3missonly_attrs, ++ .is_visible = zen4_ibs_extensions_is_visible, ++}; ++ + static const struct attribute_group *fetch_attr_groups[] = { + &group_rand_en, + NULL, + }; + ++static const struct attribute_group *fetch_attr_update[] = { ++ &group_fetch_l3missonly, ++ NULL, ++}; ++ + static umode_t + cnt_ctl_is_visible(struct kobject *kobj, struct attribute *attr, int i) + { +@@ -571,14 +595,26 @@ static struct attribute *cnt_ctl_attrs[] = { + NULL, + }; + ++static struct attribute *op_l3missonly_attrs[] = { ++ &op_l3missonly.attr.attr, ++ NULL, ++}; ++ + static struct attribute_group group_cnt_ctl = { + .name = "format", + .attrs = cnt_ctl_attrs, + .is_visible = cnt_ctl_is_visible, + }; + ++static struct attribute_group group_op_l3missonly = { ++ .name = "format", ++ .attrs = op_l3missonly_attrs, ++ .is_visible = zen4_ibs_extensions_is_visible, ++}; ++ + static const struct attribute_group *op_attr_update[] = { + &group_cnt_ctl, ++ &group_op_l3missonly, + NULL, + }; + +@@ -805,10 +841,8 @@ static __init int perf_ibs_pmu_init(struct perf_ibs *perf_ibs, char *name) + return ret; + } + +-static __init int perf_event_ibs_init(void) ++static __init int perf_ibs_fetch_init(void) + { +- int ret; +- + /* + * Some chips fail to reset the fetch count when it is written; instead + * they need a 0-1 transition of IbsFetchEn. +@@ -819,12 +853,17 @@ static __init int perf_event_ibs_init(void) + if (boot_cpu_data.x86 == 0x19 && boot_cpu_data.x86_model < 0x10) + perf_ibs_fetch.fetch_ignore_if_zero_rip = 1; + ++ if (ibs_caps & IBS_CAPS_ZEN4) ++ perf_ibs_fetch.config_mask |= IBS_FETCH_L3MISSONLY; ++ + perf_ibs_fetch.pmu.attr_groups = fetch_attr_groups; ++ perf_ibs_fetch.pmu.attr_update = fetch_attr_update; + +- ret = perf_ibs_pmu_init(&perf_ibs_fetch, "ibs_fetch"); +- if (ret) +- return ret; ++ return perf_ibs_pmu_init(&perf_ibs_fetch, "ibs_fetch"); ++} + ++static __init int perf_ibs_op_init(void) ++{ + if (ibs_caps & IBS_CAPS_OPCNT) + perf_ibs_op.config_mask |= IBS_OP_CNT_CTL; + +@@ -834,10 +873,24 @@ static __init int perf_event_ibs_init(void) + perf_ibs_op.cnt_mask |= IBS_OP_MAX_CNT_EXT_MASK; + } + ++ if (ibs_caps & IBS_CAPS_ZEN4) ++ perf_ibs_op.config_mask |= IBS_OP_L3MISSONLY; ++ + perf_ibs_op.pmu.attr_groups = empty_attr_groups; + perf_ibs_op.pmu.attr_update = op_attr_update; + +- ret = perf_ibs_pmu_init(&perf_ibs_op, "ibs_op"); ++ return perf_ibs_pmu_init(&perf_ibs_op, "ibs_op"); ++} ++ ++static __init int perf_event_ibs_init(void) ++{ ++ int ret; ++ ++ ret = perf_ibs_fetch_init(); ++ if (ret) ++ return ret; ++ ++ ret = perf_ibs_op_init(); + if (ret) + goto err_op; + +diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h +index 92d72a4db57b..686189d5f307 100644 +--- a/arch/x86/include/asm/perf_event.h ++++ b/arch/x86/include/asm/perf_event.h +@@ -410,6 +410,7 @@ struct pebs_xmm { + #define IBS_CAPS_OPBRNFUSE (1U<<8) + #define IBS_CAPS_FETCHCTLEXTD (1U<<9) + #define IBS_CAPS_OPDATA4 (1U<<10) ++#define IBS_CAPS_ZEN4 (1U<<11) + + #define IBS_CAPS_DEFAULT (IBS_CAPS_AVAIL \ + | IBS_CAPS_FETCHSAM \ +@@ -423,6 +424,7 @@ struct pebs_xmm { + #define IBSCTL_LVT_OFFSET_MASK 0x0F + + /* IBS fetch bits/masks */ ++#define IBS_FETCH_L3MISSONLY (1ULL<<59) + #define IBS_FETCH_RAND_EN (1ULL<<57) + #define IBS_FETCH_VAL (1ULL<<49) + #define IBS_FETCH_ENABLE (1ULL<<48) +@@ -439,6 +441,7 @@ struct pebs_xmm { + #define IBS_OP_CNT_CTL (1ULL<<19) + #define IBS_OP_VAL (1ULL<<18) + #define IBS_OP_ENABLE (1ULL<<17) ++#define IBS_OP_L3MISSONLY (1ULL<<16) + #define IBS_OP_MAX_CNT 0x0000FFFFULL + #define IBS_OP_MAX_CNT_EXT 0x007FFFFFULL /* not a register bit mask */ + #define IBS_OP_MAX_CNT_EXT_MASK (0x7FULL<<20) /* separate upper 7 bits */ +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0077-perf-amd-ibs-Advertise-zen4_ibs_extensions-as-pmu-ca.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0077-perf-amd-ibs-Advertise-zen4_ibs_extensions-as-pmu-ca.patch new file mode 100644 index 00000000..b52ec457 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0077-perf-amd-ibs-Advertise-zen4_ibs_extensions-as-pmu-ca.patch @@ -0,0 +1,98 @@ +From 9ee6583df3fb0747502035b430969e1e59b1c9f7 Mon Sep 17 00:00:00 2001 +From: Ravi Bangoria <ravi.bangoria@amd.com> +Date: Mon, 9 May 2022 10:19:10 +0530 +Subject: [PATCH 77/86] perf/amd/ibs: Advertise zen4_ibs_extensions as pmu + capability attribute + +commit 838de1d843fc9b6161e0e1c6308a8c027d08606d upstream + +PMU driver can advertise certain feature via capability attribute('caps' +sysfs directory) which can be consumed by userspace tools like perf. Add +zen4_ibs_extensions capability attribute for IBS pmus. This attribute +will be enabled when CPUID_Fn8000001B_EAX[11] is set. + +With patch on Zen4: + + $ ls /sys/bus/event_source/devices/ibs_op/caps + zen4_ibs_extensions + +Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lore.kernel.org/r/20220509044914.1473-5-ravi.bangoria@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/ibs.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c +index 2dc8b7ec030a..c251bc44c088 100644 +--- a/arch/x86/events/amd/ibs.c ++++ b/arch/x86/events/amd/ibs.c +@@ -537,8 +537,14 @@ static struct attribute_group empty_format_group = { + .attrs = attrs_empty, + }; + ++static struct attribute_group empty_caps_group = { ++ .name = "caps", ++ .attrs = attrs_empty, ++}; ++ + static const struct attribute_group *empty_attr_groups[] = { + &empty_format_group, ++ &empty_caps_group, + NULL, + }; + +@@ -546,6 +552,7 @@ PMU_FORMAT_ATTR(rand_en, "config:57"); + PMU_FORMAT_ATTR(cnt_ctl, "config:19"); + PMU_EVENT_ATTR_STRING(l3missonly, fetch_l3missonly, "config:59"); + PMU_EVENT_ATTR_STRING(l3missonly, op_l3missonly, "config:16"); ++PMU_EVENT_ATTR_STRING(zen4_ibs_extensions, zen4_ibs_extensions, "1"); + + static umode_t + zen4_ibs_extensions_is_visible(struct kobject *kobj, struct attribute *attr, int i) +@@ -563,6 +570,11 @@ static struct attribute *fetch_l3missonly_attrs[] = { + NULL, + }; + ++static struct attribute *zen4_ibs_extensions_attrs[] = { ++ &zen4_ibs_extensions.attr.attr, ++ NULL, ++}; ++ + static struct attribute_group group_rand_en = { + .name = "format", + .attrs = rand_en_attrs, +@@ -574,13 +586,21 @@ static struct attribute_group group_fetch_l3missonly = { + .is_visible = zen4_ibs_extensions_is_visible, + }; + ++static struct attribute_group group_zen4_ibs_extensions = { ++ .name = "caps", ++ .attrs = zen4_ibs_extensions_attrs, ++ .is_visible = zen4_ibs_extensions_is_visible, ++}; ++ + static const struct attribute_group *fetch_attr_groups[] = { + &group_rand_en, ++ &empty_caps_group, + NULL, + }; + + static const struct attribute_group *fetch_attr_update[] = { + &group_fetch_l3missonly, ++ &group_zen4_ibs_extensions, + NULL, + }; + +@@ -615,6 +635,7 @@ static struct attribute_group group_op_l3missonly = { + static const struct attribute_group *op_attr_update[] = { + &group_cnt_ctl, + &group_op_l3missonly, ++ &group_zen4_ibs_extensions, + NULL, + }; + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0078-perf-x86-amd-Remove-unused-variable-hwc.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0078-perf-x86-amd-Remove-unused-variable-hwc.patch new file mode 100644 index 00000000..8c550819 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0078-perf-x86-amd-Remove-unused-variable-hwc.patch @@ -0,0 +1,39 @@ +From c1977a8c9fef6e5ab30f62f41a0b5f9c0df1956b Mon Sep 17 00:00:00 2001 +From: Zucheng Zheng <zhengzucheng@huawei.com> +Date: Thu, 21 Apr 2022 19:10:31 +0800 +Subject: [PATCH 78/86] perf/x86/amd: Remove unused variable 'hwc' + +commit bc469ddf67154a4840267132e87ce0d8b72d4952 upstream + +'hwc' is never used in amd_pmu_enable_all(), so remove it. + +Signed-off-by: Zucheng Zheng <zhengzucheng@huawei.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lkml.kernel.org/r/20220421111031.174698-1-zhengzucheng@huawei.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/core.c | 3 --- + 1 file changed, 3 deletions(-) + +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index 262e39a85031..d81eac2284ea 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -771,14 +771,11 @@ static void amd_pmu_enable_event(struct perf_event *event) + static void amd_pmu_enable_all(int added) + { + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); +- struct hw_perf_event *hwc; + int idx; + + amd_brs_enable_all(); + + for (idx = 0; idx < x86_pmu.num_counters; idx++) { +- hwc = &cpuc->events[idx]->hw; +- + /* only activate events which are marked as active */ + if (!test_bit(idx, cpuc->active_mask)) + continue; +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0079-perf-x86-amd-Fix-AMD-BRS-period-adjustment.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0079-perf-x86-amd-Fix-AMD-BRS-period-adjustment.patch new file mode 100644 index 00000000..3e8eca9d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0079-perf-x86-amd-Fix-AMD-BRS-period-adjustment.patch @@ -0,0 +1,122 @@ +From 6a9fdabf0e988a5010bec70307180ad6dfa2b0d1 Mon Sep 17 00:00:00 2001 +From: Peter Zijlstra <peterz@infradead.org> +Date: Tue, 10 May 2022 21:22:04 +0200 +Subject: [PATCH 79/86] perf/x86/amd: Fix AMD BRS period adjustment + +commit 3c27b0c6ea48bc61492a138c410e262735d660ab upstream + +There's two problems with the current amd_brs_adjust_period() code: + + - it isn't in fact AMD specific and wil always adjust the period; + + - it adjusts the period, while it should only adjust the event count, + resulting in repoting a short period. + +Fix this by using x86_pmu.limit_period, this makes it specific to the +AMD BRS case and ensures only the event count is adjusted while the +reported period is unmodified. + +Fixes: ba2fe7500845 ("perf/x86/amd: Add AMD branch sampling period adjustment") +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/core.c | 13 +++++++++++++ + arch/x86/events/core.c | 7 ------- + arch/x86/events/perf_event.h | 18 ------------------ + 3 files changed, 13 insertions(+), 25 deletions(-) + +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index d81eac2284ea..3eee59c64daa 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -1255,6 +1255,18 @@ static void amd_pmu_sched_task(struct perf_event_context *ctx, + amd_pmu_brs_sched_task(ctx, sched_in); + } + ++static u64 amd_pmu_limit_period(struct perf_event *event, u64 left) ++{ ++ /* ++ * Decrease period by the depth of the BRS feature to get the last N ++ * taken branches and approximate the desired period ++ */ ++ if (has_branch_stack(event) && left > x86_pmu.lbr_nr) ++ left -= x86_pmu.lbr_nr; ++ ++ return left; ++} ++ + static __initconst const struct x86_pmu amd_pmu = { + .name = "AMD", + .handle_irq = amd_pmu_handle_irq, +@@ -1415,6 +1427,7 @@ static int __init amd_core_pmu_init(void) + if (boot_cpu_data.x86 >= 0x19 && !amd_brs_init()) { + x86_pmu.get_event_constraints = amd_get_event_constraints_f19h; + x86_pmu.sched_task = amd_pmu_sched_task; ++ x86_pmu.limit_period = amd_pmu_limit_period; + /* + * put_event_constraints callback same as Fam17h, set above + */ +diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c +index fcc25b4783a3..1ea82bb2639b 100644 +--- a/arch/x86/events/core.c ++++ b/arch/x86/events/core.c +@@ -1370,13 +1370,6 @@ int x86_perf_event_set_period(struct perf_event *event) + x86_pmu.set_topdown_event_period) + return x86_pmu.set_topdown_event_period(event); + +- /* +- * decrease period by the depth of the BRS feature to get +- * the last N taken branches and approximate the desired period +- */ +- if (has_branch_stack(event)) +- period = amd_brs_adjust_period(period); +- + /* + * If we are way outside a reasonable range then just skip forward: + */ +diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h +index 49948372b44a..aa53815c2f61 100644 +--- a/arch/x86/events/perf_event.h ++++ b/arch/x86/events/perf_event.h +@@ -1252,14 +1252,6 @@ static inline void amd_pmu_brs_del(struct perf_event *event) + } + + void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool sched_in); +- +-static inline s64 amd_brs_adjust_period(s64 period) +-{ +- if (period > x86_pmu.lbr_nr) +- return period - x86_pmu.lbr_nr; +- +- return period; +-} + #else + static inline int amd_brs_init(void) + { +@@ -1288,11 +1280,6 @@ static inline void amd_pmu_brs_sched_task(struct perf_event_context *ctx, bool s + { + } + +-static inline s64 amd_brs_adjust_period(s64 period) +-{ +- return period; +-} +- + static inline void amd_brs_enable_all(void) + { + } +@@ -1322,11 +1309,6 @@ static inline void amd_brs_enable_all(void) + static inline void amd_brs_disable_all(void) + { + } +- +-static inline s64 amd_brs_adjust_period(s64 period) +-{ +- return period; +-} + #endif /* CONFIG_CPU_SUP_AMD */ + + static inline int is_pebs_pt(struct perf_event *event) +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0080-perf-x86-amd-Run-AMD-BRS-code-only-on-supported-hw.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0080-perf-x86-amd-Run-AMD-BRS-code-only-on-supported-hw.patch new file mode 100644 index 00000000..8f348fe7 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0080-perf-x86-amd-Run-AMD-BRS-code-only-on-supported-hw.patch @@ -0,0 +1,74 @@ +From 90a300d8283fe5184d2d84cd28b7e718091f245e Mon Sep 17 00:00:00 2001 +From: Borislav Petkov <bp@suse.de> +Date: Mon, 16 May 2022 17:48:38 +0200 +Subject: [PATCH 80/86] perf/x86/amd: Run AMD BRS code only on supported hw + +commit 841b51e4a3590866d17fa2663c64688c25b891b1 upstream + +This fires on a Fam16h machine here: + + unchecked MSR access error: WRMSR to 0xc000010f (tried to write 0x0000000000000018) \ + at rIP: 0xffffffff81007db1 (amd_brs_reset+0x11/0x50) + Call Trace: + <TASK> + amd_pmu_cpu_starting + ? x86_pmu_dead_cpu + x86_pmu_starting_cpu + cpuhp_invoke_callback + ? x86_pmu_starting_cpu + ? x86_pmu_dead_cpu + cpuhp_issue_call + ? x86_pmu_starting_cpu + __cpuhp_setup_state_cpuslocked + ? x86_pmu_dead_cpu + ? x86_pmu_starting_cpu + __cpuhp_setup_state + ? map_vsyscall + init_hw_perf_events + ? map_vsyscall + do_one_initcall + ? _raw_spin_unlock_irqrestore + ? try_to_wake_up + kernel_init_freeable + ? rest_init + kernel_init + ret_from_fork + +because that CPU hotplug callback gets executed on any AMD CPU - not +only on the BRS-enabled ones. Check the BRS feature bit properly. + +Signed-off-by: Borislav Petkov <bp@suse.de> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Acked-By: Stephane Eranian <eranian@google.com> +Link: https://lkml.kernel.org/r/20220516154838.7044-1-bp@alien8.de +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/brs.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/arch/x86/events/amd/brs.c b/arch/x86/events/amd/brs.c +index 895c82165d85..bee8765a1e9b 100644 +--- a/arch/x86/events/amd/brs.c ++++ b/arch/x86/events/amd/brs.c +@@ -57,7 +57,7 @@ static inline u64 get_debug_extn_cfg(void) + + static bool __init amd_brs_detect(void) + { +- if (!boot_cpu_has(X86_FEATURE_BRS)) ++ if (!cpu_feature_enabled(X86_FEATURE_BRS)) + return false; + + switch (boot_cpu_data.x86) { +@@ -112,6 +112,9 @@ static inline int amd_brs_get_tos(union amd_debug_extn_cfg *cfg) + */ + void amd_brs_reset(void) + { ++ if (!cpu_feature_enabled(X86_FEATURE_BRS)) ++ return; ++ + /* + * Reset config + */ +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0081-perf-x86-amd-core-Fix-reloading-events-for-SVM.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0081-perf-x86-amd-core-Fix-reloading-events-for-SVM.patch new file mode 100644 index 00000000..9e4a3095 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0081-perf-x86-amd-core-Fix-reloading-events-for-SVM.patch @@ -0,0 +1,80 @@ +From 709bf05167d31ee7bea9b07f63ab03e0da45b1f7 Mon Sep 17 00:00:00 2001 +From: Sandipan Das <sandipan.das@amd.com> +Date: Wed, 18 May 2022 14:13:27 +0530 +Subject: [PATCH 81/86] perf/x86/amd/core: Fix reloading events for SVM + +commit bae19fdd7e9e759580ac4693d2df3bc23ab415d7 upstream + +Commit 1018faa6cf23 ("perf/x86/kvm: Fix Host-Only/Guest-Only +counting with SVM disabled") addresses an issue in which the +Host-Only bit in the counter control registers needs to be +masked off when SVM is not enabled. + +The events need to be reloaded whenever SVM is enabled or +disabled for a CPU and this requires the PERF_CTL registers +to be reprogrammed using {enable,disable}_all(). However, +PerfMonV2 variants of these functions do not reprogram the +PERF_CTL registers. Hence, the legacy enable_all() function +should also be called. + +Fixes: 9622e67e3980 ("perf/x86/amd/core: Add PerfMonV2 counter control") +Reported-by: Like Xu <likexu@tencent.com> +Signed-off-by: Sandipan Das <sandipan.das@amd.com> +Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> +Link: https://lkml.kernel.org/r/20220518084327.464005-1-sandipan.das@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/events/amd/core.c | 24 ++++++++++++++++++++---- + 1 file changed, 20 insertions(+), 4 deletions(-) + +diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c +index 3eee59c64daa..9ac3718410ce 100644 +--- a/arch/x86/events/amd/core.c ++++ b/arch/x86/events/amd/core.c +@@ -1472,6 +1472,24 @@ __init int amd_pmu_init(void) + return 0; + } + ++static inline void amd_pmu_reload_virt(void) ++{ ++ if (x86_pmu.version >= 2) { ++ /* ++ * Clear global enable bits, reprogram the PERF_CTL ++ * registers with updated perf_ctr_virt_mask and then ++ * set global enable bits once again ++ */ ++ amd_pmu_v2_disable_all(); ++ amd_pmu_enable_all(0); ++ amd_pmu_v2_enable_all(0); ++ return; ++ } ++ ++ amd_pmu_disable_all(); ++ amd_pmu_enable_all(0); ++} ++ + void amd_pmu_enable_virt(void) + { + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); +@@ -1479,8 +1497,7 @@ void amd_pmu_enable_virt(void) + cpuc->perf_ctr_virt_mask = 0; + + /* Reload all events */ +- amd_pmu_disable_all(); +- x86_pmu_enable_all(0); ++ amd_pmu_reload_virt(); + } + EXPORT_SYMBOL_GPL(amd_pmu_enable_virt); + +@@ -1497,7 +1514,6 @@ void amd_pmu_disable_virt(void) + cpuc->perf_ctr_virt_mask = AMD64_EVENTSEL_HOSTONLY; + + /* Reload all events */ +- amd_pmu_disable_all(); +- x86_pmu_enable_all(0); ++ amd_pmu_reload_virt(); + } + EXPORT_SYMBOL_GPL(amd_pmu_disable_virt); +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0082-x86-cpufeatures-Add-virtual-TSC_AUX-feature-bit.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0082-x86-cpufeatures-Add-virtual-TSC_AUX-feature-bit.patch new file mode 100644 index 00000000..d80a9235 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0082-x86-cpufeatures-Add-virtual-TSC_AUX-feature-bit.patch @@ -0,0 +1,41 @@ +From 8f03d4af74f086a9d8fefb4f51ee34176eda62bc Mon Sep 17 00:00:00 2001 +From: Babu Moger <babu.moger@amd.com> +Date: Tue, 19 Apr 2022 15:53:52 -0500 +Subject: [PATCH 82/86] x86/cpufeatures: Add virtual TSC_AUX feature bit + +commit f30903394eb62316dddea8801b357f5cec4df187 upstream + +The TSC_AUX Virtualization feature allows AMD SEV-ES guests to securely use +TSC_AUX (auxiliary time stamp counter data) MSR in RDTSCP and RDPID +instructions. + +The TSC_AUX MSR is typically initialized to APIC ID or another unique +identifier so that software can quickly associate returned TSC value +with the logical processor. + +Add the feature bit and also include it in the kvm for detection. + +Signed-off-by: Babu Moger <babu.moger@amd.com> +Acked-by: Borislav Petkov <bp@suse.de> +Message-Id: <165040157111.1399644.6123821125319995316.stgit@bmoger-ubuntu> +Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/cpufeatures.h | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h +index 1db6a7bd51d6..ad146c4fe630 100644 +--- a/arch/x86/include/asm/cpufeatures.h ++++ b/arch/x86/include/asm/cpufeatures.h +@@ -409,6 +409,7 @@ + #define X86_FEATURE_SEV (19*32+ 1) /* AMD Secure Encrypted Virtualization */ + #define X86_FEATURE_VM_PAGE_FLUSH (19*32+ 2) /* "" VM Page Flush MSR is supported */ + #define X86_FEATURE_SEV_ES (19*32+ 3) /* AMD Secure Encrypted Virtualization - Encrypted State */ ++#define X86_FEATURE_V_TSC_AUX (19*32+ 9) /* Virtual TSC_AUX */ + #define X86_FEATURE_SME_COHERENT (19*32+10) /* "" AMD hardware-enforced cache coherency */ + + /* +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0083-KVM-SVM-Move-RESET-emulation-to-svm_vcpu_reset.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0083-KVM-SVM-Move-RESET-emulation-to-svm_vcpu_reset.patch new file mode 100644 index 00000000..dd9629df --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0083-KVM-SVM-Move-RESET-emulation-to-svm_vcpu_reset.patch @@ -0,0 +1,123 @@ +From 3f57aba7394c1f7e7b288866eef70e59825df219 Mon Sep 17 00:00:00 2001 +From: Sean Christopherson <seanjc@google.com> +Date: Mon, 20 Sep 2021 17:03:02 -0700 +Subject: [PATCH 83/86] KVM: SVM: Move RESET emulation to svm_vcpu_reset() + +commit 9ebe530b9f5da89f9628923348db767e5d497e7b upstream + +Move RESET emulation for SVM vCPUs to svm_vcpu_reset(), and drop an extra +init_vmcb() from svm_create_vcpu() in the process. Hopefully KVM will +someday expose a dedicated RESET ioctl(), and in the meantime separating +"create" from "RESET" is a nice cleanup. + +Keep the call to svm_switch_vmcb() so that misuse of svm->vmcb at worst +breaks the guest, e.g. premature accesses doesn't cause a NULL pointer +dereference. + +Cc: Reiji Watanabe <reijiw@google.com> +Signed-off-by: Sean Christopherson <seanjc@google.com> +Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> +Message-Id: <20210921000303.400537-10-seanjc@google.com> +Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/kvm/svm/sev.c | 6 +++--- + arch/x86/kvm/svm/svm.c | 29 +++++++++++++++++------------ + arch/x86/kvm/svm/svm.h | 2 +- + 3 files changed, 21 insertions(+), 16 deletions(-) + +diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c +index 86f3096f042f..d02bf4dbb048 100644 +--- a/arch/x86/kvm/svm/sev.c ++++ b/arch/x86/kvm/svm/sev.c +@@ -2665,11 +2665,11 @@ void sev_es_init_vmcb(struct vcpu_svm *svm) + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1); + } + +-void sev_es_create_vcpu(struct vcpu_svm *svm) ++void sev_es_vcpu_reset(struct vcpu_svm *svm) + { + /* +- * Set the GHCB MSR value as per the GHCB specification when creating +- * a vCPU for an SEV-ES guest. ++ * Set the GHCB MSR value as per the GHCB specification when emulating ++ * vCPU RESET for an SEV-ES guest. + */ + set_ghcb_msr(svm, GHCB_MSR_SEV_INFO(GHCB_VERSION_MAX, + GHCB_VERSION_MIN, +diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c +index 2947e3c965e3..2d3c8f766769 100644 +--- a/arch/x86/kvm/svm/svm.c ++++ b/arch/x86/kvm/svm/svm.c +@@ -1312,6 +1312,19 @@ static void init_vmcb(struct kvm_vcpu *vcpu) + + } + ++static void __svm_vcpu_reset(struct kvm_vcpu *vcpu) ++{ ++ struct vcpu_svm *svm = to_svm(vcpu); ++ ++ svm_vcpu_init_msrpm(vcpu, svm->msrpm); ++ ++ svm_init_osvw(vcpu); ++ vcpu->arch.microcode_version = 0x01000065; ++ ++ if (sev_es_guest(vcpu->kvm)) ++ sev_es_vcpu_reset(svm); ++} ++ + static void svm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) + { + struct vcpu_svm *svm = to_svm(vcpu); +@@ -1320,6 +1333,9 @@ static void svm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) + svm->virt_spec_ctrl = 0; + + init_vmcb(vcpu); ++ ++ if (!init_event) ++ __svm_vcpu_reset(vcpu); + } + + void svm_switch_vmcb(struct vcpu_svm *svm, struct kvm_vmcb_info *target_vmcb) +@@ -1379,24 +1395,13 @@ static int svm_create_vcpu(struct kvm_vcpu *vcpu) + + svm->vmcb01.ptr = page_address(vmcb01_page); + svm->vmcb01.pa = __sme_set(page_to_pfn(vmcb01_page) << PAGE_SHIFT); ++ svm_switch_vmcb(svm, &svm->vmcb01); + + if (vmsa_page) + svm->vmsa = page_address(vmsa_page); + + svm->guest_state_loaded = false; + +- svm_switch_vmcb(svm, &svm->vmcb01); +- init_vmcb(vcpu); +- +- svm_vcpu_init_msrpm(vcpu, svm->msrpm); +- +- svm_init_osvw(vcpu); +- vcpu->arch.microcode_version = 0x01000065; +- +- if (sev_es_guest(vcpu->kvm)) +- /* Perform SEV-ES specific VMCB creation updates */ +- sev_es_create_vcpu(svm); +- + return 0; + + error_free_vmsa_page: +diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h +index cf2d8365aeb4..de536e692e02 100644 +--- a/arch/x86/kvm/svm/svm.h ++++ b/arch/x86/kvm/svm/svm.h +@@ -564,7 +564,7 @@ void sev_free_vcpu(struct kvm_vcpu *vcpu); + int sev_handle_vmgexit(struct kvm_vcpu *vcpu); + int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in); + void sev_es_init_vmcb(struct vcpu_svm *svm); +-void sev_es_create_vcpu(struct vcpu_svm *svm); ++void sev_es_vcpu_reset(struct vcpu_svm *svm); + void sev_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector); + void sev_es_prepare_guest_switch(struct vcpu_svm *svm, unsigned int cpu); + void sev_es_unmap_ghcb(struct vcpu_svm *svm); +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0084-KVM-SEV-ES-Use-V_TSC_AUX-if-available-instead-of-RDT.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0084-KVM-SEV-ES-Use-V_TSC_AUX-if-available-instead-of-RDT.patch new file mode 100644 index 00000000..be89b2be --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0084-KVM-SEV-ES-Use-V_TSC_AUX-if-available-instead-of-RDT.patch @@ -0,0 +1,89 @@ +From 9ae45c8437f869ad0067802f47b393ab55df9847 Mon Sep 17 00:00:00 2001 +From: Babu Moger <babu.moger@amd.com> +Date: Tue, 19 Apr 2022 15:54:44 -0500 +Subject: [PATCH 84/86] KVM: SEV-ES: Use V_TSC_AUX if available instead of + RDTSC/MSR_TSC_AUX intercepts + +commit 296d5a17e793956f7b914336422043c939263409 upstream + +The TSC_AUX virtualization feature allows AMD SEV-ES guests to securely use +TSC_AUX (auxiliary time stamp counter data) in the RDTSCP and RDPID +instructions. The TSC_AUX value is set using the WRMSR instruction to the +TSC_AUX MSR (0xC0000103). It is read by the RDMSR, RDTSCP and RDPID +instructions. If the read/write of the TSC_AUX MSR is intercepted, then +RDTSCP and RDPID must also be intercepted when TSC_AUX virtualization +is present. However, the RDPID instruction can't be intercepted. This means +that when TSC_AUX virtualization is present, RDTSCP and TSC_AUX MSR +read/write must not be intercepted for SEV-ES (or SEV-SNP) guests. + +Signed-off-by: Babu Moger <babu.moger@amd.com> +Message-Id: <165040164424.1399644.13833277687385156344.stgit@bmoger-ubuntu> +Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + arch/x86/include/asm/cpufeatures.h | 2 +- + arch/x86/kvm/svm/sev.c | 8 ++++++++ + arch/x86/kvm/svm/svm.c | 1 + + arch/x86/kvm/svm/svm.h | 2 +- + 4 files changed, 11 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h +index ad146c4fe630..f38525a16601 100644 +--- a/arch/x86/include/asm/cpufeatures.h ++++ b/arch/x86/include/asm/cpufeatures.h +@@ -409,7 +409,7 @@ + #define X86_FEATURE_SEV (19*32+ 1) /* AMD Secure Encrypted Virtualization */ + #define X86_FEATURE_VM_PAGE_FLUSH (19*32+ 2) /* "" VM Page Flush MSR is supported */ + #define X86_FEATURE_SEV_ES (19*32+ 3) /* AMD Secure Encrypted Virtualization - Encrypted State */ +-#define X86_FEATURE_V_TSC_AUX (19*32+ 9) /* Virtual TSC_AUX */ ++#define X86_FEATURE_V_TSC_AUX (19*32+ 9) /* "" Virtual TSC_AUX */ + #define X86_FEATURE_SME_COHERENT (19*32+10) /* "" AMD hardware-enforced cache coherency */ + + /* +diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c +index d02bf4dbb048..0371c077b8cd 100644 +--- a/arch/x86/kvm/svm/sev.c ++++ b/arch/x86/kvm/svm/sev.c +@@ -2663,6 +2663,14 @@ void sev_es_init_vmcb(struct vcpu_svm *svm) + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1); + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1); + set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1); ++ ++ if (boot_cpu_has(X86_FEATURE_V_TSC_AUX) && ++ (guest_cpuid_has(&svm->vcpu, X86_FEATURE_RDTSCP) || ++ guest_cpuid_has(&svm->vcpu, X86_FEATURE_RDPID))) { ++ set_msr_interception(vcpu, svm->msrpm, MSR_TSC_AUX, 1, 1); ++ if (guest_cpuid_has(&svm->vcpu, X86_FEATURE_RDTSCP)) ++ svm_clr_intercept(svm, INTERCEPT_RDTSCP); ++ } + } + + void sev_es_vcpu_reset(struct vcpu_svm *svm) +diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c +index 2d3c8f766769..f42f17fb3909 100644 +--- a/arch/x86/kvm/svm/svm.c ++++ b/arch/x86/kvm/svm/svm.c +@@ -112,6 +112,7 @@ static const struct svm_direct_access_msrs { + { .index = MSR_EFER, .always = false }, + { .index = MSR_IA32_CR_PAT, .always = false }, + { .index = MSR_AMD64_SEV_ES_GHCB, .always = true }, ++ { .index = MSR_TSC_AUX, .always = false }, + { .index = MSR_INVALID, .always = false }, + }; + +diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h +index de536e692e02..84b94f03d2f1 100644 +--- a/arch/x86/kvm/svm/svm.h ++++ b/arch/x86/kvm/svm/svm.h +@@ -29,7 +29,7 @@ + #define IOPM_SIZE PAGE_SIZE * 3 + #define MSRPM_SIZE PAGE_SIZE * 2 + +-#define MAX_DIRECT_ACCESS_MSRS 20 ++#define MAX_DIRECT_ACCESS_MSRS 21 + #define MSRPM_OFFSETS 16 + extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly; + extern bool npt_enabled; +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0085-EDAC-amd64-Set-memory-type-per-DIMM.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0085-EDAC-amd64-Set-memory-type-per-DIMM.patch new file mode 100644 index 00000000..b9a06a07 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0085-EDAC-amd64-Set-memory-type-per-DIMM.patch @@ -0,0 +1,134 @@ +From c7e861ca5dcd4a562c863009c032673014836e78 Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Wed, 2 Feb 2022 14:43:06 +0000 +Subject: [PATCH 85/86] EDAC/amd64: Set memory type per DIMM + +commit 75aeaaf23def967853c8d1cfb513a6842dbc232e upstream + +Current AMD systems allow mixing of DIMM types within a system. However, +DIMMs within a channel, i.e. managed by a single Unified Memory +Controller (UMC), must be of the same type. + +Handle this possible configuration by checking and setting the memory +type for each individual "UMC" structure. + +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Reviewed-by: William Roche <william.roche@oracle.com> +Link: https://lore.kernel.org/r/20220202144307.2678405-2-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/edac/amd64_edac.c | 43 ++++++++++++++++++++++++++++----------- + drivers/edac/amd64_edac.h | 10 ++++++++- + 2 files changed, 40 insertions(+), 13 deletions(-) + +diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c +index ff29267e46a6..771b30d8c77f 100644 +--- a/drivers/edac/amd64_edac.c ++++ b/drivers/edac/amd64_edac.c +@@ -1429,7 +1429,7 @@ static void __dump_misc_regs_df(struct amd64_pvt *pvt) + edac_dbg(1, "UMC%d x16 DIMMs present: %s\n", + i, (umc->dimm_cfg & BIT(7)) ? "yes" : "no"); + +- if (pvt->dram_type == MEM_LRDDR4) { ++ if (umc->dram_type == MEM_LRDDR4) { + amd_smn_read(pvt->mc_node_id, umc_base + UMCCH_ADDR_CFG, &tmp); + edac_dbg(1, "UMC%d LRDIMM %dx rank multiply\n", + i, 1 << ((tmp >> 4) & 0x3)); +@@ -1616,19 +1616,36 @@ static void read_dct_base_mask(struct amd64_pvt *pvt) + } + } + +-static void determine_memory_type(struct amd64_pvt *pvt) ++static void determine_memory_type_df(struct amd64_pvt *pvt) + { +- u32 dram_ctrl, dcsm; ++ struct amd64_umc *umc; ++ u32 i; + +- if (pvt->umc) { +- if ((pvt->umc[0].dimm_cfg | pvt->umc[1].dimm_cfg) & BIT(5)) +- pvt->dram_type = MEM_LRDDR4; +- else if ((pvt->umc[0].dimm_cfg | pvt->umc[1].dimm_cfg) & BIT(4)) +- pvt->dram_type = MEM_RDDR4; ++ for_each_umc(i) { ++ umc = &pvt->umc[i]; ++ ++ if (!(umc->sdp_ctrl & UMC_SDP_INIT)) { ++ umc->dram_type = MEM_EMPTY; ++ continue; ++ } ++ ++ if (umc->dimm_cfg & BIT(5)) ++ umc->dram_type = MEM_LRDDR4; ++ else if (umc->dimm_cfg & BIT(4)) ++ umc->dram_type = MEM_RDDR4; + else +- pvt->dram_type = MEM_DDR4; +- return; ++ umc->dram_type = MEM_DDR4; ++ ++ edac_dbg(1, " UMC%d DIMM type: %s\n", i, edac_mem_types[umc->dram_type]); + } ++} ++ ++static void determine_memory_type(struct amd64_pvt *pvt) ++{ ++ u32 dram_ctrl, dcsm; ++ ++ if (pvt->umc) ++ return determine_memory_type_df(pvt); + + switch (pvt->fam) { + case 0xf: +@@ -3442,7 +3459,9 @@ static void read_mc_regs(struct amd64_pvt *pvt) + read_dct_base_mask(pvt); + + determine_memory_type(pvt); +- edac_dbg(1, " DIMM type: %s\n", edac_mem_types[pvt->dram_type]); ++ ++ if (!pvt->umc) ++ edac_dbg(1, " DIMM type: %s\n", edac_mem_types[pvt->dram_type]); + + determine_ecc_sym_sz(pvt); + } +@@ -3538,7 +3557,7 @@ static int init_csrows_df(struct mem_ctl_info *mci) + pvt->mc_node_id, cs); + + dimm->nr_pages = get_csrow_nr_pages(pvt, umc, cs); +- dimm->mtype = pvt->dram_type; ++ dimm->mtype = pvt->umc[umc].dram_type; + dimm->edac_mode = edac_mode; + dimm->dtype = dev_type; + dimm->grain = 64; +diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h +index 650cab401e21..7691a0baacdd 100644 +--- a/drivers/edac/amd64_edac.h ++++ b/drivers/edac/amd64_edac.h +@@ -341,6 +341,9 @@ struct amd64_umc { + u32 sdp_ctrl; /* SDP Control reg */ + u32 ecc_ctrl; /* DRAM ECC Control reg */ + u32 umc_cap_hi; /* Capabilities High reg */ ++ ++ /* cache the dram_type */ ++ enum mem_type dram_type; + }; + + struct amd64_pvt { +@@ -388,7 +391,12 @@ struct amd64_pvt { + /* place to store error injection parameters prior to issue */ + struct error_injection injection; + +- /* cache the dram_type */ ++ /* ++ * cache the dram_type ++ * ++ * NOTE: Don't use this for Family 17h and later. ++ * Use dram_type in struct amd64_umc instead. ++ */ + enum mem_type dram_type; + + struct amd64_umc *umc; /* UMC registers */ +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0086-EDAC-amd64-Add-new-register-offset-support-and-relat.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0086-EDAC-amd64-Add-new-register-offset-support-and-relat.patch new file mode 100644 index 00000000..72db2450 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0086-EDAC-amd64-Add-new-register-offset-support-and-relat.patch @@ -0,0 +1,229 @@ +From 68170266b364b39efd0e6eba8f06b8f9e1255bb4 Mon Sep 17 00:00:00 2001 +From: Yazen Ghannam <yazen.ghannam@amd.com> +Date: Wed, 2 Feb 2022 14:43:07 +0000 +Subject: [PATCH 86/86] EDAC/amd64: Add new register offset support and related + changes + +commit 2151c84ece920dc55942495004a823cbecb921e5 upstream + +Introduce a "family flags" bitmask that can be used to indicate any +special behavior needed on a per-family basis. + +Add a flag to indicate a system uses the new register offsets introduced +with Family 19h Model 10h. + +Use this flag to account for register offset changes, a new bitfield +indicating DDR5 use on a memory controller, and to set the proper number +of chip select masks. + +Rework f17_addr_mask_to_cs_size() to properly handle the change in chip +select masks. And update code comments to reflect the updated Chip +Select, DIMM, and Mask relationships. + +[uninitialized variable warning] +Reported-by: kernel test robot <lkp@intel.com> +Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com> +Signed-off-by: Borislav Petkov <bp@suse.de> +Reviewed-by: William Roche <william.roche@oracle.com> +Link: https://lore.kernel.org/r/20220202144307.2678405-3-yazen.ghannam@amd.com +Signed-off-by: Zhaolong Zhang <zhaolong.zhang@windriver.com> +--- + drivers/edac/amd64_edac.c | 80 +++++++++++++++++++++++++++++++-------- + drivers/edac/amd64_edac.h | 14 +++++++ + 2 files changed, 78 insertions(+), 16 deletions(-) + +diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c +index 771b30d8c77f..009e4fe5df8f 100644 +--- a/drivers/edac/amd64_edac.c ++++ b/drivers/edac/amd64_edac.c +@@ -15,6 +15,21 @@ static struct msr __percpu *msrs; + + static struct amd64_family_type *fam_type; + ++static inline u32 get_umc_reg(u32 reg) ++{ ++ if (!fam_type->flags.zn_regs_v2) ++ return reg; ++ ++ switch (reg) { ++ case UMCCH_ADDR_CFG: return UMCCH_ADDR_CFG_DDR5; ++ case UMCCH_ADDR_MASK_SEC: return UMCCH_ADDR_MASK_SEC_DDR5; ++ case UMCCH_DIMM_CFG: return UMCCH_DIMM_CFG_DDR5; ++ } ++ ++ WARN_ONCE(1, "%s: unknown register 0x%x", __func__, reg); ++ return 0; ++} ++ + /* Per-node stuff */ + static struct ecc_settings **ecc_stngs; + +@@ -1429,8 +1444,10 @@ static void __dump_misc_regs_df(struct amd64_pvt *pvt) + edac_dbg(1, "UMC%d x16 DIMMs present: %s\n", + i, (umc->dimm_cfg & BIT(7)) ? "yes" : "no"); + +- if (umc->dram_type == MEM_LRDDR4) { +- amd_smn_read(pvt->mc_node_id, umc_base + UMCCH_ADDR_CFG, &tmp); ++ if (umc->dram_type == MEM_LRDDR4 || umc->dram_type == MEM_LRDDR5) { ++ amd_smn_read(pvt->mc_node_id, ++ umc_base + get_umc_reg(UMCCH_ADDR_CFG), ++ &tmp); + edac_dbg(1, "UMC%d LRDIMM %dx rank multiply\n", + i, 1 << ((tmp >> 4) & 0x3)); + } +@@ -1505,7 +1522,7 @@ static void prep_chip_selects(struct amd64_pvt *pvt) + + for_each_umc(umc) { + pvt->csels[umc].b_cnt = 4; +- pvt->csels[umc].m_cnt = 2; ++ pvt->csels[umc].m_cnt = fam_type->flags.zn_regs_v2 ? 4 : 2; + } + + } else { +@@ -1545,7 +1562,7 @@ static void read_umc_base_mask(struct amd64_pvt *pvt) + } + + umc_mask_reg = get_umc_base(umc) + UMCCH_ADDR_MASK; +- umc_mask_reg_sec = get_umc_base(umc) + UMCCH_ADDR_MASK_SEC; ++ umc_mask_reg_sec = get_umc_base(umc) + get_umc_reg(UMCCH_ADDR_MASK_SEC); + + for_each_chip_select_mask(cs, umc, pvt) { + mask = &pvt->csels[umc].csmasks[cs]; +@@ -1629,12 +1646,25 @@ static void determine_memory_type_df(struct amd64_pvt *pvt) + continue; + } + +- if (umc->dimm_cfg & BIT(5)) +- umc->dram_type = MEM_LRDDR4; +- else if (umc->dimm_cfg & BIT(4)) +- umc->dram_type = MEM_RDDR4; +- else +- umc->dram_type = MEM_DDR4; ++ /* ++ * Check if the system supports the "DDR Type" field in UMC Config ++ * and has DDR5 DIMMs in use. ++ */ ++ if (fam_type->flags.zn_regs_v2 && ((umc->umc_cfg & GENMASK(2, 0)) == 0x1)) { ++ if (umc->dimm_cfg & BIT(5)) ++ umc->dram_type = MEM_LRDDR5; ++ else if (umc->dimm_cfg & BIT(4)) ++ umc->dram_type = MEM_RDDR5; ++ else ++ umc->dram_type = MEM_DDR5; ++ } else { ++ if (umc->dimm_cfg & BIT(5)) ++ umc->dram_type = MEM_LRDDR4; ++ else if (umc->dimm_cfg & BIT(4)) ++ umc->dram_type = MEM_RDDR4; ++ else ++ umc->dram_type = MEM_DDR4; ++ } + + edac_dbg(1, " UMC%d DIMM type: %s\n", i, edac_mem_types[umc->dram_type]); + } +@@ -2166,6 +2196,7 @@ static int f17_addr_mask_to_cs_size(struct amd64_pvt *pvt, u8 umc, + { + u32 addr_mask_orig, addr_mask_deinterleaved; + u32 msb, weight, num_zero_bits; ++ int cs_mask_nr = csrow_nr; + int dimm, size = 0; + + /* No Chip Selects are enabled. */ +@@ -2181,17 +2212,33 @@ static int f17_addr_mask_to_cs_size(struct amd64_pvt *pvt, u8 umc, + return size; + + /* +- * There is one mask per DIMM, and two Chip Selects per DIMM. +- * CS0 and CS1 -> DIMM0 +- * CS2 and CS3 -> DIMM1 ++ * Family 17h introduced systems with one mask per DIMM, ++ * and two Chip Selects per DIMM. ++ * ++ * CS0 and CS1 -> MASK0 / DIMM0 ++ * CS2 and CS3 -> MASK1 / DIMM1 ++ * ++ * Family 19h Model 10h introduced systems with one mask per Chip Select, ++ * and two Chip Selects per DIMM. ++ * ++ * CS0 -> MASK0 -> DIMM0 ++ * CS1 -> MASK1 -> DIMM0 ++ * CS2 -> MASK2 -> DIMM1 ++ * CS3 -> MASK3 -> DIMM1 ++ * ++ * Keep the mask number equal to the Chip Select number for newer systems, ++ * and shift the mask number for older systems. + */ + dimm = csrow_nr >> 1; + ++ if (!fam_type->flags.zn_regs_v2) ++ cs_mask_nr >>= 1; ++ + /* Asymmetric dual-rank DIMM support. */ + if ((csrow_nr & 1) && (cs_mode & CS_ODD_SECONDARY)) +- addr_mask_orig = pvt->csels[umc].csmasks_sec[dimm]; ++ addr_mask_orig = pvt->csels[umc].csmasks_sec[cs_mask_nr]; + else +- addr_mask_orig = pvt->csels[umc].csmasks[dimm]; ++ addr_mask_orig = pvt->csels[umc].csmasks[cs_mask_nr]; + + /* + * The number of zero bits in the mask is equal to the number of bits +@@ -2947,6 +2994,7 @@ static struct amd64_family_type family_types[] = { + .f0_id = PCI_DEVICE_ID_AMD_19H_M10H_DF_F0, + .f6_id = PCI_DEVICE_ID_AMD_19H_M10H_DF_F6, + .max_mcs = 12, ++ .flags.zn_regs_v2 = 1, + .ops = { + .early_channel_count = f17_early_channel_count, + .dbam_to_cs = f17_addr_mask_to_cs_size, +@@ -3375,7 +3423,7 @@ static void __read_mc_regs_df(struct amd64_pvt *pvt) + umc_base = get_umc_base(i); + umc = &pvt->umc[i]; + +- amd_smn_read(nid, umc_base + UMCCH_DIMM_CFG, &umc->dimm_cfg); ++ amd_smn_read(nid, umc_base + get_umc_reg(UMCCH_DIMM_CFG), &umc->dimm_cfg); + amd_smn_read(nid, umc_base + UMCCH_UMC_CFG, &umc->umc_cfg); + amd_smn_read(nid, umc_base + UMCCH_SDP_CTRL, &umc->sdp_ctrl); + amd_smn_read(nid, umc_base + UMCCH_ECC_CTRL, &umc->ecc_ctrl); +diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h +index 7691a0baacdd..8d7b168f8e64 100644 +--- a/drivers/edac/amd64_edac.h ++++ b/drivers/edac/amd64_edac.h +@@ -271,8 +271,11 @@ + #define UMCCH_BASE_ADDR_SEC 0x10 + #define UMCCH_ADDR_MASK 0x20 + #define UMCCH_ADDR_MASK_SEC 0x28 ++#define UMCCH_ADDR_MASK_SEC_DDR5 0x30 + #define UMCCH_ADDR_CFG 0x30 ++#define UMCCH_ADDR_CFG_DDR5 0x40 + #define UMCCH_DIMM_CFG 0x80 ++#define UMCCH_DIMM_CFG_DDR5 0x90 + #define UMCCH_UMC_CFG 0x100 + #define UMCCH_SDP_CTRL 0x104 + #define UMCCH_ECC_CTRL 0x14C +@@ -485,11 +488,22 @@ struct low_ops { + unsigned cs_mode, int cs_mask_nr); + }; + ++struct amd64_family_flags { ++ /* ++ * Indicates that the system supports the new register offsets, etc. ++ * first introduced with Family 19h Model 10h. ++ */ ++ __u64 zn_regs_v2 : 1, ++ ++ __reserved : 63; ++}; ++ + struct amd64_family_type { + const char *ctl_name; + u16 f0_id, f1_id, f2_id, f6_id; + /* Maximum number of memory controllers per die/node. */ + u8 max_mcs; ++ struct amd64_family_flags flags; + struct low_ops ops; + }; + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0087-NFS-Fix-WARN_ON-due-to-unionization-of-nfs_inode.nre.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0087-NFS-Fix-WARN_ON-due-to-unionization-of-nfs_inode.nre.patch new file mode 100644 index 00000000..5215452c --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0087-NFS-Fix-WARN_ON-due-to-unionization-of-nfs_inode.nre.patch @@ -0,0 +1,47 @@ +From bfc4d7690f61a068e08e91ac0617ce7a5061d143 Mon Sep 17 00:00:00 2001 +From: Dave Wysochanski <dwysocha@redhat.com> +Date: Sun, 10 Oct 2021 18:23:13 -0400 +Subject: [PATCH 87/87] NFS: Fix WARN_ON due to unionization of + nfs_inode.nrequests + +commit 0ebeebcf59601bcfa0284f4bb7abdec051eb856d upstream. + +Fixes the following WARN_ON +WARNING: CPU: 2 PID: 18678 at fs/nfs/inode.c:123 nfs_clear_inode+0x3b/0x50 [nfs] +... +Call Trace: + nfs4_evict_inode+0x57/0x70 [nfsv4] + evict+0xd1/0x180 + dispose_list+0x48/0x60 + evict_inodes+0x156/0x190 + generic_shutdown_super+0x37/0x110 + nfs_kill_super+0x1d/0x40 [nfs] + deactivate_locked_super+0x36/0xa0 + +Signed-off-by: Dave Wysochanski <dwysocha@redhat.com> +Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +[SY: port a68a734b19afc8683238a176c8e088c0f9e6c7b9 from 5.15] +Integrated-by: Siyu Zhang <siyu.zhang@windriver.com> +--- + include/linux/nfs_fs.h | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h +index 71467d661fb6..5ddc30405f7f 100644 +--- a/include/linux/nfs_fs.h ++++ b/include/linux/nfs_fs.h +@@ -593,7 +593,9 @@ bool nfs_commit_end(struct nfs_mds_commit_info *cinfo); + static inline int + nfs_have_writebacks(struct inode *inode) + { +- return atomic_long_read(&NFS_I(inode)->nrequests) != 0; ++ if (S_ISREG(inode->i_mode)) ++ return atomic_long_read(&NFS_I(inode)->nrequests) != 0; ++ return 0; + } + + /* +-- +2.25.1 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0088-net-amd-xgbe-add-missed-tasklet_kill.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0088-net-amd-xgbe-add-missed-tasklet_kill.patch new file mode 100644 index 00000000..a28012de --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/0088-net-amd-xgbe-add-missed-tasklet_kill.patch @@ -0,0 +1,70 @@ +From cdc8a89b4d1f7877bdec1493d9e69b2e7d1dc97f Mon Sep 17 00:00:00 2001 +From: Jiguang Xiao <jiguang.xiao@windriver.com> +Date: Wed, 28 Dec 2022 16:14:47 +0800 +Subject: [PATCH 88/88] net: amd-xgbe: add missed tasklet_kill + +commit d530ece70f16f912e1d1bfeea694246ab78b0a4b netdev. + +The driver does not call tasklet_kill in several places. +Add the calls to fix it. + +Fixes: 85b85c853401 ("amd-xgbe: Re-issue interrupt if interrupt status not cleared") +Signed-off-by: Jiguang Xiao <jiguang.xiao@windriver.com> +Signed-off-by: David S. Miller <davem@davemloft.net> +[SY: port d530ece70f16f912e1d1bfeea694246ab78b0a4b from netdev] +Integrated-by: Siyu Zhang <siyu.zhang@windriver.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 3 +++ + drivers/net/ethernet/amd/xgbe/xgbe-i2c.c | 4 +++- + drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 4 +++- + 3 files changed, 9 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c +index 3ed9ff7fdaff..295da2b30f45 100755 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c +@@ -1049,6 +1049,9 @@ static void xgbe_free_irqs(struct xgbe_prv_data *pdata) + + devm_free_irq(pdata->dev, pdata->dev_irq, pdata); + ++ tasklet_kill(&pdata->tasklet_dev); ++ tasklet_kill(&pdata->tasklet_ecc); ++ + if (pdata->vdata->ecc_support && (pdata->dev_irq != pdata->ecc_irq)) + devm_free_irq(pdata->dev, pdata->ecc_irq, pdata); + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c b/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c +index 22d4fc547a0a..a9ccc4258ee5 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-i2c.c +@@ -447,8 +447,10 @@ static void xgbe_i2c_stop(struct xgbe_prv_data *pdata) + xgbe_i2c_disable(pdata); + xgbe_i2c_clear_all_interrupts(pdata); + +- if (pdata->dev_irq != pdata->i2c_irq) ++ if (pdata->dev_irq != pdata->i2c_irq) { + devm_free_irq(pdata->dev, pdata->i2c_irq, pdata); ++ tasklet_kill(&pdata->tasklet_i2c); ++ } + } + + static int xgbe_i2c_start(struct xgbe_prv_data *pdata) +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +index ac8b61f8c79f..98a4ddf3094c 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +@@ -1469,8 +1469,10 @@ static void xgbe_phy_stop(struct xgbe_prv_data *pdata) + /* Disable auto-negotiation */ + xgbe_an_disable_all(pdata); + +- if (pdata->dev_irq != pdata->an_irq) ++ if (pdata->dev_irq != pdata->an_irq) { + devm_free_irq(pdata->dev, pdata->an_irq, pdata); ++ tasklet_kill(&pdata->tasklet_an); ++ } + + pdata->phy_if.phy_impl.stop(pdata); + +-- +2.25.1 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9002-spi-spidev-Add-dummy-spidev-device-to-SPI-bus.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9002-spi-spidev-Add-dummy-spidev-device-to-SPI-bus.patch new file mode 100644 index 00000000..a97db8f8 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9002-spi-spidev-Add-dummy-spidev-device-to-SPI-bus.patch @@ -0,0 +1,100 @@ +From 25d6f90e43385f021059762115aff8540f47921c Mon Sep 17 00:00:00 2001 +From: Sanjay R Mehta <sanju.mehta@amd.com> +Date: Tue, 3 Mar 2020 14:44:41 +0530 +Subject: [PATCH 02/48] spi: spidev: Add dummy spidev device to SPI bus + +Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com> +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +--- + drivers/spi/spidev.c | 40 +++++++++++++++++++++++++++++++++++++++- + 1 file changed, 39 insertions(+), 1 deletion(-) + +diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c +index 1bd73e322b7b..39f68065ab3d 100644 +--- a/drivers/spi/spidev.c ++++ b/drivers/spi/spidev.c +@@ -27,6 +27,8 @@ + + #include <linux/uaccess.h> + ++#define SPI_BUS 0 ++#define SPI_BUS_CS1 0 + + /* + * This supports access to SPI devices using normal userspace I/O calls. +@@ -46,6 +48,7 @@ + + static DECLARE_BITMAP(minors, N_SPI_MINORS); + ++struct spi_device *spi_device; + + /* Bit masks for spi_device.mode management. Note that incorrect + * settings for some settings can cause *lots* of trouble for other +@@ -755,7 +758,7 @@ static int spidev_probe(struct spi_device *spi) + of_device_is_compatible(spi->dev.of_node, "spidev"), + "%pOF: buggy DT: spidev listed directly in DT\n", spi->dev.of_node); + +- spidev_probe_acpi(spi); ++// spidev_probe_acpi(spi); + + /* Allocate driver data */ + spidev = kzalloc(sizeof(*spidev), GFP_KERNEL); +@@ -842,6 +845,32 @@ static struct spi_driver spidev_spi_driver = { + + /*-------------------------------------------------------------------------*/ + ++static int __init add_spi_device_to_bus(void) ++{ ++ struct spi_master *spi_master; ++ struct spi_board_info spi_info; ++ ++ spi_master = spi_busnum_to_master(SPI_BUS); ++ if (!spi_master) { ++ printk(KERN_ALERT "Please make sure to \'modprobe " ++ "spi_amd\' driver first\n"); ++ return -1; ++ } ++ memset(&spi_info, 0, sizeof(struct spi_board_info)); ++ ++ strlcpy(spi_info.modalias, "spidev", SPI_NAME_SIZE); ++ spi_info.bus_num = SPI_BUS; //Bus number of SPI master ++ spi_info.chip_select = SPI_BUS_CS1; //CS on which SPI device is connected ++ ++ spi_device = spi_new_device(spi_master, &spi_info); ++ if (!spi_device) ++ return -ENODEV; ++ ++ return 0; ++} ++ ++ ++ + static int __init spidev_init(void) + { + int status; +@@ -866,6 +895,14 @@ static int __init spidev_init(void) + class_destroy(spidev_class); + unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name); + } ++ ++ status = add_spi_device_to_bus(); ++ if (status < 0) { ++ spi_unregister_driver(&spidev_spi_driver); ++ class_destroy(spidev_class); ++ unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name); ++ } ++ + return status; + } + module_init(spidev_init); +@@ -873,6 +910,7 @@ module_init(spidev_init); + static void __exit spidev_exit(void) + { + spi_unregister_driver(&spidev_spi_driver); ++ spi_unregister_device(spi_device); + class_destroy(spidev_class); + unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name); + } +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9011-i2c-amd-mp2-avoid-using-pci_intx-if-msi-or-msix-is-s.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9011-i2c-amd-mp2-avoid-using-pci_intx-if-msi-or-msix-is-s.patch new file mode 100644 index 00000000..58105b7f --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9011-i2c-amd-mp2-avoid-using-pci_intx-if-msi-or-msix-is-s.patch @@ -0,0 +1,47 @@ +From 5651b3afc5a9173670907c87e2bc46df9d3f29fb Mon Sep 17 00:00:00 2001 +From: Raju Rangoju <Raju.Rangoju@amd.com> +Date: Tue, 8 Feb 2022 12:39:24 +0530 +Subject: [PATCH 11/48] i2c: amd-mp2: avoid using pci_intx if msi or msix is + supported + +Avoid the usage of pci_intx if the harware supports either msi or msix. + +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: Ic3f616def0a47c427f82adf9d5a3a1286ef035f0 +--- + drivers/i2c/busses/i2c-amd-mp2-pci.c | 14 +++++++++----- + 1 file changed, 9 insertions(+), 5 deletions(-) + +diff --git a/drivers/i2c/busses/i2c-amd-mp2-pci.c b/drivers/i2c/busses/i2c-amd-mp2-pci.c +index ce130a821ea5..a72c24f19853 100644 +--- a/drivers/i2c/busses/i2c-amd-mp2-pci.c ++++ b/drivers/i2c/busses/i2c-amd-mp2-pci.c +@@ -314,14 +314,18 @@ static int amd_mp2_pci_init(struct amd_mp2_dev *privdata, + goto err_dma_mask; + } + +- /* Set up intx irq */ ++ /* Set up MSI-x irq */ + writel(0, privdata->mmio + AMD_P2C_MSG_INTEN); +- pci_intx(pci_dev, 1); +- rc = devm_request_irq(&pci_dev->dev, pci_dev->irq, amd_mp2_irq_isr, +- IRQF_SHARED, dev_name(&pci_dev->dev), privdata); ++ rc = pci_alloc_irq_vectors(pci_dev, 1, 1, PCI_IRQ_MSIX); ++ if (rc < 0) { ++ dev_err(&pci_dev->dev, "Failed to allocate MSI-x interrupts err=%d\n", rc); ++ return rc; ++ } ++ rc = devm_request_irq(&pci_dev->dev, pci_irq_vector(pci_dev, 0), ++ amd_mp2_irq_isr, 0, dev_name(&pci_dev->dev), privdata); + if (rc) + pci_err(pci_dev, "Failure requesting irq %i: %d\n", +- pci_dev->irq, rc); ++ pci_irq_vector(pci_dev, 0), rc); + + return rc; + +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9017-Add-support-to-instantiate-CCGx-UCSI-driver.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9017-Add-support-to-instantiate-CCGx-UCSI-driver.patch new file mode 100644 index 00000000..f4f38d6d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9017-Add-support-to-instantiate-CCGx-UCSI-driver.patch @@ -0,0 +1,53 @@ +From 9b95c3693e24d59e531f15d6abbe7d165f4d887b Mon Sep 17 00:00:00 2001 +From: Sanket Goswami <Sanket.Goswami@amd.com> +Date: Mon, 14 Mar 2022 14:04:18 +0530 +Subject: [PATCH 17/48] Add support to instantiate CCGx UCSI driver + +Add support to instantiate ucsi ccgx driver on some of AMD ASICs +which utilize ACPI method for EC less platform. + +Co-developed-by: Nehal Bakulchandra Shah <Nehal-Bakulchandra.shah@amd.com> +Signed-off-by: Nehal Bakulchandra Shah <Nehal-Bakulchandra.shah@amd.com> +Signed-off-by: Sanket Goswami <Sanket.Goswami@amd.com> +Change-Id: I941eb7ef226e833e29d29e90c2a3d828b91240ec +--- + drivers/usb/typec/ucsi/ucsi_ccg.c | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +diff --git a/drivers/usb/typec/ucsi/ucsi_ccg.c b/drivers/usb/typec/ucsi/ucsi_ccg.c +index 6db7c8ddd51c..4c90f9acd7fb 100644 +--- a/drivers/usb/typec/ucsi/ucsi_ccg.c ++++ b/drivers/usb/typec/ucsi/ucsi_ccg.c +@@ -1367,7 +1367,7 @@ static int ucsi_ccg_probe(struct i2c_client *client, + ucsi_set_drvdata(uc->ucsi, uc); + + status = request_threaded_irq(client->irq, NULL, ccg_irq_handler, +- IRQF_ONESHOT | IRQF_TRIGGER_HIGH, ++ IRQF_ONESHOT | IRQF_TRIGGER_FALLING, + dev_name(dev), uc); + if (status < 0) { + dev_err(uc->dev, "request_threaded_irq failed - %d\n", status); +@@ -1418,6 +1418,12 @@ static const struct i2c_device_id ucsi_ccg_device_id[] = { + }; + MODULE_DEVICE_TABLE(i2c, ucsi_ccg_device_id); + ++static const struct acpi_device_id amd_i2c_ucsi_match[] = { ++ {"AMDI0042", 0}, ++ {} ++}; ++MODULE_DEVICE_TABLE(acpi, amd_i2c_ucsi_match); ++ + static int ucsi_ccg_resume(struct device *dev) + { + struct i2c_client *client = to_i2c_client(dev); +@@ -1459,6 +1465,7 @@ static struct i2c_driver ucsi_ccg_driver = { + .name = "ucsi_ccg", + .pm = &ucsi_ccg_pm, + .dev_groups = ucsi_ccg_groups, ++ .acpi_match_table = amd_i2c_ucsi_match, + }, + .probe = ucsi_ccg_probe, + .remove = ucsi_ccg_remove, +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9023-usb-xhci-Add-LPM-support-to-AMD-xhci-controller.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9023-usb-xhci-Add-LPM-support-to-AMD-xhci-controller.patch new file mode 100644 index 00000000..fac99f01 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9023-usb-xhci-Add-LPM-support-to-AMD-xhci-controller.patch @@ -0,0 +1,32 @@ +From 80b2ff89f7e1871bfa2c8ee6ff15055d844ac699 Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Fri, 24 Jul 2020 15:43:52 +0530 +Subject: [PATCH 23/48] usb: xhci: Add LPM support to AMD xhci controller + +xHCI quirk for LPM and Runtime power management for AMD Raven xHCI + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +--- + drivers/usb/host/xhci-pci.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c +index de9a9ea2cabc..0d91524fe423 100644 +--- a/drivers/usb/host/xhci-pci.c ++++ b/drivers/usb/host/xhci-pci.c +@@ -190,6 +190,12 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) + if (pdev->vendor == PCI_VENDOR_ID_AMD) + xhci->quirks |= XHCI_TRUST_TX_LENGTH; + ++ if (pdev->vendor == PCI_VENDOR_ID_AMD && ++ (pdev->device == 0x15e0 || pdev->device == 0x15e1 || pdev->device == 0x15e5)) { ++ xhci->quirks |= XHCI_LPM_SUPPORT; ++ xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW; ++ } ++ + if ((pdev->vendor == PCI_VENDOR_ID_AMD) && + ((pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_4) || + (pdev->device == PCI_DEVICE_ID_AMD_PROMONTORYA_3) || +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9030-amd-xgbe-fix-for-the-crash-which-happens-during-SFP-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9030-amd-xgbe-fix-for-the-crash-which-happens-during-SFP-.patch new file mode 100644 index 00000000..0771c36e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9030-amd-xgbe-fix-for-the-crash-which-happens-during-SFP-.patch @@ -0,0 +1,77 @@ +From 12a357b858cef54ebff700e35e79b4e3c558e163 Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Thu, 13 Feb 2020 15:26:20 +0530 +Subject: [PATCH 30/48] amd-xgbe: fix for the crash which happens during SFP + hotplug + + INFO: task kworker/u32:3:238 blocked for more than 120 seconds. + Tainted: G E 5.4.2-sfp-fix+ #58 + "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. + kworker/u32:3 D 0 238 2 0x80004000 + Workqueue: enp2s0f1 xgbe_service [amd_xgbe] + Call Trace: + ? __schedule+0x293/0x700 + schedule+0x2f/0xa0 + schedule_preempt_disabled+0xa/0x10 + __mutex_lock.isra.9+0x26d/0x4e0 + ? xgbe_phy_get_comm_ownership+0x1f/0x110 [amd_xgbe] + xgbe_phy_get_comm_ownership+0x1f/0x110 [amd_xgbe] + xgbe_phy_mii_read+0x28/0xb0 [amd_xgbe] + ? kernfs_put+0xe9/0x190 + __mdiobus_read+0x3b/0xd0 + __phy_modify_changed+0x2b/0x80 + phy_modify+0x38/0x60 + phy_suspend+0x84/0xc0 + phy_detach+0x5e/0x120 + xgbe_phy_free_phy_device.isra.22+0x1d/0x50 [amd_xgbe] + xgbe_phy_sfp_mod_absent.isra.25+0xe/0x50 [amd_xgbe] + xgbe_phy_sfp_detect+0x16a/0x9b0 [amd_xgbe] + ? xgbe_phy_link_status+0x10a/0x490 [amd_xgbe] + xgbe_phy_link_status+0x10a/0x490 [amd_xgbe] + xgbe_phy_status+0x57/0x380 [amd_xgbe] + process_one_work+0x1f4/0x3e0 + worker_thread+0x2d/0x3e0 + ? process_one_work+0x3e0/0x3e0 + kthread+0x113/0x130 + ? kthread_park+0x90/0x90 + ret_from_fork+0x22/0x40 + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 2156600641b6..765479904723 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -1283,7 +1283,7 @@ static int xgbe_phy_sfp_read_eeprom(struct xgbe_prv_data *pdata) + + memcpy(&phy_data->sfp_eeprom, &sfp_eeprom, sizeof(sfp_eeprom)); + +- xgbe_phy_free_phy_device(pdata); ++ + } else { + phy_data->sfp_changed = 0; + } +@@ -1320,7 +1320,6 @@ static void xgbe_phy_sfp_mod_absent(struct xgbe_prv_data *pdata) + { + struct xgbe_phy_data *phy_data = pdata->phy_data; + +- xgbe_phy_free_phy_device(pdata); + + phy_data->sfp_mod_absent = 1; + phy_data->sfp_phy_avail = 0; +@@ -1372,6 +1371,9 @@ static void xgbe_phy_sfp_detect(struct xgbe_prv_data *pdata) + xgbe_phy_sfp_phy_settings(pdata); + + xgbe_phy_put_comm_ownership(pdata); ++ ++ if((phy_data->sfp_mod_absent) || (phy_data->sfp_changed)) ++ xgbe_phy_free_phy_device(pdata); + } + + static int xgbe_phy_module_eeprom(struct xgbe_prv_data *pdata, +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9031-amd-xgbe-Fix-NETDEV-WATCHDOG-transmit-queue-timed-ou.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9031-amd-xgbe-Fix-NETDEV-WATCHDOG-transmit-queue-timed-ou.patch new file mode 100644 index 00000000..b86d7c98 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9031-amd-xgbe-Fix-NETDEV-WATCHDOG-transmit-queue-timed-ou.patch @@ -0,0 +1,32 @@ +From 9f24f5cbcddd15fc511ebdf5ff2900de1418689c Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Sun, 12 Apr 2020 20:49:35 +0530 +Subject: [PATCH 31/48] amd-xgbe: Fix NETDEV WATCHDOG: transmit queue timed out + +netif_carrier_off() called immediately after netif_tx_stop_all_queues() + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 3 +++ + 1 file changed, 3 insertions(+) + mode change 100644 => 100755 drivers/net/ethernet/amd/xgbe/xgbe-drv.c + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c +old mode 100644 +new mode 100755 +index e6883d52d230..caea72cddb89 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c +@@ -1182,6 +1182,9 @@ int xgbe_powerdown(struct net_device *netdev, unsigned int caller) + netif_device_detach(netdev); + + netif_tx_stop_all_queues(netdev); ++ /* Bug fix to crash while resetting the port */ ++ netif_carrier_off(pdata->netdev); ++ netif_dbg(pdata, link, pdata->netdev," netif_carrier_off is doing before stopping PHY \n"); + + xgbe_stop_timers(pdata); + flush_workqueue(pdata->dev_workqueue); +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9032-amd-xgbe-Fix-for-Network-fluctuations.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9032-amd-xgbe-Fix-for-Network-fluctuations.patch new file mode 100644 index 00000000..29cf5359 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9032-amd-xgbe-Fix-for-Network-fluctuations.patch @@ -0,0 +1,39 @@ +From 633ce3fa477524c794828faca56e786d6c2e1da4 Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Tue, 12 Jan 2021 15:11:03 +0530 +Subject: [PATCH 32/48] amd-xgbe: Fix for Network fluctuations + +BEL SFP, when connected to amd-xgbe shows frequent link down and up events on dmesg. +Refer ticket EMBDEV-8951. This fix avoids the frquent link up/down issue. + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 765479904723..371b4c91e289 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -1049,6 +1049,18 @@ static int xgbe_phy_find_phy_device(struct xgbe_prv_data *pdata) + } + phy_data->phydev = phydev; + ++ switch (phy_data->port_mode) { ++ case XGBE_PORT_MODE_SFP: ++ /* reset the sfp phy EMBDEV-8951 */ ++ if(phydev) ++ genphy_soft_reset(phydev); ++ else ++ netdev_err(pdata->netdev, "phy reset failed\n"); ++ break; ++ default: ++ break; ++ } ++ + xgbe_phy_external_phy_quirks(pdata); + + linkmode_and(phydev->advertising, phydev->advertising, +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9033-amd-xgbe-sets-XGBE_LINK_INIT-when-there-is-a-link-fa.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9033-amd-xgbe-sets-XGBE_LINK_INIT-when-there-is-a-link-fa.patch new file mode 100644 index 00000000..d1b1f6d3 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9033-amd-xgbe-sets-XGBE_LINK_INIT-when-there-is-a-link-fa.patch @@ -0,0 +1,39 @@ +From cd0c915d0e28e2ecfe756db9f984941fe3843b01 Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Fri, 23 Oct 2020 01:45:15 +0530 +Subject: [PATCH 33/48] amd-xgbe: sets XGBE_LINK_INIT when there is a link + failure + +When "link down" happens due to a link partner, the xgbe driver +will not set XGBE_LINK_INIT. This is observed when the port speed +capability is set to 10G in backplane mode. + +This fix sets XGBE_LINK_INIT when there is a link failure and +XGBE_LINK_INIT is not set. This helps the driver to restart AN +when AN link timeout happens. + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +index 4e97b4869522..91397cf3c5ab 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +@@ -1371,6 +1371,12 @@ static void xgbe_phy_status(struct xgbe_prv_data *pdata) + xgbe_phy_status_result(pdata); + + netif_carrier_off(pdata->netdev); ++ ++ if (link_aneg && ((pdata->phy_if.phy_impl.cur_mode(pdata) == XGBE_MODE_KR) || ++ (pdata->phy_if.phy_impl.cur_mode(pdata) == XGBE_MODE_KX_1000))) { ++ if (!test_bit(XGBE_LINK_INIT, &pdata->dev_state)) ++ set_bit(XGBE_LINK_INIT, &pdata->dev_state); ++ } + } + + adjust_link: +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9034-amd-xgbe-rrc-is-required-only-for-Fixed-PHY-configur.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9034-amd-xgbe-rrc-is-required-only-for-Fixed-PHY-configur.patch new file mode 100644 index 00000000..1d37cada --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9034-amd-xgbe-rrc-is-required-only-for-Fixed-PHY-configur.patch @@ -0,0 +1,33 @@ +From babc121e36ec93ceb4c09a0157c75deaab98691a Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Tue, 10 Nov 2020 12:42:28 +0530 +Subject: [PATCH 34/48] amd-xgbe: rrc is required only for Fixed PHY + configuration + +xgbe driver does RRC in every 10 seconds if the link is down. +When AN is enabled and KR training is in progress, +doing RRC cause KR training failure. The patch enables RRC only +if AN is disabled. + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 371b4c91e289..73f8bf084021 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -2656,7 +2656,8 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) + /* No link, attempt a receiver reset cycle */ + if (phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) { + phy_data->rrc_count = 0; +- xgbe_phy_rrc(pdata); ++ if (pdata->phy.autoneg == AUTONEG_DISABLE) ++ xgbe_phy_rrc(pdata); + } + + return 0; +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9035-amd-xgbe-increased-cdr-delay.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9035-amd-xgbe-increased-cdr-delay.patch new file mode 100644 index 00000000..a2afddf5 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9035-amd-xgbe-increased-cdr-delay.patch @@ -0,0 +1,35 @@ +From da381975174f163cfd97ef12169732d9d96df8e9 Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Wed, 11 Nov 2020 12:13:33 +0530 +Subject: [PATCH 35/48] amd-xgbe: increased cdr delay + +amd-xgbe driver needs delay to emable CDR. +Some link partner's use 20ms of idle time before sending valid clock. +The patch uses a delay of 22ms for the first time and increases +by a step of 22ms. + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 73f8bf084021..a6b90470e059 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -149,9 +149,9 @@ + #define XGBE_RATECHANGE_COUNT 500 + + /* CDR delay values for KR support (in usec) */ +-#define XGBE_CDR_DELAY_INIT 10000 +-#define XGBE_CDR_DELAY_INC 10000 +-#define XGBE_CDR_DELAY_MAX 100000 ++#define XGBE_CDR_DELAY_INIT 22000 ++#define XGBE_CDR_DELAY_INC 22000 ++#define XGBE_CDR_DELAY_MAX 110000 + + /* RRC frequency during link status check */ + #define XGBE_RRC_FREQUENCY 10 +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9036-amd-xgbe-enable-PLL_CTRL-feature-for-fixed-PHY-only.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9036-amd-xgbe-enable-PLL_CTRL-feature-for-fixed-PHY-only.patch new file mode 100644 index 00000000..b37e42a0 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9036-amd-xgbe-enable-PLL_CTRL-feature-for-fixed-PHY-only.patch @@ -0,0 +1,59 @@ +From e38922d3b699ba788f52163dc6c580596728016a Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Fri, 25 Mar 2022 12:52:42 +0530 +Subject: [PATCH 36/48] amd-xgbe: enable PLL_CTRL feature for fixed PHY only + +PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only. + +Also, PLL re-initialization is not needed for phy_poweroff (0,0) +command. + +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: I9ed2e749b654f392741e24be69d5c01e7eb3d6ae +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 20 ++++++++++++-------- + 1 file changed, 12 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index a6b90470e059..6a3a5a305c92 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -1993,13 +1993,16 @@ static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata) + + static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable) + { +- XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0, +- XGBE_PMA_PLL_CTRL_MASK, +- enable ? XGBE_PMA_PLL_CTRL_ENABLE +- : XGBE_PMA_PLL_CTRL_DISABLE); ++ /* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */ ++ if (pdata->phy.autoneg == AUTONEG_DISABLE) { ++ XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0, ++ XGBE_PMA_PLL_CTRL_MASK, ++ enable ? XGBE_PMA_PLL_CTRL_ENABLE ++ : XGBE_PMA_PLL_CTRL_DISABLE); + +- /* Wait for command to complete */ +- usleep_range(100, 200); ++ /* Wait for command to complete */ ++ usleep_range(100, 200); ++ } + } + + static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, +@@ -2043,8 +2046,9 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, + xgbe_phy_rx_reset(pdata); + + reenable_pll: +- /* Enable PLL re-initialization */ +- xgbe_phy_pll_ctrl(pdata, true); ++ /* Enable PLL re-initialization, not needed for phy_poweroff (0,0) */ ++ if (cmd != 0) ++ xgbe_phy_pll_ctrl(pdata, true); + } + + static void xgbe_phy_rrc(struct xgbe_prv_data *pdata) +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9037-amd-xgbe-10KR-Modeset-every-AN-link-time-out.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9037-amd-xgbe-10KR-Modeset-every-AN-link-time-out.patch new file mode 100644 index 00000000..aabfd414 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9037-amd-xgbe-10KR-Modeset-every-AN-link-time-out.patch @@ -0,0 +1,48 @@ +From e767bca2ca8be4d75befc244641b20e1dbf33776 Mon Sep 17 00:00:00 2001 +From: Satheesh Kumar <satheesh.kumar@amd.com> +Date: Wed, 30 Mar 2022 12:48:15 +0530 +Subject: [PATCH 37/48] amd-xgbe: 10KR Modeset every AN link time out + +Start AN with KR training auto start + +Signed-off-by: Satheesh Kumar <satheesh.kumar@amd.com> +Change-Id: I31eaa0ed95b1347d83de41844cf1268ad9c0b128 +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +index 91397cf3c5ab..1d165d885e3f 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +@@ -402,6 +402,14 @@ static void xgbe_an73_set(struct xgbe_prv_data *pdata, bool enable, + reg |= MDIO_AN_CTRL1_RESTART; + + XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_CTRL1, reg); ++ ++ if(xgbe_cur_mode(pdata) == XGBE_MODE_KR) { ++ /* step-4 Start AN with KR training auto start */ ++ XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, ++ MDIO_PMA_10GBR_PMD_CTRL, ++ (XGBE_KR_TRAINING_ENABLE | XGBE_KR_TRAINING_START), ++ (XGBE_KR_TRAINING_ENABLE | XGBE_KR_TRAINING_START)); ++ } + } + + static void xgbe_an73_restart(struct xgbe_prv_data *pdata) +@@ -1206,6 +1214,11 @@ static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata, bool set_mode) + /* Disable auto-negotiation interrupt */ + disable_irq(pdata->an_irq); + ++ if(xgbe_cur_mode(pdata) == XGBE_MODE_KR) { ++ xgbe_change_mode(pdata, XGBE_MODE_KR); ++ netif_dbg(pdata, link, pdata->netdev, "AN force modeset 10GKR \n"); ++ } ++ + if (set_mode) { + /* Start auto-negotiation in a supported mode */ + if (xgbe_use_mode(pdata, XGBE_MODE_KR)) { +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9038-amd-xgbe-PLL-enabled-for-10G-Base-T.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9038-amd-xgbe-PLL-enabled-for-10G-Base-T.patch new file mode 100644 index 00000000..6439f0e7 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9038-amd-xgbe-PLL-enabled-for-10G-Base-T.patch @@ -0,0 +1,44 @@ +From 8f7dd897c17a64ab32cb9921ab9aead3e8c6b617 Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Thu, 31 Mar 2022 22:34:14 +0530 +Subject: [PATCH 38/48] amd-xgbe: PLL enabled for 10G-Base-T + +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: Ic2445973a0ed9ebb545dda6d7e67bb02f3e3d23f +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 6a3a5a305c92..df7d326616fb 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -1993,16 +1993,20 @@ static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata) + + static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable) + { ++ ++ struct xgbe_phy_data *phy_data = pdata->phy_data; ++ + /* PLL_CTRL feature needs to be enabled for fixed PHY modes (Non-Autoneg) only */ +- if (pdata->phy.autoneg == AUTONEG_DISABLE) { ++ if (pdata->phy.autoneg == AUTONEG_DISABLE || ++ phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T) { + XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0, +- XGBE_PMA_PLL_CTRL_MASK, +- enable ? XGBE_PMA_PLL_CTRL_ENABLE ++ XGBE_PMA_PLL_CTRL_MASK, ++ enable ? XGBE_PMA_PLL_CTRL_ENABLE + : XGBE_PMA_PLL_CTRL_DISABLE); + + /* Wait for command to complete */ + usleep_range(100, 200); +- } ++ } + } + + static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9039-amd-xgbe-need-to-check-KR-training-before-restart-CL.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9039-amd-xgbe-need-to-check-KR-training-before-restart-CL.patch new file mode 100644 index 00000000..71892dc4 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9039-amd-xgbe-need-to-check-KR-training-before-restart-CL.patch @@ -0,0 +1,35 @@ +From c786ba044ac22edc5d8a5446a0d2de5cbf1232bf Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Tue, 12 Apr 2022 23:49:16 +0530 +Subject: [PATCH 39/48] amd-xgbe: need to check KR training before restart CL72 + +Fixes : https://ontrack-internal.amd.com/browse/EMBDEV-13961 + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: Ieb300a5c9191625223858d60fa88922565370828 +--- + drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +index 1d165d885e3f..c370a8027ce3 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +@@ -1357,7 +1357,12 @@ static void xgbe_phy_status(struct xgbe_prv_data *pdata) + pdata->phy.link = pdata->phy_if.phy_impl.link_status(pdata, + &an_restart); + if (an_restart) { +- xgbe_phy_config_aneg(pdata); ++ if(xgbe_cur_mode(pdata) == XGBE_MODE_KR) { ++ pdata->an_result = XGBE_AN_READY; ++ xgbe_check_link_timeout(pdata); ++ } else { ++ xgbe_phy_config_aneg(pdata); ++ } + goto adjust_link; + } + +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9040-amd-xgbe-10G-RJ45-support-on-Fox-platform.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9040-amd-xgbe-10G-RJ45-support-on-Fox-platform.patch new file mode 100644 index 00000000..6832c8a7 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9040-amd-xgbe-10G-RJ45-support-on-Fox-platform.patch @@ -0,0 +1,80 @@ +From 2ff6dbdea17875299b17860ca24d962ac2381078 Mon Sep 17 00:00:00 2001 +From: Raju Rangoju <Raju.Rangoju@amd.com> +Date: Wed, 9 Mar 2022 18:31:55 +0530 +Subject: [PATCH 40/48] amd-xgbe: 10G RJ45 support on Fox platform + +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: Ibe5beafb5dbdd2a2fc822bc3b610f82fc4c9157d +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 18 ++++++++++++++++-- + 1 file changed, 16 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index df7d326616fb..1a56a52e0079 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -1817,6 +1817,11 @@ static void xgbe_phy_an_advertising(struct xgbe_prv_data *pdata, + if (phy_data->phydev && + (phy_data->phydev->speed == SPEED_10000)) + XGBE_SET_ADV(dlks, 10000baseKR_Full); ++ else if (phy_data->phydev && ++ (phy_data->phydev->speed == SPEED_2500)) { ++ netif_dbg(pdata, link, pdata->netdev, "advertising 2.5G speed\n"); ++ XGBE_SET_ADV(dlks, 2500baseX_Full); ++ } + else + XGBE_SET_ADV(dlks, 1000baseKX_Full); + break; +@@ -2200,6 +2205,7 @@ static enum xgbe_mode xgbe_phy_switch_baset_mode(struct xgbe_prv_data *pdata) + switch (xgbe_phy_cur_mode(pdata)) { + case XGBE_MODE_SGMII_100: + case XGBE_MODE_SGMII_1000: ++ case XGBE_MODE_KX_2500: + return XGBE_MODE_KR; + case XGBE_MODE_KR: + default: +@@ -2541,7 +2547,8 @@ static bool xgbe_phy_valid_speed_baset_mode(struct xgbe_phy_data *phy_data, + case SPEED_1000: + return true; + case SPEED_2500: +- return (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T); ++ return ((phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T) || ++ (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T)); + case SPEED_10000: + return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T); + default: +@@ -2906,6 +2913,7 @@ static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata) + case XGBE_PORT_MODE_10GBASE_T: + if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || ++ (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) || + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) + return false; + break; +@@ -3331,7 +3339,8 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + + /* 10GBase-T support */ + case XGBE_PORT_MODE_10GBASE_T: +- XGBE_SET_SUP(lks, Autoneg); ++ //XGBE_SET_SUP(lks, Autoneg); ++ dev_dbg(pdata->dev, "port mode: 10GBase-T\n"); + XGBE_SET_SUP(lks, Pause); + XGBE_SET_SUP(lks, Asym_Pause); + XGBE_SET_SUP(lks, TP); +@@ -3343,6 +3352,11 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + XGBE_SET_SUP(lks, 1000baseT_Full); + phy_data->start_mode = XGBE_MODE_SGMII_1000; + } ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) { ++ dev_dbg(pdata->dev, "setting 2.5G support\n"); ++ XGBE_SET_SUP(lks, 2500baseT_Full); ++ phy_data->start_mode = XGBE_MODE_KX_2500; ++ } + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { + XGBE_SET_SUP(lks, 10000baseT_Full); + phy_data->start_mode = XGBE_MODE_KR; +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9041-amd-xgbe-10G-RJ45-support-on-Fox-platform-with-AN-su.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9041-amd-xgbe-10G-RJ45-support-on-Fox-platform-with-AN-su.patch new file mode 100644 index 00000000..22a74950 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9041-amd-xgbe-10G-RJ45-support-on-Fox-platform-with-AN-su.patch @@ -0,0 +1,248 @@ +From 1fb36bba84ceada142324306c29ff5e158f257cb Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Mon, 25 Apr 2022 12:40:58 +0530 +Subject: [PATCH 41/48] amd-xgbe: 10G RJ45 support on Fox platform with AN + support using MDIO + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: If19412f51805064b14d9cfd71d9fbeb8ea365bb0 +--- + drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 10 ++ + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 110 ++++++++++++++++++-- + drivers/net/ethernet/amd/xgbe/xgbe.h | 1 + + 3 files changed, 114 insertions(+), 7 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +index c370a8027ce3..bc8172c19082 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +@@ -1282,6 +1282,12 @@ static int xgbe_phy_reconfig_aneg(struct xgbe_prv_data *pdata) + + static bool xgbe_phy_aneg_done(struct xgbe_prv_data *pdata) + { ++ if (pdata->an_mode == XGBE_AN_MODE_MDIO) { ++ if(pdata->phy.link) ++ pdata->an_result = XGBE_AN_COMPLETE; ++ else ++ pdata->an_result = XGBE_AN_NO_LINK; ++ } + return (pdata->an_result == XGBE_AN_COMPLETE); + } + +@@ -1313,6 +1319,8 @@ static void xgbe_phy_status_result(struct xgbe_prv_data *pdata) + else + mode = xgbe_phy_status_aneg(pdata); + ++ if(pdata->an_mode != XGBE_AN_MODE_MDIO) { ++ + switch (mode) { + case XGBE_MODE_SGMII_100: + pdata->phy.speed = SPEED_100; +@@ -1334,6 +1342,8 @@ static void xgbe_phy_status_result(struct xgbe_prv_data *pdata) + pdata->phy.speed = SPEED_UNKNOWN; + } + ++ ++ } + pdata->phy.duplex = DUPLEX_FULL; + + if (xgbe_set_mode(pdata, mode) && pdata->an_again) +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 1a56a52e0079..8b464b268165 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -380,6 +380,7 @@ struct xgbe_phy_data { + /* KR AN support */ + unsigned int phy_cdr_notrack; + unsigned int phy_cdr_delay; ++ unsigned int mdio_an_mode; + }; + + /* I2C, MDIO and GPIO lines are muxed, so only one device at a time */ +@@ -1764,6 +1765,82 @@ static enum xgbe_mode xgbe_phy_an73_outcome(struct xgbe_prv_data *pdata) + return mode; + } + ++static enum xgbe_mode xgbe_phy_mdio_an_outcome(struct xgbe_prv_data *pdata) ++{ ++ struct ethtool_link_ksettings *lks = &pdata->phy.lks; ++ enum xgbe_mode mode = XGBE_MODE_UNKNOWN; ++ unsigned int ad_reg, lp_reg; ++ struct xgbe_phy_data *phy_data = pdata->phy_data; ++ if(phy_data->phydev) { ++ ++ /* Compare Advertisement and Link Partner register 1 */ ++ ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE); ++ lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA); ++ if (lp_reg & 0x400) ++ XGBE_SET_LP_ADV(lks, Pause); ++ if (lp_reg & 0x800) ++ XGBE_SET_LP_ADV(lks, Asym_Pause); ++ ++ if (pdata->phy.pause_autoneg) { ++ /* Set flow control based on auto-negotiation result */ ++ pdata->phy.tx_pause = 0; ++ pdata->phy.rx_pause = 0; ++ ++ if (ad_reg & lp_reg & 0x400) { ++ pdata->phy.tx_pause = 1; ++ pdata->phy.rx_pause = 1; ++ } else if (ad_reg & lp_reg & 0x800) { ++ if (ad_reg & 0x400) ++ pdata->phy.rx_pause = 1; ++ else if (lp_reg & 0x400) ++ pdata->phy.tx_pause = 1; ++ } ++ } ++ ++ switch (phy_data->phydev->interface) { ++ case PHY_INTERFACE_MODE_10GKR: ++ if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) && (phy_data->phydev->speed == SPEED_10000)) ++ mode = XGBE_MODE_KR; ++ if(phy_data->phydev->speed == SPEED_100) { ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ++ mode = XGBE_MODE_SGMII_100; ++ } else if (phy_data->phydev->speed == SPEED_1000){ ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ++ mode = XGBE_MODE_SGMII_1000; ++ } else if (phy_data->phydev->speed == SPEED_1000) { ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) ++ mode =XGBE_MODE_KX_2500; ++ } ++ break; ++ case PHY_INTERFACE_MODE_10GBASER: ++ mode = XGBE_MODE_KR; ++ break; ++ case PHY_INTERFACE_MODE_SGMII: ++ if(phy_data->phydev->speed == SPEED_100) { ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ++ mode = XGBE_MODE_SGMII_100; ++ } else if (phy_data->phydev->speed == SPEED_1000){ ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ++ mode = XGBE_MODE_SGMII_1000; ++ } else if (phy_data->phydev->speed == SPEED_1000) { ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) ++ mode = XGBE_MODE_KX_2500; ++ } ++ break; ++ case PHY_INTERFACE_MODE_2500BASEX: ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) ++ mode = XGBE_MODE_KX_2500; ++ break; ++ default: ++ mode = XGBE_MODE_KR; ++ break; ++ } ++ } ++ pdata->phy.speed = phy_data->phydev->speed; ++ return mode; ++} ++ ++ + static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata) + { + switch (pdata->an_mode) { +@@ -1775,6 +1852,8 @@ static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata) + return xgbe_phy_an37_outcome(pdata); + case XGBE_AN_MODE_CL37_SGMII: + return xgbe_phy_an37_sgmii_outcome(pdata); ++ case XGBE_AN_MODE_MDIO: ++ return xgbe_phy_mdio_an_outcome(pdata); + default: + return XGBE_MODE_UNKNOWN; + } +@@ -1910,7 +1989,10 @@ static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata) + case XGBE_PORT_MODE_NBASE_T: + return XGBE_AN_MODE_CL37_SGMII; + case XGBE_PORT_MODE_10GBASE_T: +- return XGBE_AN_MODE_CL73; ++ if(phy_data->mdio_an_mode) ++ return XGBE_AN_MODE_MDIO; ++ else ++ return XGBE_AN_MODE_CL73; + case XGBE_PORT_MODE_10GBASE_R: + return XGBE_AN_MODE_NONE; + case XGBE_PORT_MODE_SFP: +@@ -2201,7 +2283,8 @@ static enum xgbe_mode xgbe_phy_switch_baset_mode(struct xgbe_prv_data *pdata) + /* No switching if not 10GBase-T */ + if (phy_data->port_mode != XGBE_PORT_MODE_10GBASE_T) + return xgbe_phy_cur_mode(pdata); +- ++ else if (phy_data->mdio_an_mode) ++ return XGBE_MODE_KR; + switch (xgbe_phy_cur_mode(pdata)) { + case XGBE_MODE_SGMII_100: + case XGBE_MODE_SGMII_1000: +@@ -2544,16 +2627,26 @@ static bool xgbe_phy_valid_speed_baset_mode(struct xgbe_phy_data *phy_data, + { + switch (speed) { + case SPEED_100: ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ++ return true; ++ break; + case SPEED_1000: +- return true; ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ++ return true; ++ break; + case SPEED_2500: +- return ((phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T) || +- (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T)); ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) ++ return ((phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T) || ++ (phy_data->port_mode == XGBE_PORT_MODE_NBASE_T)); ++ break; + case SPEED_10000: +- return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T); ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) ++ return (phy_data->port_mode == XGBE_PORT_MODE_10GBASE_T); ++ break; + default: + return false; + } ++ return false; + } + + static bool xgbe_phy_valid_speed_sfp_mode(struct xgbe_phy_data *phy_data, +@@ -2650,6 +2743,8 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) + + if (!phy_data->phydev->link) + return 0; ++ if (pdata->an_mode == XGBE_AN_MODE_MDIO) ++ return 1; + } + + /* Link status is latched low, so read once to clear +@@ -3339,7 +3434,7 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + + /* 10GBase-T support */ + case XGBE_PORT_MODE_10GBASE_T: +- //XGBE_SET_SUP(lks, Autoneg); ++ XGBE_SET_SUP(lks, Autoneg); + dev_dbg(pdata->dev, "port mode: 10GBase-T\n"); + XGBE_SET_SUP(lks, Pause); + XGBE_SET_SUP(lks, Asym_Pause); +@@ -3363,6 +3458,7 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + } + + phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; ++ phy_data->mdio_an_mode = 1; + break; + + /* 10GBase-R support */ +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h +index 3305979a9f7c..bd883f00fad0 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe.h +@@ -569,6 +569,7 @@ enum xgbe_an_mode { + XGBE_AN_MODE_CL73_REDRV, + XGBE_AN_MODE_CL37, + XGBE_AN_MODE_CL37_SGMII, ++ XGBE_AN_MODE_MDIO, + XGBE_AN_MODE_NONE, + }; + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9042-amd-xgbe-Yellow-carp-devices-do-not-need-rrc.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9042-amd-xgbe-Yellow-carp-devices-do-not-need-rrc.patch new file mode 100644 index 00000000..90de12eb --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9042-amd-xgbe-Yellow-carp-devices-do-not-need-rrc.patch @@ -0,0 +1,75 @@ +From 9a28244a1ecbd15cf4c30288589c6413bbfc6753 Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Tue, 26 Apr 2022 21:43:58 +0530 +Subject: [PATCH 42/48] amd-xgbe: Yellow carp devices do not need rrc + +Yellow carp devices do not need receiver reset cycle. Hence, avoid +issuing rrc on Yellow carp platforms. + +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: Ie5047e3dd9fa85e8b7b37fbdddf948602475b3d6 +--- + drivers/net/ethernet/amd/xgbe/xgbe-pci.c | 6 ++++++ + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 2 +- + drivers/net/ethernet/amd/xgbe/xgbe.h | 1 + + 3 files changed, 8 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +index 2af3da4b2d05..4da4924e7254 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +@@ -285,6 +285,10 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + + /* Yellow Carp devices do not need cdr workaround */ + pdata->vdata->an_cdr_workaround = 0; ++ ++ /* Yellow Carp devices do not need rrc */ ++ pdata->vdata->enable_rrc = 0; ++ dev_dbg(dev, "Disabling the RRC on Yellow carp devices\n"); + } else { + pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF; + pdata->xpcs_window_sel_reg = PCS_V2_WINDOW_SELECT; +@@ -483,6 +487,7 @@ static struct xgbe_version_data xgbe_v2a = { + .tx_desc_prefetch = 5, + .rx_desc_prefetch = 5, + .an_cdr_workaround = 1, ++ .enable_rrc = 1, + }; + + static struct xgbe_version_data xgbe_v2b = { +@@ -498,6 +503,7 @@ static struct xgbe_version_data xgbe_v2b = { + .tx_desc_prefetch = 5, + .rx_desc_prefetch = 5, + .an_cdr_workaround = 1, ++ .enable_rrc = 1, + }; + + static const struct pci_device_id xgbe_pci_table[] = { +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 2039f26ed067..b66dae94bd54 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -2763,7 +2763,7 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) + } + + /* No link, attempt a receiver reset cycle */ +- if (phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) { ++ if (pdata->vdata->enable_rrc && phy_data->rrc_count++ > XGBE_RRC_FREQUENCY) { + phy_data->rrc_count = 0; + if (pdata->phy.autoneg == AUTONEG_DISABLE) + xgbe_phy_rrc(pdata); +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h +index bd883f00fad0..8a5e0c68bc43 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe.h +@@ -1013,6 +1013,7 @@ struct xgbe_version_data { + unsigned int tx_desc_prefetch; + unsigned int rx_desc_prefetch; + unsigned int an_cdr_workaround; ++ unsigned int enable_rrc; + }; + + struct xgbe_prv_data { +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9043-amd-xgbe-10Gbaset-MDIO-for-10G.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9043-amd-xgbe-10Gbaset-MDIO-for-10G.patch new file mode 100644 index 00000000..80c67642 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9043-amd-xgbe-10Gbaset-MDIO-for-10G.patch @@ -0,0 +1,71 @@ +From a4cf803958f674229d9827147a3f278c7bdefe19 Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Fri, 29 Apr 2022 12:10:49 +0530 +Subject: [PATCH 43/48] amd-xgbe: 10Gbaset MDIO for 10G + +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: I071e647c1aa06c0b715f4a449c6970168036e54a +--- + drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 17 +++++++++++++---- + 1 file changed, 13 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +index bc8172c19082..944271556e0c 100755 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +@@ -402,6 +402,7 @@ static void xgbe_an73_set(struct xgbe_prv_data *pdata, bool enable, + reg |= MDIO_AN_CTRL1_RESTART; + + XMDIO_WRITE(pdata, MDIO_MMD_AN, MDIO_CTRL1, reg); ++ if(pdata->an_mode != XGBE_AN_MODE_MDIO) { + + if(xgbe_cur_mode(pdata) == XGBE_MODE_KR) { + /* step-4 Start AN with KR training auto start */ +@@ -410,6 +411,7 @@ static void xgbe_an73_set(struct xgbe_prv_data *pdata, bool enable, + (XGBE_KR_TRAINING_ENABLE | XGBE_KR_TRAINING_START), + (XGBE_KR_TRAINING_ENABLE | XGBE_KR_TRAINING_START)); + } ++ } + } + + static void xgbe_an73_restart(struct xgbe_prv_data *pdata) +@@ -1062,6 +1064,9 @@ static void xgbe_an_init(struct xgbe_prv_data *pdata) + case XGBE_AN_MODE_CL37_SGMII: + xgbe_an37_init(pdata); + break; ++ case XGBE_AN_MODE_MDIO: ++ netif_dbg(pdata, link, pdata->netdev, "xgbe_an_init for MDIO\n"); ++ break; + default: + break; + } +@@ -1214,9 +1219,11 @@ static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata, bool set_mode) + /* Disable auto-negotiation interrupt */ + disable_irq(pdata->an_irq); + +- if(xgbe_cur_mode(pdata) == XGBE_MODE_KR) { +- xgbe_change_mode(pdata, XGBE_MODE_KR); +- netif_dbg(pdata, link, pdata->netdev, "AN force modeset 10GKR \n"); ++ if(pdata->an_mode != XGBE_AN_MODE_MDIO) { ++ if(xgbe_cur_mode(pdata) == XGBE_MODE_KR) { ++ xgbe_change_mode(pdata, XGBE_MODE_KR); ++ netif_dbg(pdata, link, pdata->netdev, "AN force modeset 10GKR \n"); ++ } + } + + if (set_mode) { +@@ -1285,8 +1292,10 @@ static bool xgbe_phy_aneg_done(struct xgbe_prv_data *pdata) + if (pdata->an_mode == XGBE_AN_MODE_MDIO) { + if(pdata->phy.link) + pdata->an_result = XGBE_AN_COMPLETE; +- else ++ else { ++ netif_dbg(pdata, link, pdata->netdev, "xgbe_phy_aneg_done : ******* Forcing next mode ******* \n"); + pdata->an_result = XGBE_AN_NO_LINK; ++ } + } + return (pdata->an_result == XGBE_AN_COMPLETE); + } +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9044-amd-xgbe-RX-Adaptation-support-for-V3000.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9044-amd-xgbe-RX-Adaptation-support-for-V3000.patch new file mode 100644 index 00000000..a4f4a06e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9044-amd-xgbe-RX-Adaptation-support-for-V3000.patch @@ -0,0 +1,365 @@ +From f820ae13017b4926cfadd644bfd2f1f31476d284 Mon Sep 17 00:00:00 2001 +From: Raju Rangoju <Raju.Rangoju@amd.com> +Date: Mon, 11 Apr 2022 19:01:46 +0530 +Subject: [PATCH 44/48] amd-xgbe: RX-Adaptation support for V3000 + +Change-Id: I2329b9414374ab335bc768c1b319ae1c0a55cefc +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-common.h | 38 +++++ + drivers/net/ethernet/amd/xgbe/xgbe-pci.c | 1 + + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 155 +++++++++++++++++++- + drivers/net/ethernet/amd/xgbe/xgbe.h | 5 + + 4 files changed, 191 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h +index 466273b22f0a..0b8b1e97d2f9 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h +@@ -1285,6 +1285,24 @@ + #define MDIO_PMA_RX_CTRL1 0x8051 + #endif + ++#ifndef MDIO_PMA_RX_LSTS ++#define MDIO_PMA_RX_LSTS 0x018020 ++#endif ++ ++#ifndef MDIO_PMA_RX_EQ_CTRL4 ++//#define MDIO_PMA_RX_EQ_CTRL4 0x003C ++#define MDIO_PMA_RX_EQ_CTRL4 0x0001805C ++#endif ++ ++#ifndef MDIO_PMA_MP_MISC_STS ++#define MDIO_PMA_MP_MISC_STS 0x0078 ++#endif ++ ++#ifndef MDIO_PMA_PHY_RX_EQ_CEU ++//#define MDIO_PMA_PHY_RX_EQ_CEU 0x800E ++#define MDIO_PMA_PHY_RX_EQ_CEU 0x1800E ++#endif ++ + #ifndef MDIO_PCS_DIG_CTRL + #define MDIO_PCS_DIG_CTRL 0x8000 + #endif +@@ -1395,6 +1413,26 @@ + #define XGBE_PMA_RX_RST_0_RESET_ON 0x10 + #define XGBE_PMA_RX_RST_0_RESET_OFF 0x00 + ++#define XGBE_PMA_RX_SIG_DET_0_MASK BIT(4) ++#define XGBE_PMA_RX_SIG_DET_0_ENABLE BIT(4) ++#define XGBE_PMA_RX_SIG_DET_0_DISABLE 0x0000 ++ ++#define XGBE_PMA_RX_VALID_0_MASK BIT(12) ++#define XGBE_PMA_RX_VALID_0_ENABLE BIT(12) ++#define XGBE_PMA_RX_VALID_0_DISABLE 0x0000 ++ ++#define XGBE_PMA_RX_AD_REQ_MASK BIT(12) ++#define XGBE_PMA_RX_AD_REQ_ENABLE BIT(12) ++#define XGBE_PMA_RX_AD_REQ_DISABLE 0x0000 ++ ++#define XGBE_PMA_RX_ADPT_ACK_MASK BIT(12) ++#define XGBE_PMA_RX_ADPT_ACK BIT(12) ++ ++#define XGBE_PMA_CFF_UPDTM1_VLD BIT(8) ++#define XGBE_PMA_CFF_UPDT0_VLD BIT(9) ++#define XGBE_PMA_CFF_UPDT1_VLD BIT(10) ++#define XGBE_PMA_CFF_UPDT_MASK (XGBE_PMA_CFF_UPDTM1_VLD | XGBE_PMA_CFF_UPDT0_VLD | XGBE_PMA_CFF_UPDT1_VLD) ++ + #define XGBE_PMA_PLL_CTRL_MASK BIT(15) + #define XGBE_PMA_PLL_CTRL_ENABLE BIT(15) + #define XGBE_PMA_PLL_CTRL_DISABLE 0x0000 +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +index 4da4924e7254..0f2ac86ff904 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +@@ -288,6 +288,7 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + + /* Yellow Carp devices do not need rrc */ + pdata->vdata->enable_rrc = 0; ++ pdata->vdata->is_yc = 1; + dev_dbg(dev, "Disabling the RRC on Yellow carp devices\n"); + } else { + pdata->xpcs_window_def_reg = PCS_V2_WINDOW_DEF; +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index b66dae94bd54..f0cb4acbf231 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -387,6 +387,10 @@ struct xgbe_phy_data { + static DEFINE_MUTEX(xgbe_phy_comm_lock); + + static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata); ++static void xgbe_phy_rrc(struct xgbe_prv_data *pdata); ++static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode); ++static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata); ++static void xgbe_phy_sfi_mode(struct xgbe_prv_data *pdata); + + static int xgbe_phy_i2c_xfer(struct xgbe_prv_data *pdata, + struct xgbe_i2c_op *i2c_op) +@@ -2096,15 +2100,97 @@ static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable) + } + } + ++static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata) ++{ ++ /* ++ * step 1: Check for RX_VALID && LF_SIGDET ++ if (yes) { ++ step 2: force PCS to send RX_ADAPT Req to PHY ++ and then, ++ step 3: wait for RX_ADAPT ACK from the PHY ++ if (Yes) { ++ step4: Check for Block lock ++ if (yes) ++ return; ++ else ++ step 5: do mode set ++ } else ++ do mode set ++ } else ++ issue rrc ++ */ ++ ++ int reg; ++ pdata->count = 0; ++ ++rx_adapt_reinit: ++ reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_LSTS, ++ (XGBE_PMA_RX_SIG_DET_0_MASK | XGBE_PMA_RX_VALID_0_MASK)); ++ netif_dbg(pdata, link, pdata->netdev, "%s MDIO_PMA_RX_LSTS reg 0x%x\n", __func__, reg); ++ ++ /* step 1: Check for RX_VALID && LF_SIGDET */ ++ if ((reg & XGBE_PMA_RX_VALID_0_MASK) && (reg & XGBE_PMA_RX_SIG_DET_0_MASK)) { ++ reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_EQ_CTRL4, 0xffffffff); ++ netif_dbg(pdata, link, pdata->netdev, "%s MDIO_PMA_RX_EQ_CTRL4 current data 0x%x\n", ++ __func__, reg); ++ ++ /* step 2: force PCS to send RX_ADAPT Req to PHY */ ++ XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_EQ_CTRL4, ++ XGBE_PMA_RX_AD_REQ_MASK, XGBE_PMA_RX_AD_REQ_ENABLE); ++ ++ msleep(200); ++ ++ /* step 3: wait for RX_ADAPT ACK from the PHY */ ++ reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_PHY_RX_EQ_CEU, 0xffffffff /*XGBE_PMA_CFF_UPDT_MASK*/); ++ ++ /* Clear the RX_AD_REQ bit */ ++ XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_EQ_CTRL4, ++ XGBE_PMA_RX_AD_REQ_MASK, XGBE_PMA_RX_AD_REQ_DISABLE); ++ ++ netif_dbg(pdata, link, pdata->netdev, "%s MDIO_PMA_PHY_RX_EQ_CEU ACK is %s\n", ++ __func__, ((reg & XGBE_PMA_CFF_UPDT_MASK) == XGBE_PMA_CFF_UPDT_MASK) ? "SET" : "NOT_SET"); ++ ++ if ((reg & XGBE_PMA_CFF_UPDT_MASK) == XGBE_PMA_CFF_UPDT_MASK) ++ { ++ /*step 4: Check for Block lock */ ++ ++ /* Link status is latched low, so read once to clear ++ * and then read again to get current state ++ */ ++ reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1); ++ reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1); ++ if (reg & MDIO_STAT1_LSTATUS) { ++ /* If the block lock is found, declare the link up */ ++ netif_dbg(pdata, link, pdata->netdev, "%s block_lock done\n", __func__); ++ pdata->rx_adapt_done = 1; ++ pdata->mode_set = 0; ++ return; ++ } else { ++ struct xgbe_phy_data *phy_data = pdata->phy_data; ++ xgbe_phy_set_mode(pdata, phy_data->cur_mode); ++ } ++ } else { ++ struct xgbe_phy_data *phy_data = pdata->phy_data; ++ xgbe_phy_set_mode(pdata, phy_data->cur_mode); ++ } ++ } else { ++ netif_dbg(pdata, link, pdata->netdev, "%s either RX_VALID or LF_SIGDET is not set, issuing rrc\n",__func__); ++ xgbe_phy_rrc(pdata); ++ if (pdata->count++ >= 5) ++ return; ++ goto rx_adapt_reinit; ++ } ++} ++ + static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, + unsigned int cmd, unsigned int sub_cmd) + { + unsigned int s0 = 0; + unsigned int wait; ++ struct xgbe_phy_data *phy_data = pdata->phy_data; + + /* Disable PLL re-initialization during FW command processing */ + xgbe_phy_pll_ctrl(pdata, false); +- + /* Log if a previous command did not complete */ + if (XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS)) { + netif_dbg(pdata, link, pdata->netdev, +@@ -2125,7 +2211,7 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, + wait = XGBE_RATECHANGE_COUNT; + while (wait--) { + if (!XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS)) +- goto reenable_pll; ++ goto do_rx_adaptation; + + usleep_range(1000, 2000); + } +@@ -2135,10 +2221,19 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, + + /* Reset on error */ + xgbe_phy_rx_reset(pdata); ++ goto reenable_pll; ++ ++do_rx_adaptation: ++ dev_dbg(pdata->dev, "%s en_rx_adap %d sfp_cable %d\n", __func__, pdata->en_rx_adap, phy_data->sfp_cable); ++ if (pdata->en_rx_adap && (((cmd == 4) || (cmd == 3)) && (sub_cmd == 1))) { ++ netif_dbg(pdata, link, pdata->netdev, "%s Enabling RX adaptation\n", __func__); ++ pdata->mode_set = 1; ++ xgbe_phy_rx_adaptation(pdata); ++ } + + reenable_pll: + /* Enable PLL re-initialization, not needed for phy_poweroff (0,0) */ +- if (cmd != 0) ++ if ((cmd != 0) || (cmd != 5)) + xgbe_phy_pll_ctrl(pdata, true); + } + +@@ -2171,6 +2266,8 @@ static void xgbe_phy_sfi_mode(struct xgbe_prv_data *pdata) + /* 10G/SFI */ + if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) { + xgbe_phy_perform_ratechange(pdata, 3, 0); ++ } else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) && (pdata->en_rx_adap)) { ++ xgbe_phy_perform_ratechange(pdata, 3, 1); + } else { + if (phy_data->sfp_cable_len <= 1) + xgbe_phy_perform_ratechange(pdata, 3, 1); +@@ -2178,8 +2275,8 @@ static void xgbe_phy_sfi_mode(struct xgbe_prv_data *pdata) + xgbe_phy_perform_ratechange(pdata, 3, 2); + else + xgbe_phy_perform_ratechange(pdata, 3, 3); +- } + ++ } + phy_data->cur_mode = XGBE_MODE_SFI; + + netif_dbg(pdata, link, pdata->netdev, "10GbE SFI mode set\n"); +@@ -2234,7 +2331,10 @@ static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata) + xgbe_phy_set_redrv_mode(pdata); + + /* 10G/KR */ +- xgbe_phy_perform_ratechange(pdata, 4, 0); ++ if (pdata->en_rx_adap) { ++ xgbe_phy_perform_ratechange(pdata, 4, 1); ++ } else ++ xgbe_phy_perform_ratechange(pdata, 4, 0); + + phy_data->cur_mode = XGBE_MODE_KR; + +@@ -2751,7 +2851,24 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) + */ + reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1); + reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1); +- if (reg & MDIO_STAT1_LSTATUS) ++ ++ if (pdata->en_rx_adap) { ++ if (reg & MDIO_STAT1_LSTATUS) { ++ if (pdata->rx_adapt_done) ++ return 1; ++ else ++ xgbe_phy_rx_adaptation(pdata); ++ } else { ++ if (pdata->mode_set) ++ xgbe_phy_rx_adaptation(pdata); ++ else { ++ pdata->mode_set = 0; ++ pdata->rx_adapt_done = 0; ++ xgbe_phy_set_mode(pdata, phy_data->cur_mode); ++ } ++ } ++ ++ } else if (reg & MDIO_STAT1_LSTATUS) + return 1; + + if (pdata->phy.autoneg == AUTONEG_ENABLE && +@@ -3351,7 +3468,22 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + /* Backplane support */ + case XGBE_PORT_MODE_BACKPLANE: + XGBE_SET_SUP(lks, Autoneg); +- fallthrough; ++ XGBE_SET_SUP(lks, Pause); ++ XGBE_SET_SUP(lks, Asym_Pause); ++ XGBE_SET_SUP(lks, Backplane); ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) { ++ XGBE_SET_SUP(lks, 1000baseKX_Full); ++ phy_data->start_mode = XGBE_MODE_KX_1000; ++ } ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { ++ XGBE_SET_SUP(lks, 10000baseKR_Full); ++ if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) ++ XGBE_SET_SUP(lks, 10000baseR_FEC); ++ phy_data->start_mode = XGBE_MODE_KR; ++ } ++ ++ phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; ++ break; + case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG: + XGBE_SET_SUP(lks, Pause); + XGBE_SET_SUP(lks, Asym_Pause); +@@ -3365,6 +3497,8 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) + XGBE_SET_SUP(lks, 10000baseR_FEC); + phy_data->start_mode = XGBE_MODE_KR; ++ if (pdata->vdata->is_yc) ++ pdata->en_rx_adap = 1; + } + + phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; +@@ -3454,6 +3588,8 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { + XGBE_SET_SUP(lks, 10000baseT_Full); + phy_data->start_mode = XGBE_MODE_KR; ++ if (pdata->vdata->is_yc) ++ pdata->en_rx_adap = 1; + } + + phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; +@@ -3488,8 +3624,11 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + phy_data->start_mode = XGBE_MODE_SGMII_100; + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) + phy_data->start_mode = XGBE_MODE_SGMII_1000; +- if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { + phy_data->start_mode = XGBE_MODE_SFI; ++ if (pdata->vdata->is_yc) ++ pdata->en_rx_adap = 1; ++ } + + phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h +index 8a5e0c68bc43..1ee48f3b9df5 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe.h +@@ -1014,6 +1014,7 @@ struct xgbe_version_data { + unsigned int rx_desc_prefetch; + unsigned int an_cdr_workaround; + unsigned int enable_rrc; ++ unsigned int is_yc; + }; + + struct xgbe_prv_data { +@@ -1284,6 +1285,10 @@ struct xgbe_prv_data { + + bool debugfs_an_cdr_workaround; + bool debugfs_an_cdr_track_early; ++ bool en_rx_adap; ++ int count; ++ bool rx_adapt_done; ++ bool mode_set; + }; + + /* Function prototypes*/ +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9045-amd-xgbe-limit-the-rx-adaptation-retries-to-MAX_RX_A.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9045-amd-xgbe-limit-the-rx-adaptation-retries-to-MAX_RX_A.patch new file mode 100644 index 00000000..f3c733f6 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9045-amd-xgbe-limit-the-rx-adaptation-retries-to-MAX_RX_A.patch @@ -0,0 +1,74 @@ +From 0c4f9b298814a55cf55a45a5d3c51a0966a8c9a7 Mon Sep 17 00:00:00 2001 +From: Raju Rangoju <Raju.Rangoju@amd.com> +Date: Wed, 20 Apr 2022 18:09:25 +0530 +Subject: [PATCH 45/48] amd-xgbe: limit the rx-adaptation retries to + MAX_RX_ADAPT_RETRIES + +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: I7b70cd6e5cf82368daf73076209d97eddd3f9265 +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 18 +++++++++++++----- + drivers/net/ethernet/amd/xgbe/xgbe.h | 2 +- + 2 files changed, 14 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index f0cb4acbf231..168863a49360 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -2121,7 +2121,9 @@ static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata) + */ + + int reg; +- pdata->count = 0; ++ struct xgbe_phy_data *phy_data; ++ ++#define MAX_RX_ADAPT_RETRIES 5 + + rx_adapt_reinit: + reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_LSTS, +@@ -2166,18 +2168,24 @@ static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata) + pdata->mode_set = 0; + return; + } else { +- struct xgbe_phy_data *phy_data = pdata->phy_data; +- xgbe_phy_set_mode(pdata, phy_data->cur_mode); ++ goto set_mode; + } + } else { +- struct xgbe_phy_data *phy_data = pdata->phy_data; ++set_mode: ++ phy_data = pdata->phy_data; ++ if (pdata->rx_adapt_retries++ >= MAX_RX_ADAPT_RETRIES) { ++ pdata->rx_adapt_retries = 0; ++ return; ++ } + xgbe_phy_set_mode(pdata, phy_data->cur_mode); + } + } else { + netif_dbg(pdata, link, pdata->netdev, "%s either RX_VALID or LF_SIGDET is not set, issuing rrc\n",__func__); + xgbe_phy_rrc(pdata); +- if (pdata->count++ >= 5) ++ if (pdata->rx_adapt_retries++ >= MAX_RX_ADAPT_RETRIES) { ++ pdata->rx_adapt_retries = 0; + return; ++ } + goto rx_adapt_reinit; + } + } +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h +index 1ee48f3b9df5..b0e6a837d704 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe.h +@@ -1286,7 +1286,7 @@ struct xgbe_prv_data { + bool debugfs_an_cdr_workaround; + bool debugfs_an_cdr_track_early; + bool en_rx_adap; +- int count; ++ int rx_adapt_retries; + bool rx_adapt_done; + bool mode_set; + }; +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9046-amd-xgbe-do-not-enable-rx-adaptation-for-InPhi-redri.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9046-amd-xgbe-do-not-enable-rx-adaptation-for-InPhi-redri.patch new file mode 100644 index 00000000..8900e6fa --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9046-amd-xgbe-do-not-enable-rx-adaptation-for-InPhi-redri.patch @@ -0,0 +1,55 @@ +From 6f5c0a495a8c71fe27846cf2761d4aa391fe171f Mon Sep 17 00:00:00 2001 +From: Raju Rangoju <Raju.Rangoju@amd.com> +Date: Wed, 27 Apr 2022 15:16:35 +0530 +Subject: [PATCH 46/48] amd-xgbe: do not enable rx-adaptation for InPhi + redriver + +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +Change-Id: Ia2681671a04dd96b2093390afb85bcca49cb5be4 +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 168863a49360..596c73be734d 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -3391,6 +3391,16 @@ static void xgbe_phy_exit(struct xgbe_prv_data *pdata) + mdiobus_unregister(phy_data->mii); + } + ++static bool enable_rx_adap(struct xgbe_phy_data *phy_data) ++{ ++ ++ if ((phy_data->redrv) && ++ ((phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4223) || ++ (phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4227))) ++ return false; ++ return true; ++} ++ + static int xgbe_phy_init(struct xgbe_prv_data *pdata) + { + struct ethtool_link_ksettings *lks = &pdata->phy.lks; +@@ -3505,7 +3515,7 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) + XGBE_SET_SUP(lks, 10000baseR_FEC); + phy_data->start_mode = XGBE_MODE_KR; +- if (pdata->vdata->is_yc) ++ if ((pdata->vdata->is_yc) && enable_rx_adap(phy_data)) + pdata->en_rx_adap = 1; + } + +@@ -3634,7 +3644,7 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + phy_data->start_mode = XGBE_MODE_SGMII_1000; + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { + phy_data->start_mode = XGBE_MODE_SFI; +- if (pdata->vdata->is_yc) ++ if ((pdata->vdata->is_yc) && enable_rx_adap(phy_data)) + pdata->en_rx_adap = 1; + } + +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9047-amd-xgbe-RX-adapation-sending-proper-mailbox-command.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9047-amd-xgbe-RX-adapation-sending-proper-mailbox-command.patch new file mode 100644 index 00000000..32912122 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9047-amd-xgbe-RX-adapation-sending-proper-mailbox-command.patch @@ -0,0 +1,4267 @@ +From 80e568e0da40dc0a3afe5def025a0f33f8f08123 Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Wed, 4 May 2022 09:42:29 +0530 +Subject: [PATCH 47/48] amd-xgbe: RX-adapation sending proper mailbox command. + +Signed-off-by: rgaridap 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+z65X#+Ke0Z)u3Qg{L|C8i<CyaO8$@Ix8_u*94Bc(9KHoDiZBoMQKg%)QfpWSlW1jCL +zm~K=0<Uh%<{|XkjAwzx2`UjK%(_>1I>t}s#|De)uQgVF1!IbY0NuRC`-1-!cL4Csa +zmwbQ9l<yfKA`|)QOj$5a{rr82x;K&E>KqF6zE6qi-y!eR=X({V?5|Y9ALf~U+ojL< +zFHG-N_miy8^)mmDE`7eIVaoTWEbngrLrR~=kKePHj<ceo>^H;z;?n1PAEuowsHnUC +zQI|g759O(A!n^B#4*EX))H2K8Bk}($amzE$^q0`Ba_IAYlchE;mV<~)%rkurD9t^t +zpYNsk|LyR?;Q7gVJdXE3mztQ@SNG@R>Vli@H=K#}nZAiar+)sPOS84O9=5@H%+vT1 +z#`SBOCX1?VBEKa|K>bm09{K<|s=q#u*csMe;=;K(PReu7DcYzhPEBBX&Me1|{pbCI +kirIIiAxWdExS2N|Rmk<S>|A7u=@0sCiL)%Is9XPk06FujJ^%m! + +literal 0 +HcmV?d00001 + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 596c73be734d..2135c521f6e2 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -2241,7 +2241,7 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, + + reenable_pll: + /* Enable PLL re-initialization, not needed for phy_poweroff (0,0) */ +- if ((cmd != 0) || (cmd != 5)) ++ if (cmd != 0) + xgbe_phy_pll_ctrl(pdata, true); + } + +diff --git a/fs/unicode/utf8data.c b/fs/unicode/utf8data.c +new file mode 100644 +index 000000000000..d9b62901aa96 +--- /dev/null ++++ b/fs/unicode/utf8data.c +@@ -0,0 +1,4123 @@ ++/* This file is generated code, do not edit. */ ++ ++#include <linux/module.h> ++#include <linux/kernel.h> ++#include "utf8n.h" ++ ++static const unsigned int utf8agetab[] = { ++ 0, ++ 0x10100, ++ 0x20000, ++ 0x20100, ++ 0x30000, ++ 0x30100, ++ 0x30200, ++ 0x40000, ++ 0x40100, ++ 0x50000, ++ 0x50100, ++ 0x50200, ++ 0x60000, ++ 0x60100, ++ 0x60200, ++ 0x60300, ++ 0x70000, ++ 0x80000, ++ 0x90000, ++ 0xa0000, ++ 0xb0000, ++ 0xc0000, ++ 0xc0100 ++}; ++ ++static const struct utf8data utf8nfdicfdata[] = { ++ { 0, 0 }, ++ { 0x10100, 0 }, ++ { 0x20000, 0 }, ++ { 0x20100, 0 }, ++ { 0x30000, 0 }, ++ { 0x30100, 0 }, ++ { 0x30200, 1792 }, ++ { 0x40000, 3200 }, ++ { 0x40100, 3200 }, ++ { 0x50000, 3200 }, ++ { 0x50100, 3200 }, ++ { 0x50200, 3200 }, ++ { 0x60000, 3200 }, ++ { 0x60100, 3200 }, ++ { 0x60200, 3200 }, ++ { 0x60300, 3200 }, ++ { 0x70000, 3200 }, ++ { 0x80000, 3200 }, ++ { 0x90000, 3200 }, ++ { 0xa0000, 3200 }, ++ { 0xb0000, 3200 }, ++ { 0xc0000, 3200 }, ++ { 0xc0100, 3200 } ++}; ++ ++static const struct utf8data utf8nfdidata[] = { ++ { 0, 896 }, ++ { 0x10100, 896 }, ++ { 0x20000, 896 }, ++ { 0x20100, 896 }, ++ { 0x30000, 896 }, ++ { 0x30100, 896 }, ++ { 0x30200, 2496 }, ++ { 0x40000, 20736 }, ++ { 0x40100, 20736 }, ++ { 0x50000, 20736 }, ++ { 0x50100, 20736 }, ++ { 0x50200, 20736 }, ++ { 0x60000, 20736 }, ++ { 0x60100, 20736 }, ++ { 0x60200, 20736 }, ++ { 0x60300, 20736 }, ++ { 0x70000, 20736 }, ++ { 0x80000, 20736 }, ++ { 0x90000, 20736 }, ++ { 0xa0000, 20736 }, ++ { 0xb0000, 20736 }, ++ { 0xc0000, 20736 }, ++ { 0xc0100, 20736 } ++}; ++ ++static const unsigned char utf8data[64256] = { ++ /* nfdicf_30100 */ ++ 0xd7,0x07,0x66,0x84,0x0c,0x01,0x00,0xc6,0xd5,0x16,0xe4,0x99,0x1a,0xe3,0x63,0x15, ++ 0xe2,0x4c,0x0e,0xc1,0xe0,0x4e,0x0d,0xcf,0x86,0x65,0x2d,0x0d,0x01,0x00,0xd4,0xb8, ++ 0xd3,0x27,0xe2,0x89,0xa3,0xe1,0xce,0x35,0xe0,0x2c,0x22,0xcf,0x86,0xc5,0xe4,0x15, ++ 0x6d,0xe3,0x60,0x68,0xe2,0xf6,0x65,0xe1,0x29,0x65,0xe0,0xee,0x64,0xcf,0x86,0xe5, ++ 0xb3,0x64,0x64,0x96,0x64,0x0b,0x00,0xd2,0x0e,0xe1,0xb5,0x3c,0xe0,0xba,0xa3,0xcf, ++ 0x86,0xcf,0x06,0x01,0x00,0xd1,0x0c,0xe0,0x1e,0xa9,0xcf,0x86,0xcf,0x06,0x02,0xff, ++ 0xff,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x01, ++ 0x00,0xe4,0xe1,0x45,0xe3,0x3b,0x45,0xd2,0x06,0xcf,0x06,0x01,0x00,0xe1,0x87,0xad, ++ 0xd0,0x21,0xcf,0x86,0xe5,0x81,0xaa,0xe4,0x00,0xaa,0xe3,0xbf,0xa9,0xe2,0x9e,0xa9, ++ 0xe1,0x8d,0xa9,0x10,0x08,0x01,0xff,0xe8,0xb1,0x88,0x00,0x01,0xff,0xe6,0x9b,0xb4, ++ 0x00,0xcf,0x86,0xe5,0x63,0xac,0xd4,0x19,0xe3,0xa2,0xab,0xe2,0x81,0xab,0xe1,0x70, ++ 0xab,0x10,0x08,0x01,0xff,0xe9,0xb9,0xbf,0x00,0x01,0xff,0xe8,0xab,0x96,0x00,0xe3, ++ 0x09,0xac,0xe2,0xe8,0xab,0xe1,0xd7,0xab,0x10,0x08,0x01,0xff,0xe7,0xb8,0xb7,0x00, ++ 0x01,0xff,0xe9,0x9b,0xbb,0x00,0x83,0xe2,0x19,0xfa,0xe1,0xf2,0xf6,0xe0,0x6f,0xf5, ++ 0xcf,0x86,0xd5,0x31,0xc4,0xe3,0x54,0x4e,0xe2,0xf5,0x4c,0xe1,0xa4,0xcc,0xe0,0x9c, ++ 0x4b,0xcf,0x86,0xe5,0x8e,0x49,0xe4,0xaf,0x46,0xe3,0x11,0xbd,0xe2,0x68,0xbc,0xe1, ++ 0x43,0xbc,0xe0,0x1c,0xbc,0xcf,0x86,0xe5,0xe9,0xbb,0x94,0x07,0x63,0xd4,0xbb,0x07, ++ 0x00,0x07,0x00,0xe4,0xdb,0xf4,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd2,0x0b, ++ 0xe1,0xea,0xe1,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0xd9,0xe2,0xcf,0x86, ++ 0xe5,0x9e,0xe2,0xcf,0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0xd9,0xe2,0xcf,0x06, ++ 0x13,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0x74,0xf4,0xe3,0x5d,0xf3, ++ 0xd2,0xa0,0xe1,0x13,0xe7,0xd0,0x21,0xcf,0x86,0xe5,0x14,0xe4,0xe4,0x90,0xe3,0xe3, ++ 0x4e,0xe3,0xe2,0x2d,0xe3,0xe1,0x1b,0xe3,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00, ++ 0x05,0xff,0xe4,0xb8,0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0x70,0xe5,0xe3,0x2f,0xe5, ++ 0xe2,0x0e,0xe5,0xe1,0xfd,0xe4,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff, ++ 0xe5,0x93,0xb6,0x00,0xd4,0x34,0xd3,0x18,0xe2,0xf7,0xe5,0xe1,0xe6,0xe5,0x10,0x09, ++ 0x05,0xff,0xf0,0xa1,0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00,0xe2,0x17, ++ 0xe6,0x91,0x11,0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff,0xe5,0xac, ++ 0x88,0x00,0x05,0xff,0xe5,0xac,0xbe,0x00,0xe3,0x5d,0xe6,0xd2,0x14,0xe1,0x2c,0xe6, ++ 0x10,0x08,0x05,0xff,0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98,0x00,0xe1, ++ 0x38,0xe6,0x10,0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00, ++ 0xd1,0xd5,0xd0,0x6a,0xcf,0x86,0xe5,0x8d,0xeb,0xd4,0x19,0xe3,0xc6,0xea,0xe2,0xa4, ++ 0xea,0xe1,0x93,0xea,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff,0xe6,0xb5, ++ 0xb7,0x00,0xd3,0x18,0xe2,0x10,0xeb,0xe1,0xff,0xea,0x10,0x09,0x05,0xff,0xf0,0xa3, ++ 0xbd,0x9e,0x00,0x05,0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0x28,0xeb,0x10, ++ 0x08,0x05,0xff,0xe7,0x81,0xbd,0x00,0x05,0xff,0xe7,0x81,0xb7,0x00,0xd1,0x11,0x10, ++ 0x08,0x05,0xff,0xe7,0x85,0x85,0x00,0x05,0xff,0xf0,0xa4,0x89,0xa3,0x00,0x10,0x08, ++ 0x05,0xff,0xe7,0x86,0x9c,0x00,0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86,0xe5,0x2a, ++ 0xed,0xd4,0x1a,0xe3,0x62,0xec,0xe2,0x48,0xec,0xe1,0x35,0xec,0x10,0x08,0x05,0xff, ++ 0xe7,0x9b,0xb4,0x00,0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2,0xaa,0xec, ++ 0xe1,0x98,0xec,0x10,0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4,0x83,0xa3, ++ 0x00,0xd2,0x13,0xe1,0xc6,0xec,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00,0x05,0xff, ++ 0xe7,0xa9,0x80,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5,0xbc,0x00,0x05, ++ 0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x05, ++ 0xff,0xe7,0xaa,0xae,0x00,0xe0,0xdc,0xef,0xcf,0x86,0xd5,0x1d,0xe4,0x51,0xee,0xe3, ++ 0x0d,0xee,0xe2,0xeb,0xed,0xe1,0xda,0xed,0x10,0x09,0x05,0xff,0xf0,0xa3,0x8d,0x9f, ++ 0x00,0x05,0xff,0xe4,0x8f,0x95,0x00,0xd4,0x19,0xe3,0xf8,0xee,0xe2,0xd4,0xee,0xe1, ++ 0xc3,0xee,0x10,0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f,0x8a,0x00, ++ 0xd3,0x18,0xe2,0x43,0xef,0xe1,0x32,0xef,0x10,0x09,0x05,0xff,0xf0,0xa6,0xbe,0xb1, ++ 0x00,0x05,0xff,0xf0,0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0x5b,0xef,0x10,0x08,0x05, ++ 0xff,0xe8,0x9a,0x88,0x00,0x05,0xff,0xe8,0x9c,0x8e,0x00,0xd1,0x10,0x10,0x08,0x05, ++ 0xff,0xe8,0x9c,0xa8,0x00,0x05,0xff,0xe8,0x9d,0xab,0x00,0x10,0x08,0x05,0xff,0xe8, ++ 0x9e,0x86,0x00,0x05,0xff,0xe4,0xb5,0x97,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ /* nfdi_30100 */ ++ 0x57,0x04,0x01,0x00,0xc6,0xd5,0x16,0xe4,0xc2,0x59,0xe3,0xfb,0x54,0xe2,0x74,0x4f, ++ 0xc1,0xe0,0xa0,0x4d,0xcf,0x86,0x65,0x84,0x4d,0x01,0x00,0xd4,0xb8,0xd3,0x27,0xe2, ++ 0x0c,0xa0,0xe1,0xdf,0x8d,0xe0,0x39,0x71,0xcf,0x86,0xc5,0xe4,0x98,0x69,0xe3,0xe3, ++ 0x64,0xe2,0x79,0x62,0xe1,0xac,0x61,0xe0,0x71,0x61,0xcf,0x86,0xe5,0x36,0x61,0x64, ++ 0x19,0x61,0x0b,0x00,0xd2,0x0e,0xe1,0xc2,0xa0,0xe0,0x3d,0xa0,0xcf,0x86,0xcf,0x06, ++ 0x01,0x00,0xd1,0x0c,0xe0,0xa1,0xa5,0xcf,0x86,0xcf,0x06,0x02,0xff,0xff,0xd0,0x08, ++ 0xcf,0x86,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x01,0x00,0xe4,0x9e, ++ 0xb6,0xe3,0x18,0xae,0xd2,0x06,0xcf,0x06,0x01,0x00,0xe1,0x0a,0xaa,0xd0,0x21,0xcf, ++ 0x86,0xe5,0x04,0xa7,0xe4,0x83,0xa6,0xe3,0x42,0xa6,0xe2,0x21,0xa6,0xe1,0x10,0xa6, ++ 0x10,0x08,0x01,0xff,0xe8,0xb1,0x88,0x00,0x01,0xff,0xe6,0x9b,0xb4,0x00,0xcf,0x86, ++ 0xe5,0xe6,0xa8,0xd4,0x19,0xe3,0x25,0xa8,0xe2,0x04,0xa8,0xe1,0xf3,0xa7,0x10,0x08, ++ 0x01,0xff,0xe9,0xb9,0xbf,0x00,0x01,0xff,0xe8,0xab,0x96,0x00,0xe3,0x8c,0xa8,0xe2, ++ 0x6b,0xa8,0xe1,0x5a,0xa8,0x10,0x08,0x01,0xff,0xe7,0xb8,0xb7,0x00,0x01,0xff,0xe9, ++ 0x9b,0xbb,0x00,0x83,0xe2,0x9c,0xf6,0xe1,0x75,0xf3,0xe0,0xf2,0xf1,0xcf,0x86,0xd5, ++ 0x31,0xc4,0xe3,0x6d,0xcc,0xe2,0x46,0xca,0xe1,0x27,0xc9,0xe0,0xb7,0xbf,0xcf,0x86, ++ 0xe5,0xaa,0xbb,0xe4,0xa3,0xba,0xe3,0x94,0xb9,0xe2,0xeb,0xb8,0xe1,0xc6,0xb8,0xe0, ++ 0x9f,0xb8,0xcf,0x86,0xe5,0x6c,0xb8,0x94,0x07,0x63,0x57,0xb8,0x07,0x00,0x07,0x00, ++ 0xe4,0x5e,0xf1,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd2,0x0b,0xe1,0x6d,0xde, ++ 0xcf,0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0x5c,0xdf,0xcf,0x86,0xe5,0x21,0xdf, ++ 0xcf,0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0x5c,0xdf,0xcf,0x06,0x13,0x00,0xcf, ++ 0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0xf7,0xf0,0xe3,0xe0,0xef,0xd2,0xa0,0xe1, ++ 0x96,0xe3,0xd0,0x21,0xcf,0x86,0xe5,0x97,0xe0,0xe4,0x13,0xe0,0xe3,0xd1,0xdf,0xe2, ++ 0xb0,0xdf,0xe1,0x9e,0xdf,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00,0x05,0xff,0xe4, ++ 0xb8,0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0xf3,0xe1,0xe3,0xb2,0xe1,0xe2,0x91,0xe1, ++ 0xe1,0x80,0xe1,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff,0xe5,0x93,0xb6, ++ 0x00,0xd4,0x34,0xd3,0x18,0xe2,0x7a,0xe2,0xe1,0x69,0xe2,0x10,0x09,0x05,0xff,0xf0, ++ 0xa1,0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00,0xe2,0x9a,0xe2,0x91,0x11, ++ 0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff,0xe5,0xac,0x88,0x00,0x05, ++ 0xff,0xe5,0xac,0xbe,0x00,0xe3,0xe0,0xe2,0xd2,0x14,0xe1,0xaf,0xe2,0x10,0x08,0x05, ++ 0xff,0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98,0x00,0xe1,0xbb,0xe2,0x10, ++ 0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00,0xd1,0xd5,0xd0, ++ 0x6a,0xcf,0x86,0xe5,0x10,0xe8,0xd4,0x19,0xe3,0x49,0xe7,0xe2,0x27,0xe7,0xe1,0x16, ++ 0xe7,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff,0xe6,0xb5,0xb7,0x00,0xd3, ++ 0x18,0xe2,0x93,0xe7,0xe1,0x82,0xe7,0x10,0x09,0x05,0xff,0xf0,0xa3,0xbd,0x9e,0x00, ++ 0x05,0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0xab,0xe7,0x10,0x08,0x05,0xff, ++ 0xe7,0x81,0xbd,0x00,0x05,0xff,0xe7,0x81,0xb7,0x00,0xd1,0x11,0x10,0x08,0x05,0xff, ++ 0xe7,0x85,0x85,0x00,0x05,0xff,0xf0,0xa4,0x89,0xa3,0x00,0x10,0x08,0x05,0xff,0xe7, ++ 0x86,0x9c,0x00,0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86,0xe5,0xad,0xe9,0xd4,0x1a, ++ 0xe3,0xe5,0xe8,0xe2,0xcb,0xe8,0xe1,0xb8,0xe8,0x10,0x08,0x05,0xff,0xe7,0x9b,0xb4, ++ 0x00,0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2,0x2d,0xe9,0xe1,0x1b,0xe9, ++ 0x10,0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4,0x83,0xa3,0x00,0xd2,0x13, ++ 0xe1,0x49,0xe9,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00,0x05,0xff,0xe7,0xa9,0x80, ++ 0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5,0xbc,0x00,0x05,0xff,0xf0,0xa5, ++ 0xaa,0xa7,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x05,0xff,0xe7,0xaa, ++ 0xae,0x00,0xe0,0x5f,0xec,0xcf,0x86,0xd5,0x1d,0xe4,0xd4,0xea,0xe3,0x90,0xea,0xe2, ++ 0x6e,0xea,0xe1,0x5d,0xea,0x10,0x09,0x05,0xff,0xf0,0xa3,0x8d,0x9f,0x00,0x05,0xff, ++ 0xe4,0x8f,0x95,0x00,0xd4,0x19,0xe3,0x7b,0xeb,0xe2,0x57,0xeb,0xe1,0x46,0xeb,0x10, ++ 0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f,0x8a,0x00,0xd3,0x18,0xe2, ++ 0xc6,0xeb,0xe1,0xb5,0xeb,0x10,0x09,0x05,0xff,0xf0,0xa6,0xbe,0xb1,0x00,0x05,0xff, ++ 0xf0,0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0xde,0xeb,0x10,0x08,0x05,0xff,0xe8,0x9a, ++ 0x88,0x00,0x05,0xff,0xe8,0x9c,0x8e,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x9c, ++ 0xa8,0x00,0x05,0xff,0xe8,0x9d,0xab,0x00,0x10,0x08,0x05,0xff,0xe8,0x9e,0x86,0x00, ++ 0x05,0xff,0xe4,0xb5,0x97,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ /* nfdicf_30200 */ ++ 0xd7,0x07,0x66,0x84,0x05,0x01,0x00,0xc6,0xd5,0x16,0xe4,0x99,0x13,0xe3,0x63,0x0e, ++ 0xe2,0x4c,0x07,0xc1,0xe0,0x4e,0x06,0xcf,0x86,0x65,0x2d,0x06,0x01,0x00,0xd4,0x2a, ++ 0xe3,0xd0,0x35,0xe2,0x88,0x9c,0xe1,0xcd,0x2e,0xe0,0x2b,0x1b,0xcf,0x86,0xc5,0xe4, ++ 0x14,0x66,0xe3,0x5f,0x61,0xe2,0xf5,0x5e,0xe1,0x28,0x5e,0xe0,0xed,0x5d,0xcf,0x86, ++ 0xe5,0xb2,0x5d,0x64,0x95,0x5d,0x0b,0x00,0x83,0xe2,0xa7,0xf3,0xe1,0x80,0xf0,0xe0, ++ 0xfd,0xee,0xcf,0x86,0xd5,0x31,0xc4,0xe3,0xe2,0x47,0xe2,0x83,0x46,0xe1,0x32,0xc6, ++ 0xe0,0x2a,0x45,0xcf,0x86,0xe5,0x1c,0x43,0xe4,0x3d,0x40,0xe3,0x9f,0xb6,0xe2,0xf6, ++ 0xb5,0xe1,0xd1,0xb5,0xe0,0xaa,0xb5,0xcf,0x86,0xe5,0x77,0xb5,0x94,0x07,0x63,0x62, ++ 0xb5,0x07,0x00,0x07,0x00,0xe4,0x69,0xee,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00, ++ 0xd2,0x0b,0xe1,0x78,0xdb,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0x67,0xdc, ++ 0xcf,0x86,0xe5,0x2c,0xdc,0xcf,0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0x67,0xdc, ++ 0xcf,0x06,0x13,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0x02,0xee,0xe3, ++ 0xeb,0xec,0xd2,0xa0,0xe1,0xa1,0xe0,0xd0,0x21,0xcf,0x86,0xe5,0xa2,0xdd,0xe4,0x1e, ++ 0xdd,0xe3,0xdc,0xdc,0xe2,0xbb,0xdc,0xe1,0xa9,0xdc,0x10,0x08,0x05,0xff,0xe4,0xb8, ++ 0xbd,0x00,0x05,0xff,0xe4,0xb8,0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0xfe,0xde,0xe3, ++ 0xbd,0xde,0xe2,0x9c,0xde,0xe1,0x8b,0xde,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00, ++ 0x05,0xff,0xe5,0x93,0xb6,0x00,0xd4,0x34,0xd3,0x18,0xe2,0x85,0xdf,0xe1,0x74,0xdf, ++ 0x10,0x09,0x05,0xff,0xf0,0xa1,0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00, ++ 0xe2,0xa5,0xdf,0x91,0x11,0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff, ++ 0xe5,0xac,0x88,0x00,0x05,0xff,0xe5,0xac,0xbe,0x00,0xe3,0xeb,0xdf,0xd2,0x14,0xe1, ++ 0xba,0xdf,0x10,0x08,0x05,0xff,0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98, ++ 0x00,0xe1,0xc6,0xdf,0x10,0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0, ++ 0xa2,0x00,0xd1,0xd5,0xd0,0x6a,0xcf,0x86,0xe5,0x1b,0xe5,0xd4,0x19,0xe3,0x54,0xe4, ++ 0xe2,0x32,0xe4,0xe1,0x21,0xe4,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff, ++ 0xe6,0xb5,0xb7,0x00,0xd3,0x18,0xe2,0x9e,0xe4,0xe1,0x8d,0xe4,0x10,0x09,0x05,0xff, ++ 0xf0,0xa3,0xbd,0x9e,0x00,0x05,0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0xb6, ++ 0xe4,0x10,0x08,0x05,0xff,0xe7,0x81,0xbd,0x00,0x05,0xff,0xe7,0x81,0xb7,0x00,0xd1, ++ 0x11,0x10,0x08,0x05,0xff,0xe7,0x85,0x85,0x00,0x05,0xff,0xf0,0xa4,0x89,0xa3,0x00, ++ 0x10,0x08,0x05,0xff,0xe7,0x86,0x9c,0x00,0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86, ++ 0xe5,0xb8,0xe6,0xd4,0x1a,0xe3,0xf0,0xe5,0xe2,0xd6,0xe5,0xe1,0xc3,0xe5,0x10,0x08, ++ 0x05,0xff,0xe7,0x9b,0xb4,0x00,0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2, ++ 0x38,0xe6,0xe1,0x26,0xe6,0x10,0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4, ++ 0x83,0xa3,0x00,0xd2,0x13,0xe1,0x54,0xe6,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00, ++ 0x05,0xff,0xe7,0xa9,0x80,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5,0xbc, ++ 0x00,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa,0xa7, ++ 0x00,0x05,0xff,0xe7,0xaa,0xae,0x00,0xe0,0x6a,0xe9,0xcf,0x86,0xd5,0x1d,0xe4,0xdf, ++ 0xe7,0xe3,0x9b,0xe7,0xe2,0x79,0xe7,0xe1,0x68,0xe7,0x10,0x09,0x05,0xff,0xf0,0xa3, ++ 0x8d,0x9f,0x00,0x05,0xff,0xe4,0x8f,0x95,0x00,0xd4,0x19,0xe3,0x86,0xe8,0xe2,0x62, ++ 0xe8,0xe1,0x51,0xe8,0x10,0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f, ++ 0x8a,0x00,0xd3,0x18,0xe2,0xd1,0xe8,0xe1,0xc0,0xe8,0x10,0x09,0x05,0xff,0xf0,0xa6, ++ 0xbe,0xb1,0x00,0x05,0xff,0xf0,0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0xe9,0xe8,0x10, ++ 0x08,0x05,0xff,0xe8,0x9a,0x88,0x00,0x05,0xff,0xe8,0x9c,0x8e,0x00,0xd1,0x10,0x10, ++ 0x08,0x05,0xff,0xe8,0x9c,0xa8,0x00,0x05,0xff,0xe8,0x9d,0xab,0x00,0x10,0x08,0x05, ++ 0xff,0xe8,0x9e,0x86,0x00,0x05,0xff,0xe4,0xb5,0x97,0x00,0x00,0x00,0x00,0x00,0x00, ++ /* nfdi_30200 */ ++ 0x57,0x04,0x01,0x00,0xc6,0xd5,0x16,0xe4,0x82,0x53,0xe3,0xbb,0x4e,0xe2,0x34,0x49, ++ 0xc1,0xe0,0x60,0x47,0xcf,0x86,0x65,0x44,0x47,0x01,0x00,0xd4,0x2a,0xe3,0x1c,0x9a, ++ 0xe2,0xcb,0x99,0xe1,0x9e,0x87,0xe0,0xf8,0x6a,0xcf,0x86,0xc5,0xe4,0x57,0x63,0xe3, ++ 0xa2,0x5e,0xe2,0x38,0x5c,0xe1,0x6b,0x5b,0xe0,0x30,0x5b,0xcf,0x86,0xe5,0xf5,0x5a, ++ 0x64,0xd8,0x5a,0x0b,0x00,0x83,0xe2,0xea,0xf0,0xe1,0xc3,0xed,0xe0,0x40,0xec,0xcf, ++ 0x86,0xd5,0x31,0xc4,0xe3,0xbb,0xc6,0xe2,0x94,0xc4,0xe1,0x75,0xc3,0xe0,0x05,0xba, ++ 0xcf,0x86,0xe5,0xf8,0xb5,0xe4,0xf1,0xb4,0xe3,0xe2,0xb3,0xe2,0x39,0xb3,0xe1,0x14, ++ 0xb3,0xe0,0xed,0xb2,0xcf,0x86,0xe5,0xba,0xb2,0x94,0x07,0x63,0xa5,0xb2,0x07,0x00, ++ 0x07,0x00,0xe4,0xac,0xeb,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd2,0x0b,0xe1, ++ 0xbb,0xd8,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd1,0x0e,0xe0,0xaa,0xd9,0xcf,0x86,0xe5, ++ 0x6f,0xd9,0xcf,0x06,0x11,0x00,0xd0,0x0b,0xcf,0x86,0xe5,0xaa,0xd9,0xcf,0x06,0x13, ++ 0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0x45,0xeb,0xe3,0x2e,0xea,0xd2, ++ 0xa0,0xe1,0xe4,0xdd,0xd0,0x21,0xcf,0x86,0xe5,0xe5,0xda,0xe4,0x61,0xda,0xe3,0x1f, ++ 0xda,0xe2,0xfe,0xd9,0xe1,0xec,0xd9,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00,0x05, ++ 0xff,0xe4,0xb8,0xb8,0x00,0xcf,0x86,0xd5,0x1c,0xe4,0x41,0xdc,0xe3,0x00,0xdc,0xe2, ++ 0xdf,0xdb,0xe1,0xce,0xdb,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff,0xe5, ++ 0x93,0xb6,0x00,0xd4,0x34,0xd3,0x18,0xe2,0xc8,0xdc,0xe1,0xb7,0xdc,0x10,0x09,0x05, ++ 0xff,0xf0,0xa1,0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa,0x00,0xe2,0xe8,0xdc, ++ 0x91,0x11,0x10,0x09,0x05,0xff,0xf0,0xa1,0x8d,0xaa,0x00,0x05,0xff,0xe5,0xac,0x88, ++ 0x00,0x05,0xff,0xe5,0xac,0xbe,0x00,0xe3,0x2e,0xdd,0xd2,0x14,0xe1,0xfd,0xdc,0x10, ++ 0x08,0x05,0xff,0xe5,0xaf,0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98,0x00,0xe1,0x09, ++ 0xdd,0x10,0x08,0x05,0xff,0xe5,0xbc,0xb3,0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00,0xd1, ++ 0xd5,0xd0,0x6a,0xcf,0x86,0xe5,0x5e,0xe2,0xd4,0x19,0xe3,0x97,0xe1,0xe2,0x75,0xe1, ++ 0xe1,0x64,0xe1,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff,0xe6,0xb5,0xb7, ++ 0x00,0xd3,0x18,0xe2,0xe1,0xe1,0xe1,0xd0,0xe1,0x10,0x09,0x05,0xff,0xf0,0xa3,0xbd, ++ 0x9e,0x00,0x05,0xff,0xf0,0xa3,0xbe,0x8e,0x00,0xd2,0x13,0xe1,0xf9,0xe1,0x10,0x08, ++ 0x05,0xff,0xe7,0x81,0xbd,0x00,0x05,0xff,0xe7,0x81,0xb7,0x00,0xd1,0x11,0x10,0x08, ++ 0x05,0xff,0xe7,0x85,0x85,0x00,0x05,0xff,0xf0,0xa4,0x89,0xa3,0x00,0x10,0x08,0x05, ++ 0xff,0xe7,0x86,0x9c,0x00,0x05,0xff,0xe4,0x8e,0xab,0x00,0xcf,0x86,0xe5,0xfb,0xe3, ++ 0xd4,0x1a,0xe3,0x33,0xe3,0xe2,0x19,0xe3,0xe1,0x06,0xe3,0x10,0x08,0x05,0xff,0xe7, ++ 0x9b,0xb4,0x00,0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0xd3,0x16,0xe2,0x7b,0xe3,0xe1, ++ 0x69,0xe3,0x10,0x08,0x05,0xff,0xe7,0xa3,0x8c,0x00,0x05,0xff,0xe4,0x83,0xa3,0x00, ++ 0xd2,0x13,0xe1,0x97,0xe3,0x10,0x08,0x05,0xff,0xe4,0x84,0xaf,0x00,0x05,0xff,0xe7, ++ 0xa9,0x80,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5,0xbc,0x00,0x05,0xff, ++ 0xf0,0xa5,0xaa,0xa7,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x05,0xff, ++ 0xe7,0xaa,0xae,0x00,0xe0,0xad,0xe6,0xcf,0x86,0xd5,0x1d,0xe4,0x22,0xe5,0xe3,0xde, ++ 0xe4,0xe2,0xbc,0xe4,0xe1,0xab,0xe4,0x10,0x09,0x05,0xff,0xf0,0xa3,0x8d,0x9f,0x00, ++ 0x05,0xff,0xe4,0x8f,0x95,0x00,0xd4,0x19,0xe3,0xc9,0xe5,0xe2,0xa5,0xe5,0xe1,0x94, ++ 0xe5,0x10,0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f,0x8a,0x00,0xd3, ++ 0x18,0xe2,0x14,0xe6,0xe1,0x03,0xe6,0x10,0x09,0x05,0xff,0xf0,0xa6,0xbe,0xb1,0x00, ++ 0x05,0xff,0xf0,0xa7,0x83,0x92,0x00,0xd2,0x13,0xe1,0x2c,0xe6,0x10,0x08,0x05,0xff, ++ 0xe8,0x9a,0x88,0x00,0x05,0xff,0xe8,0x9c,0x8e,0x00,0xd1,0x10,0x10,0x08,0x05,0xff, ++ 0xe8,0x9c,0xa8,0x00,0x05,0xff,0xe8,0x9d,0xab,0x00,0x10,0x08,0x05,0xff,0xe8,0x9e, ++ 0x86,0x00,0x05,0xff,0xe4,0xb5,0x97,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ /* nfdicf_c0100 */ ++ 0xd7,0xb0,0x56,0x04,0x01,0x00,0x95,0xa8,0xd4,0x5e,0xd3,0x2e,0xd2,0x16,0xd1,0x0a, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0x61,0x00,0x10,0x06,0x01,0xff,0x62,0x00,0x01,0xff, ++ 0x63,0x00,0xd1,0x0c,0x10,0x06,0x01,0xff,0x64,0x00,0x01,0xff,0x65,0x00,0x10,0x06, ++ 0x01,0xff,0x66,0x00,0x01,0xff,0x67,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x06,0x01,0xff, ++ 0x68,0x00,0x01,0xff,0x69,0x00,0x10,0x06,0x01,0xff,0x6a,0x00,0x01,0xff,0x6b,0x00, ++ 0xd1,0x0c,0x10,0x06,0x01,0xff,0x6c,0x00,0x01,0xff,0x6d,0x00,0x10,0x06,0x01,0xff, ++ 0x6e,0x00,0x01,0xff,0x6f,0x00,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x06,0x01,0xff, ++ 0x70,0x00,0x01,0xff,0x71,0x00,0x10,0x06,0x01,0xff,0x72,0x00,0x01,0xff,0x73,0x00, ++ 0xd1,0x0c,0x10,0x06,0x01,0xff,0x74,0x00,0x01,0xff,0x75,0x00,0x10,0x06,0x01,0xff, ++ 0x76,0x00,0x01,0xff,0x77,0x00,0x92,0x16,0xd1,0x0c,0x10,0x06,0x01,0xff,0x78,0x00, ++ 0x01,0xff,0x79,0x00,0x10,0x06,0x01,0xff,0x7a,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0xc6,0xe5,0xf9,0x14,0xe4,0x6f,0x0d,0xe3,0x39,0x08,0xe2,0x22,0x01,0xc1,0xd0,0x24, ++ 0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x07,0x63,0xd8,0x43,0x01,0x00,0x93,0x13,0x52, ++ 0x04,0x01,0x00,0x91,0x0b,0x10,0x04,0x01,0x00,0x01,0xff,0xce,0xbc,0x00,0x01,0x00, ++ 0x01,0x00,0xcf,0x86,0xe5,0xb3,0x44,0xd4,0x7f,0xd3,0x3f,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x61,0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x81,0x00,0x10,0x08,0x01, ++ 0xff,0x61,0xcc,0x82,0x00,0x01,0xff,0x61,0xcc,0x83,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x61,0xcc,0x88,0x00,0x01,0xff,0x61,0xcc,0x8a,0x00,0x10,0x07,0x01,0xff,0xc3, ++ 0xa6,0x00,0x01,0xff,0x63,0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x65,0xcc,0x80,0x00,0x01,0xff,0x65,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x65,0xcc, ++ 0x82,0x00,0x01,0xff,0x65,0xcc,0x88,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc, ++ 0x80,0x00,0x01,0xff,0x69,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x69,0xcc,0x82,0x00, ++ 0x01,0xff,0x69,0xcc,0x88,0x00,0xd3,0x3b,0xd2,0x1f,0xd1,0x0f,0x10,0x07,0x01,0xff, ++ 0xc3,0xb0,0x00,0x01,0xff,0x6e,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x80, ++ 0x00,0x01,0xff,0x6f,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x82, ++ 0x00,0x01,0xff,0x6f,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x88,0x00,0x01, ++ 0x00,0xd2,0x1f,0xd1,0x0f,0x10,0x07,0x01,0xff,0xc3,0xb8,0x00,0x01,0xff,0x75,0xcc, ++ 0x80,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0x81,0x00,0x01,0xff,0x75,0xcc,0x82,0x00, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc,0x88,0x00,0x01,0xff,0x79,0xcc,0x81,0x00, ++ 0x10,0x07,0x01,0xff,0xc3,0xbe,0x00,0x01,0xff,0x73,0x73,0x00,0xe1,0xd4,0x03,0xe0, ++ 0xeb,0x01,0xcf,0x86,0xd5,0xfb,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0x61,0xcc,0x84,0x00,0x01,0xff,0x61,0xcc,0x84,0x00,0x10,0x08,0x01,0xff, ++ 0x61,0xcc,0x86,0x00,0x01,0xff,0x61,0xcc,0x86,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x61,0xcc,0xa8,0x00,0x01,0xff,0x61,0xcc,0xa8,0x00,0x10,0x08,0x01,0xff,0x63,0xcc, ++ 0x81,0x00,0x01,0xff,0x63,0xcc,0x81,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x63,0xcc,0x82,0x00,0x01,0xff,0x63,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x63,0xcc, ++ 0x87,0x00,0x01,0xff,0x63,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x63,0xcc, ++ 0x8c,0x00,0x01,0xff,0x63,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x64,0xcc,0x8c,0x00, ++ 0x01,0xff,0x64,0xcc,0x8c,0x00,0xd3,0x3b,0xd2,0x1b,0xd1,0x0b,0x10,0x07,0x01,0xff, ++ 0xc4,0x91,0x00,0x01,0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x84,0x00,0x01,0xff,0x65, ++ 0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0x86,0x00,0x01,0xff,0x65, ++ 0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x87,0x00,0x01,0xff,0x65,0xcc,0x87, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0xa8,0x00,0x01,0xff,0x65, ++ 0xcc,0xa8,0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x8c,0x00,0x01,0xff,0x65,0xcc,0x8c, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x67,0xcc,0x82,0x00,0x01,0xff,0x67,0xcc,0x82, ++ 0x00,0x10,0x08,0x01,0xff,0x67,0xcc,0x86,0x00,0x01,0xff,0x67,0xcc,0x86,0x00,0xd4, ++ 0x7b,0xd3,0x3b,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x67,0xcc,0x87,0x00,0x01, ++ 0xff,0x67,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x67,0xcc,0xa7,0x00,0x01,0xff,0x67, ++ 0xcc,0xa7,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x68,0xcc,0x82,0x00,0x01,0xff,0x68, ++ 0xcc,0x82,0x00,0x10,0x07,0x01,0xff,0xc4,0xa7,0x00,0x01,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0x69,0xcc,0x83,0x00,0x01,0xff,0x69,0xcc,0x83,0x00,0x10,0x08, ++ 0x01,0xff,0x69,0xcc,0x84,0x00,0x01,0xff,0x69,0xcc,0x84,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0x69,0xcc,0x86,0x00,0x01,0xff,0x69,0xcc,0x86,0x00,0x10,0x08,0x01,0xff, ++ 0x69,0xcc,0xa8,0x00,0x01,0xff,0x69,0xcc,0xa8,0x00,0xd3,0x37,0xd2,0x17,0xd1,0x0c, ++ 0x10,0x08,0x01,0xff,0x69,0xcc,0x87,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xc4,0xb3, ++ 0x00,0x01,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6a,0xcc,0x82,0x00,0x01,0xff,0x6a, ++ 0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x6b,0xcc,0xa7,0x00,0x01,0xff,0x6b,0xcc,0xa7, ++ 0x00,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x6c,0xcc,0x81,0x00,0x10, ++ 0x08,0x01,0xff,0x6c,0xcc,0x81,0x00,0x01,0xff,0x6c,0xcc,0xa7,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x6c,0xcc,0xa7,0x00,0x01,0xff,0x6c,0xcc,0x8c,0x00,0x10,0x08,0x01, ++ 0xff,0x6c,0xcc,0x8c,0x00,0x01,0xff,0xc5,0x80,0x00,0xcf,0x86,0xd5,0xed,0xd4,0x72, ++ 0xd3,0x37,0xd2,0x17,0xd1,0x0b,0x10,0x04,0x01,0x00,0x01,0xff,0xc5,0x82,0x00,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0x6e,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6e, ++ 0xcc,0x81,0x00,0x01,0xff,0x6e,0xcc,0xa7,0x00,0x10,0x08,0x01,0xff,0x6e,0xcc,0xa7, ++ 0x00,0x01,0xff,0x6e,0xcc,0x8c,0x00,0xd2,0x1b,0xd1,0x10,0x10,0x08,0x01,0xff,0x6e, ++ 0xcc,0x8c,0x00,0x01,0xff,0xca,0xbc,0x6e,0x00,0x10,0x07,0x01,0xff,0xc5,0x8b,0x00, ++ 0x01,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x84,0x00,0x01,0xff,0x6f,0xcc, ++ 0x84,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x86,0x00,0x01,0xff,0x6f,0xcc,0x86,0x00, ++ 0xd3,0x3b,0xd2,0x1b,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x8b,0x00,0x01,0xff, ++ 0x6f,0xcc,0x8b,0x00,0x10,0x07,0x01,0xff,0xc5,0x93,0x00,0x01,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x72,0xcc,0x81,0x00,0x01,0xff,0x72,0xcc,0x81,0x00,0x10,0x08,0x01, ++ 0xff,0x72,0xcc,0xa7,0x00,0x01,0xff,0x72,0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x72,0xcc,0x8c,0x00,0x01,0xff,0x72,0xcc,0x8c,0x00,0x10,0x08,0x01, ++ 0xff,0x73,0xcc,0x81,0x00,0x01,0xff,0x73,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x73,0xcc,0x82,0x00,0x01,0xff,0x73,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x73, ++ 0xcc,0xa7,0x00,0x01,0xff,0x73,0xcc,0xa7,0x00,0xd4,0x7b,0xd3,0x3b,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x73,0xcc,0x8c,0x00,0x01,0xff,0x73,0xcc,0x8c,0x00,0x10, ++ 0x08,0x01,0xff,0x74,0xcc,0xa7,0x00,0x01,0xff,0x74,0xcc,0xa7,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x74,0xcc,0x8c,0x00,0x01,0xff,0x74,0xcc,0x8c,0x00,0x10,0x07,0x01, ++ 0xff,0xc5,0xa7,0x00,0x01,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc, ++ 0x83,0x00,0x01,0xff,0x75,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0x84,0x00, ++ 0x01,0xff,0x75,0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc,0x86,0x00, ++ 0x01,0xff,0x75,0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0x8a,0x00,0x01,0xff, ++ 0x75,0xcc,0x8a,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc, ++ 0x8b,0x00,0x01,0xff,0x75,0xcc,0x8b,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0xa8,0x00, ++ 0x01,0xff,0x75,0xcc,0xa8,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x82,0x00, ++ 0x01,0xff,0x77,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x79,0xcc,0x82,0x00,0x01,0xff, ++ 0x79,0xcc,0x82,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x79,0xcc,0x88,0x00, ++ 0x01,0xff,0x7a,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x7a,0xcc,0x81,0x00,0x01,0xff, ++ 0x7a,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x7a,0xcc,0x87,0x00,0x01,0xff, ++ 0x7a,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x7a,0xcc,0x8c,0x00,0x01,0xff,0x73,0x00, ++ 0xe0,0x65,0x01,0xcf,0x86,0xd5,0xb4,0xd4,0x5a,0xd3,0x2f,0xd2,0x16,0xd1,0x0b,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0xc9,0x93,0x00,0x10,0x07,0x01,0xff,0xc6,0x83,0x00,0x01, ++ 0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xc6,0x85,0x00,0x01,0x00,0x10,0x07,0x01,0xff, ++ 0xc9,0x94,0x00,0x01,0xff,0xc6,0x88,0x00,0xd2,0x19,0xd1,0x0b,0x10,0x04,0x01,0x00, ++ 0x01,0xff,0xc9,0x96,0x00,0x10,0x07,0x01,0xff,0xc9,0x97,0x00,0x01,0xff,0xc6,0x8c, ++ 0x00,0x51,0x04,0x01,0x00,0x10,0x07,0x01,0xff,0xc7,0x9d,0x00,0x01,0xff,0xc9,0x99, ++ 0x00,0xd3,0x32,0xd2,0x19,0xd1,0x0e,0x10,0x07,0x01,0xff,0xc9,0x9b,0x00,0x01,0xff, ++ 0xc6,0x92,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xc9,0xa0,0x00,0xd1,0x0b,0x10,0x07, ++ 0x01,0xff,0xc9,0xa3,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xc9,0xa9,0x00,0x01,0xff, ++ 0xc9,0xa8,0x00,0xd2,0x0f,0x91,0x0b,0x10,0x07,0x01,0xff,0xc6,0x99,0x00,0x01,0x00, ++ 0x01,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xc9,0xaf,0x00,0x01,0xff,0xc9,0xb2,0x00, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xc9,0xb5,0x00,0xd4,0x5d,0xd3,0x34,0xd2,0x1b,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x9b,0x00,0x01,0xff,0x6f,0xcc,0x9b,0x00,0x10, ++ 0x07,0x01,0xff,0xc6,0xa3,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xc6,0xa5, ++ 0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xca,0x80,0x00,0x01,0xff,0xc6,0xa8,0x00,0xd2, ++ 0x0f,0x91,0x0b,0x10,0x04,0x01,0x00,0x01,0xff,0xca,0x83,0x00,0x01,0x00,0xd1,0x0b, ++ 0x10,0x07,0x01,0xff,0xc6,0xad,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xca,0x88,0x00, ++ 0x01,0xff,0x75,0xcc,0x9b,0x00,0xd3,0x33,0xd2,0x1d,0xd1,0x0f,0x10,0x08,0x01,0xff, ++ 0x75,0xcc,0x9b,0x00,0x01,0xff,0xca,0x8a,0x00,0x10,0x07,0x01,0xff,0xca,0x8b,0x00, ++ 0x01,0xff,0xc6,0xb4,0x00,0xd1,0x0b,0x10,0x04,0x01,0x00,0x01,0xff,0xc6,0xb6,0x00, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xca,0x92,0x00,0xd2,0x0f,0x91,0x0b,0x10,0x07,0x01, ++ 0xff,0xc6,0xb9,0x00,0x01,0x00,0x01,0x00,0x91,0x0b,0x10,0x07,0x01,0xff,0xc6,0xbd, ++ 0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0xd4,0xd4,0x44,0xd3,0x16,0x52,0x04,0x01, ++ 0x00,0x51,0x07,0x01,0xff,0xc7,0x86,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xc7,0x89, ++ 0x00,0xd2,0x12,0x91,0x0b,0x10,0x07,0x01,0xff,0xc7,0x89,0x00,0x01,0x00,0x01,0xff, ++ 0xc7,0x8c,0x00,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x61,0xcc,0x8c,0x00,0x10, ++ 0x08,0x01,0xff,0x61,0xcc,0x8c,0x00,0x01,0xff,0x69,0xcc,0x8c,0x00,0xd3,0x46,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x8c,0x00,0x01,0xff,0x6f,0xcc,0x8c, ++ 0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x8c,0x00,0x01,0xff,0x75,0xcc,0x8c,0x00,0xd1, ++ 0x12,0x10,0x08,0x01,0xff,0x75,0xcc,0x8c,0x00,0x01,0xff,0x75,0xcc,0x88,0xcc,0x84, ++ 0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88,0xcc,0x84,0x00,0x01,0xff,0x75,0xcc,0x88, ++ 0xcc,0x81,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88,0xcc,0x81, ++ 0x00,0x01,0xff,0x75,0xcc,0x88,0xcc,0x8c,0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88, ++ 0xcc,0x8c,0x00,0x01,0xff,0x75,0xcc,0x88,0xcc,0x80,0x00,0xd1,0x0e,0x10,0x0a,0x01, ++ 0xff,0x75,0xcc,0x88,0xcc,0x80,0x00,0x01,0x00,0x10,0x0a,0x01,0xff,0x61,0xcc,0x88, ++ 0xcc,0x84,0x00,0x01,0xff,0x61,0xcc,0x88,0xcc,0x84,0x00,0xd4,0x87,0xd3,0x41,0xd2, ++ 0x26,0xd1,0x14,0x10,0x0a,0x01,0xff,0x61,0xcc,0x87,0xcc,0x84,0x00,0x01,0xff,0x61, ++ 0xcc,0x87,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xc3,0xa6,0xcc,0x84,0x00,0x01,0xff, ++ 0xc3,0xa6,0xcc,0x84,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xc7,0xa5,0x00,0x01,0x00, ++ 0x10,0x08,0x01,0xff,0x67,0xcc,0x8c,0x00,0x01,0xff,0x67,0xcc,0x8c,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x6b,0xcc,0x8c,0x00,0x01,0xff,0x6b,0xcc,0x8c,0x00, ++ 0x10,0x08,0x01,0xff,0x6f,0xcc,0xa8,0x00,0x01,0xff,0x6f,0xcc,0xa8,0x00,0xd1,0x14, ++ 0x10,0x0a,0x01,0xff,0x6f,0xcc,0xa8,0xcc,0x84,0x00,0x01,0xff,0x6f,0xcc,0xa8,0xcc, ++ 0x84,0x00,0x10,0x09,0x01,0xff,0xca,0x92,0xcc,0x8c,0x00,0x01,0xff,0xca,0x92,0xcc, ++ 0x8c,0x00,0xd3,0x38,0xd2,0x1a,0xd1,0x0f,0x10,0x08,0x01,0xff,0x6a,0xcc,0x8c,0x00, ++ 0x01,0xff,0xc7,0xb3,0x00,0x10,0x07,0x01,0xff,0xc7,0xb3,0x00,0x01,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0x67,0xcc,0x81,0x00,0x01,0xff,0x67,0xcc,0x81,0x00,0x10,0x07, ++ 0x04,0xff,0xc6,0x95,0x00,0x04,0xff,0xc6,0xbf,0x00,0xd2,0x24,0xd1,0x10,0x10,0x08, ++ 0x04,0xff,0x6e,0xcc,0x80,0x00,0x04,0xff,0x6e,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff, ++ 0x61,0xcc,0x8a,0xcc,0x81,0x00,0x01,0xff,0x61,0xcc,0x8a,0xcc,0x81,0x00,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xc3,0xa6,0xcc,0x81,0x00,0x01,0xff,0xc3,0xa6,0xcc,0x81,0x00, ++ 0x10,0x09,0x01,0xff,0xc3,0xb8,0xcc,0x81,0x00,0x01,0xff,0xc3,0xb8,0xcc,0x81,0x00, ++ 0xe2,0x31,0x02,0xe1,0xc3,0x44,0xe0,0xc8,0x01,0xcf,0x86,0xd5,0xfb,0xd4,0x80,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x61,0xcc,0x8f,0x00,0x01,0xff,0x61, ++ 0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x61,0xcc,0x91,0x00,0x01,0xff,0x61,0xcc,0x91, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0x8f,0x00,0x01,0xff,0x65,0xcc,0x8f, ++ 0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x91,0x00,0x01,0xff,0x65,0xcc,0x91,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x8f,0x00,0x01,0xff,0x69,0xcc,0x8f, ++ 0x00,0x10,0x08,0x01,0xff,0x69,0xcc,0x91,0x00,0x01,0xff,0x69,0xcc,0x91,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x8f,0x00,0x01,0xff,0x6f,0xcc,0x8f,0x00,0x10, ++ 0x08,0x01,0xff,0x6f,0xcc,0x91,0x00,0x01,0xff,0x6f,0xcc,0x91,0x00,0xd3,0x40,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x72,0xcc,0x8f,0x00,0x01,0xff,0x72,0xcc,0x8f, ++ 0x00,0x10,0x08,0x01,0xff,0x72,0xcc,0x91,0x00,0x01,0xff,0x72,0xcc,0x91,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x75,0xcc,0x8f,0x00,0x01,0xff,0x75,0xcc,0x8f,0x00,0x10, ++ 0x08,0x01,0xff,0x75,0xcc,0x91,0x00,0x01,0xff,0x75,0xcc,0x91,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x04,0xff,0x73,0xcc,0xa6,0x00,0x04,0xff,0x73,0xcc,0xa6,0x00,0x10, ++ 0x08,0x04,0xff,0x74,0xcc,0xa6,0x00,0x04,0xff,0x74,0xcc,0xa6,0x00,0xd1,0x0b,0x10, ++ 0x07,0x04,0xff,0xc8,0x9d,0x00,0x04,0x00,0x10,0x08,0x04,0xff,0x68,0xcc,0x8c,0x00, ++ 0x04,0xff,0x68,0xcc,0x8c,0x00,0xd4,0x79,0xd3,0x31,0xd2,0x16,0xd1,0x0b,0x10,0x07, ++ 0x06,0xff,0xc6,0x9e,0x00,0x07,0x00,0x10,0x07,0x04,0xff,0xc8,0xa3,0x00,0x04,0x00, ++ 0xd1,0x0b,0x10,0x07,0x04,0xff,0xc8,0xa5,0x00,0x04,0x00,0x10,0x08,0x04,0xff,0x61, ++ 0xcc,0x87,0x00,0x04,0xff,0x61,0xcc,0x87,0x00,0xd2,0x24,0xd1,0x10,0x10,0x08,0x04, ++ 0xff,0x65,0xcc,0xa7,0x00,0x04,0xff,0x65,0xcc,0xa7,0x00,0x10,0x0a,0x04,0xff,0x6f, ++ 0xcc,0x88,0xcc,0x84,0x00,0x04,0xff,0x6f,0xcc,0x88,0xcc,0x84,0x00,0xd1,0x14,0x10, ++ 0x0a,0x04,0xff,0x6f,0xcc,0x83,0xcc,0x84,0x00,0x04,0xff,0x6f,0xcc,0x83,0xcc,0x84, ++ 0x00,0x10,0x08,0x04,0xff,0x6f,0xcc,0x87,0x00,0x04,0xff,0x6f,0xcc,0x87,0x00,0xd3, ++ 0x27,0xe2,0x21,0x43,0xd1,0x14,0x10,0x0a,0x04,0xff,0x6f,0xcc,0x87,0xcc,0x84,0x00, ++ 0x04,0xff,0x6f,0xcc,0x87,0xcc,0x84,0x00,0x10,0x08,0x04,0xff,0x79,0xcc,0x84,0x00, ++ 0x04,0xff,0x79,0xcc,0x84,0x00,0xd2,0x13,0x51,0x04,0x08,0x00,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0xa5,0x00,0x08,0xff,0xc8,0xbc,0x00,0xd1,0x0b,0x10,0x04,0x08,0x00,0x08, ++ 0xff,0xc6,0x9a,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1,0xa6,0x00,0x08,0x00,0xcf,0x86, ++ 0x95,0x5f,0x94,0x5b,0xd3,0x2f,0xd2,0x16,0xd1,0x0b,0x10,0x04,0x08,0x00,0x08,0xff, ++ 0xc9,0x82,0x00,0x10,0x04,0x09,0x00,0x09,0xff,0xc6,0x80,0x00,0xd1,0x0e,0x10,0x07, ++ 0x09,0xff,0xca,0x89,0x00,0x09,0xff,0xca,0x8c,0x00,0x10,0x07,0x09,0xff,0xc9,0x87, ++ 0x00,0x09,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x09,0xff,0xc9,0x89,0x00,0x09,0x00, ++ 0x10,0x07,0x09,0xff,0xc9,0x8b,0x00,0x09,0x00,0xd1,0x0b,0x10,0x07,0x09,0xff,0xc9, ++ 0x8d,0x00,0x09,0x00,0x10,0x07,0x09,0xff,0xc9,0x8f,0x00,0x09,0x00,0x01,0x00,0x01, ++ 0x00,0xd1,0x8b,0xd0,0x0c,0xcf,0x86,0xe5,0x10,0x43,0x64,0xef,0x42,0x01,0xe6,0xcf, ++ 0x86,0xd5,0x2a,0xe4,0x99,0x43,0xe3,0x7f,0x43,0xd2,0x11,0xe1,0x5e,0x43,0x10,0x07, ++ 0x01,0xff,0xcc,0x80,0x00,0x01,0xff,0xcc,0x81,0x00,0xe1,0x65,0x43,0x10,0x09,0x01, ++ 0xff,0xcc,0x88,0xcc,0x81,0x00,0x01,0xff,0xce,0xb9,0x00,0xd4,0x0f,0x93,0x0b,0x92, ++ 0x07,0x61,0xab,0x43,0x01,0xea,0x06,0xe6,0x06,0xe6,0xd3,0x2c,0xd2,0x16,0xd1,0x0b, ++ 0x10,0x07,0x0a,0xff,0xcd,0xb1,0x00,0x0a,0x00,0x10,0x07,0x0a,0xff,0xcd,0xb3,0x00, ++ 0x0a,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xca,0xb9,0x00,0x01,0x00,0x10,0x07,0x0a, ++ 0xff,0xcd,0xb7,0x00,0x0a,0x00,0xd2,0x07,0x61,0x97,0x43,0x00,0x00,0x51,0x04,0x09, ++ 0x00,0x10,0x06,0x01,0xff,0x3b,0x00,0x10,0xff,0xcf,0xb3,0x00,0xe0,0x31,0x01,0xcf, ++ 0x86,0xd5,0xd3,0xd4,0x5f,0xd3,0x21,0x52,0x04,0x00,0x00,0xd1,0x0d,0x10,0x04,0x01, ++ 0x00,0x01,0xff,0xc2,0xa8,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x81, ++ 0x00,0x01,0xff,0xc2,0xb7,0x00,0xd2,0x1f,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb5, ++ 0xcc,0x81,0x00,0x01,0xff,0xce,0xb7,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb9, ++ 0xcc,0x81,0x00,0x00,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xce,0xbf,0xcc,0x81,0x00, ++ 0x00,0x00,0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x81,0x00,0x01,0xff,0xcf,0x89,0xcc, ++ 0x81,0x00,0xd3,0x3c,0xd2,0x20,0xd1,0x12,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc,0x88, ++ 0xcc,0x81,0x00,0x01,0xff,0xce,0xb1,0x00,0x10,0x07,0x01,0xff,0xce,0xb2,0x00,0x01, ++ 0xff,0xce,0xb3,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xce,0xb4,0x00,0x01,0xff,0xce, ++ 0xb5,0x00,0x10,0x07,0x01,0xff,0xce,0xb6,0x00,0x01,0xff,0xce,0xb7,0x00,0xd2,0x1c, ++ 0xd1,0x0e,0x10,0x07,0x01,0xff,0xce,0xb8,0x00,0x01,0xff,0xce,0xb9,0x00,0x10,0x07, ++ 0x01,0xff,0xce,0xba,0x00,0x01,0xff,0xce,0xbb,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff, ++ 0xce,0xbc,0x00,0x01,0xff,0xce,0xbd,0x00,0x10,0x07,0x01,0xff,0xce,0xbe,0x00,0x01, ++ 0xff,0xce,0xbf,0x00,0xe4,0x85,0x43,0xd3,0x35,0xd2,0x19,0xd1,0x0e,0x10,0x07,0x01, ++ 0xff,0xcf,0x80,0x00,0x01,0xff,0xcf,0x81,0x00,0x10,0x04,0x00,0x00,0x01,0xff,0xcf, ++ 0x83,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xcf,0x84,0x00,0x01,0xff,0xcf,0x85,0x00, ++ 0x10,0x07,0x01,0xff,0xcf,0x86,0x00,0x01,0xff,0xcf,0x87,0x00,0xe2,0x2b,0x43,0xd1, ++ 0x0e,0x10,0x07,0x01,0xff,0xcf,0x88,0x00,0x01,0xff,0xcf,0x89,0x00,0x10,0x09,0x01, ++ 0xff,0xce,0xb9,0xcc,0x88,0x00,0x01,0xff,0xcf,0x85,0xcc,0x88,0x00,0xcf,0x86,0xd5, ++ 0x94,0xd4,0x3c,0xd3,0x13,0x92,0x0f,0x51,0x04,0x01,0x00,0x10,0x07,0x01,0xff,0xcf, ++ 0x83,0x00,0x01,0x00,0x01,0x00,0xd2,0x07,0x61,0x3a,0x43,0x01,0x00,0xd1,0x12,0x10, ++ 0x09,0x01,0xff,0xce,0xbf,0xcc,0x81,0x00,0x01,0xff,0xcf,0x85,0xcc,0x81,0x00,0x10, ++ 0x09,0x01,0xff,0xcf,0x89,0xcc,0x81,0x00,0x0a,0xff,0xcf,0x97,0x00,0xd3,0x2c,0xd2, ++ 0x11,0xe1,0x46,0x43,0x10,0x07,0x01,0xff,0xce,0xb2,0x00,0x01,0xff,0xce,0xb8,0x00, ++ 0xd1,0x10,0x10,0x09,0x01,0xff,0xcf,0x92,0xcc,0x88,0x00,0x01,0xff,0xcf,0x86,0x00, ++ 0x10,0x07,0x01,0xff,0xcf,0x80,0x00,0x04,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x06, ++ 0xff,0xcf,0x99,0x00,0x06,0x00,0x10,0x07,0x01,0xff,0xcf,0x9b,0x00,0x04,0x00,0xd1, ++ 0x0b,0x10,0x07,0x01,0xff,0xcf,0x9d,0x00,0x04,0x00,0x10,0x07,0x01,0xff,0xcf,0x9f, ++ 0x00,0x04,0x00,0xd4,0x58,0xd3,0x2c,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xcf, ++ 0xa1,0x00,0x04,0x00,0x10,0x07,0x01,0xff,0xcf,0xa3,0x00,0x01,0x00,0xd1,0x0b,0x10, ++ 0x07,0x01,0xff,0xcf,0xa5,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xcf,0xa7,0x00,0x01, ++ 0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xcf,0xa9,0x00,0x01,0x00,0x10,0x07, ++ 0x01,0xff,0xcf,0xab,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xcf,0xad,0x00, ++ 0x01,0x00,0x10,0x07,0x01,0xff,0xcf,0xaf,0x00,0x01,0x00,0xd3,0x2b,0xd2,0x12,0x91, ++ 0x0e,0x10,0x07,0x01,0xff,0xce,0xba,0x00,0x01,0xff,0xcf,0x81,0x00,0x01,0x00,0xd1, ++ 0x0e,0x10,0x07,0x05,0xff,0xce,0xb8,0x00,0x05,0xff,0xce,0xb5,0x00,0x10,0x04,0x06, ++ 0x00,0x07,0xff,0xcf,0xb8,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x04,0x07,0x00,0x07,0xff, ++ 0xcf,0xb2,0x00,0x10,0x07,0x07,0xff,0xcf,0xbb,0x00,0x07,0x00,0xd1,0x0b,0x10,0x04, ++ 0x08,0x00,0x08,0xff,0xcd,0xbb,0x00,0x10,0x07,0x08,0xff,0xcd,0xbc,0x00,0x08,0xff, ++ 0xcd,0xbd,0x00,0xe3,0xed,0x46,0xe2,0x3d,0x05,0xe1,0x27,0x02,0xe0,0x66,0x01,0xcf, ++ 0x86,0xd5,0xf0,0xd4,0x7e,0xd3,0x40,0xd2,0x22,0xd1,0x12,0x10,0x09,0x04,0xff,0xd0, ++ 0xb5,0xcc,0x80,0x00,0x01,0xff,0xd0,0xb5,0xcc,0x88,0x00,0x10,0x07,0x01,0xff,0xd1, ++ 0x92,0x00,0x01,0xff,0xd0,0xb3,0xcc,0x81,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd1, ++ 0x94,0x00,0x01,0xff,0xd1,0x95,0x00,0x10,0x07,0x01,0xff,0xd1,0x96,0x00,0x01,0xff, ++ 0xd1,0x96,0xcc,0x88,0x00,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd1,0x98,0x00, ++ 0x01,0xff,0xd1,0x99,0x00,0x10,0x07,0x01,0xff,0xd1,0x9a,0x00,0x01,0xff,0xd1,0x9b, ++ 0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd0,0xba,0xcc,0x81,0x00,0x04,0xff,0xd0,0xb8, ++ 0xcc,0x80,0x00,0x10,0x09,0x01,0xff,0xd1,0x83,0xcc,0x86,0x00,0x01,0xff,0xd1,0x9f, ++ 0x00,0xd3,0x38,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd0,0xb0,0x00,0x01,0xff, ++ 0xd0,0xb1,0x00,0x10,0x07,0x01,0xff,0xd0,0xb2,0x00,0x01,0xff,0xd0,0xb3,0x00,0xd1, ++ 0x0e,0x10,0x07,0x01,0xff,0xd0,0xb4,0x00,0x01,0xff,0xd0,0xb5,0x00,0x10,0x07,0x01, ++ 0xff,0xd0,0xb6,0x00,0x01,0xff,0xd0,0xb7,0x00,0xd2,0x1e,0xd1,0x10,0x10,0x07,0x01, ++ 0xff,0xd0,0xb8,0x00,0x01,0xff,0xd0,0xb8,0xcc,0x86,0x00,0x10,0x07,0x01,0xff,0xd0, ++ 0xba,0x00,0x01,0xff,0xd0,0xbb,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd0,0xbc,0x00, ++ 0x01,0xff,0xd0,0xbd,0x00,0x10,0x07,0x01,0xff,0xd0,0xbe,0x00,0x01,0xff,0xd0,0xbf, ++ 0x00,0xe4,0x25,0x42,0xd3,0x38,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd1,0x80, ++ 0x00,0x01,0xff,0xd1,0x81,0x00,0x10,0x07,0x01,0xff,0xd1,0x82,0x00,0x01,0xff,0xd1, ++ 0x83,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd1,0x84,0x00,0x01,0xff,0xd1,0x85,0x00, ++ 0x10,0x07,0x01,0xff,0xd1,0x86,0x00,0x01,0xff,0xd1,0x87,0x00,0xd2,0x1c,0xd1,0x0e, ++ 0x10,0x07,0x01,0xff,0xd1,0x88,0x00,0x01,0xff,0xd1,0x89,0x00,0x10,0x07,0x01,0xff, ++ 0xd1,0x8a,0x00,0x01,0xff,0xd1,0x8b,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd1,0x8c, ++ 0x00,0x01,0xff,0xd1,0x8d,0x00,0x10,0x07,0x01,0xff,0xd1,0x8e,0x00,0x01,0xff,0xd1, ++ 0x8f,0x00,0xcf,0x86,0xd5,0x07,0x64,0xcf,0x41,0x01,0x00,0xd4,0x58,0xd3,0x2c,0xd2, ++ 0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd1,0xa1,0x00,0x01,0x00,0x10,0x07,0x01,0xff, ++ 0xd1,0xa3,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd1,0xa5,0x00,0x01,0x00, ++ 0x10,0x07,0x01,0xff,0xd1,0xa7,0x00,0x01,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01, ++ 0xff,0xd1,0xa9,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd1,0xab,0x00,0x01,0x00,0xd1, ++ 0x0b,0x10,0x07,0x01,0xff,0xd1,0xad,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd1,0xaf, ++ 0x00,0x01,0x00,0xd3,0x33,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd1,0xb1,0x00, ++ 0x01,0x00,0x10,0x07,0x01,0xff,0xd1,0xb3,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01, ++ 0xff,0xd1,0xb5,0x00,0x01,0x00,0x10,0x09,0x01,0xff,0xd1,0xb5,0xcc,0x8f,0x00,0x01, ++ 0xff,0xd1,0xb5,0xcc,0x8f,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd1,0xb9, ++ 0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd1,0xbb,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07, ++ 0x01,0xff,0xd1,0xbd,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd1,0xbf,0x00,0x01,0x00, ++ 0xe0,0x41,0x01,0xcf,0x86,0xd5,0x8e,0xd4,0x36,0xd3,0x11,0xe2,0x91,0x41,0xe1,0x88, ++ 0x41,0x10,0x07,0x01,0xff,0xd2,0x81,0x00,0x01,0x00,0xd2,0x0f,0x51,0x04,0x04,0x00, ++ 0x10,0x07,0x06,0xff,0xd2,0x8b,0x00,0x06,0x00,0xd1,0x0b,0x10,0x07,0x04,0xff,0xd2, ++ 0x8d,0x00,0x04,0x00,0x10,0x07,0x04,0xff,0xd2,0x8f,0x00,0x04,0x00,0xd3,0x2c,0xd2, ++ 0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2,0x91,0x00,0x01,0x00,0x10,0x07,0x01,0xff, ++ 0xd2,0x93,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2,0x95,0x00,0x01,0x00, ++ 0x10,0x07,0x01,0xff,0xd2,0x97,0x00,0x01,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01, ++ 0xff,0xd2,0x99,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0x9b,0x00,0x01,0x00,0xd1, ++ 0x0b,0x10,0x07,0x01,0xff,0xd2,0x9d,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0x9f, ++ 0x00,0x01,0x00,0xd4,0x58,0xd3,0x2c,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2, ++ 0xa1,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xa3,0x00,0x01,0x00,0xd1,0x0b,0x10, ++ 0x07,0x01,0xff,0xd2,0xa5,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xa7,0x00,0x01, ++ 0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2,0xa9,0x00,0x01,0x00,0x10,0x07, ++ 0x01,0xff,0xd2,0xab,0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2,0xad,0x00, ++ 0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xaf,0x00,0x01,0x00,0xd3,0x2c,0xd2,0x16,0xd1, ++ 0x0b,0x10,0x07,0x01,0xff,0xd2,0xb1,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xb3, ++ 0x00,0x01,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2,0xb5,0x00,0x01,0x00,0x10,0x07, ++ 0x01,0xff,0xd2,0xb7,0x00,0x01,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd2, ++ 0xb9,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xbb,0x00,0x01,0x00,0xd1,0x0b,0x10, ++ 0x07,0x01,0xff,0xd2,0xbd,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xd2,0xbf,0x00,0x01, ++ 0x00,0xcf,0x86,0xd5,0xdc,0xd4,0x5a,0xd3,0x36,0xd2,0x20,0xd1,0x10,0x10,0x07,0x01, ++ 0xff,0xd3,0x8f,0x00,0x01,0xff,0xd0,0xb6,0xcc,0x86,0x00,0x10,0x09,0x01,0xff,0xd0, ++ 0xb6,0xcc,0x86,0x00,0x01,0xff,0xd3,0x84,0x00,0xd1,0x0b,0x10,0x04,0x01,0x00,0x06, ++ 0xff,0xd3,0x86,0x00,0x10,0x04,0x06,0x00,0x01,0xff,0xd3,0x88,0x00,0xd2,0x16,0xd1, ++ 0x0b,0x10,0x04,0x01,0x00,0x06,0xff,0xd3,0x8a,0x00,0x10,0x04,0x06,0x00,0x01,0xff, ++ 0xd3,0x8c,0x00,0xe1,0x69,0x40,0x10,0x04,0x01,0x00,0x06,0xff,0xd3,0x8e,0x00,0xd3, ++ 0x41,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd0,0xb0,0xcc,0x86,0x00,0x01,0xff, ++ 0xd0,0xb0,0xcc,0x86,0x00,0x10,0x09,0x01,0xff,0xd0,0xb0,0xcc,0x88,0x00,0x01,0xff, ++ 0xd0,0xb0,0xcc,0x88,0x00,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd3,0x95,0x00,0x01,0x00, ++ 0x10,0x09,0x01,0xff,0xd0,0xb5,0xcc,0x86,0x00,0x01,0xff,0xd0,0xb5,0xcc,0x86,0x00, ++ 0xd2,0x1d,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd3,0x99,0x00,0x01,0x00,0x10,0x09,0x01, ++ 0xff,0xd3,0x99,0xcc,0x88,0x00,0x01,0xff,0xd3,0x99,0xcc,0x88,0x00,0xd1,0x12,0x10, ++ 0x09,0x01,0xff,0xd0,0xb6,0xcc,0x88,0x00,0x01,0xff,0xd0,0xb6,0xcc,0x88,0x00,0x10, ++ 0x09,0x01,0xff,0xd0,0xb7,0xcc,0x88,0x00,0x01,0xff,0xd0,0xb7,0xcc,0x88,0x00,0xd4, ++ 0x82,0xd3,0x41,0xd2,0x1d,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd3,0xa1,0x00,0x01,0x00, ++ 0x10,0x09,0x01,0xff,0xd0,0xb8,0xcc,0x84,0x00,0x01,0xff,0xd0,0xb8,0xcc,0x84,0x00, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xd0,0xb8,0xcc,0x88,0x00,0x01,0xff,0xd0,0xb8,0xcc, ++ 0x88,0x00,0x10,0x09,0x01,0xff,0xd0,0xbe,0xcc,0x88,0x00,0x01,0xff,0xd0,0xbe,0xcc, ++ 0x88,0x00,0xd2,0x1d,0xd1,0x0b,0x10,0x07,0x01,0xff,0xd3,0xa9,0x00,0x01,0x00,0x10, ++ 0x09,0x01,0xff,0xd3,0xa9,0xcc,0x88,0x00,0x01,0xff,0xd3,0xa9,0xcc,0x88,0x00,0xd1, ++ 0x12,0x10,0x09,0x04,0xff,0xd1,0x8d,0xcc,0x88,0x00,0x04,0xff,0xd1,0x8d,0xcc,0x88, ++ 0x00,0x10,0x09,0x01,0xff,0xd1,0x83,0xcc,0x84,0x00,0x01,0xff,0xd1,0x83,0xcc,0x84, ++ 0x00,0xd3,0x41,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd1,0x83,0xcc,0x88,0x00, ++ 0x01,0xff,0xd1,0x83,0xcc,0x88,0x00,0x10,0x09,0x01,0xff,0xd1,0x83,0xcc,0x8b,0x00, ++ 0x01,0xff,0xd1,0x83,0xcc,0x8b,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd1,0x87,0xcc, ++ 0x88,0x00,0x01,0xff,0xd1,0x87,0xcc,0x88,0x00,0x10,0x07,0x08,0xff,0xd3,0xb7,0x00, ++ 0x08,0x00,0xd2,0x1d,0xd1,0x12,0x10,0x09,0x01,0xff,0xd1,0x8b,0xcc,0x88,0x00,0x01, ++ 0xff,0xd1,0x8b,0xcc,0x88,0x00,0x10,0x07,0x09,0xff,0xd3,0xbb,0x00,0x09,0x00,0xd1, ++ 0x0b,0x10,0x07,0x09,0xff,0xd3,0xbd,0x00,0x09,0x00,0x10,0x07,0x09,0xff,0xd3,0xbf, ++ 0x00,0x09,0x00,0xe1,0x26,0x02,0xe0,0x78,0x01,0xcf,0x86,0xd5,0xb0,0xd4,0x58,0xd3, ++ 0x2c,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x06,0xff,0xd4,0x81,0x00,0x06,0x00,0x10,0x07, ++ 0x06,0xff,0xd4,0x83,0x00,0x06,0x00,0xd1,0x0b,0x10,0x07,0x06,0xff,0xd4,0x85,0x00, ++ 0x06,0x00,0x10,0x07,0x06,0xff,0xd4,0x87,0x00,0x06,0x00,0xd2,0x16,0xd1,0x0b,0x10, ++ 0x07,0x06,0xff,0xd4,0x89,0x00,0x06,0x00,0x10,0x07,0x06,0xff,0xd4,0x8b,0x00,0x06, ++ 0x00,0xd1,0x0b,0x10,0x07,0x06,0xff,0xd4,0x8d,0x00,0x06,0x00,0x10,0x07,0x06,0xff, ++ 0xd4,0x8f,0x00,0x06,0x00,0xd3,0x2c,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x09,0xff,0xd4, ++ 0x91,0x00,0x09,0x00,0x10,0x07,0x09,0xff,0xd4,0x93,0x00,0x09,0x00,0xd1,0x0b,0x10, ++ 0x07,0x0a,0xff,0xd4,0x95,0x00,0x0a,0x00,0x10,0x07,0x0a,0xff,0xd4,0x97,0x00,0x0a, ++ 0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x0a,0xff,0xd4,0x99,0x00,0x0a,0x00,0x10,0x07, ++ 0x0a,0xff,0xd4,0x9b,0x00,0x0a,0x00,0xd1,0x0b,0x10,0x07,0x0a,0xff,0xd4,0x9d,0x00, ++ 0x0a,0x00,0x10,0x07,0x0a,0xff,0xd4,0x9f,0x00,0x0a,0x00,0xd4,0x58,0xd3,0x2c,0xd2, ++ 0x16,0xd1,0x0b,0x10,0x07,0x0a,0xff,0xd4,0xa1,0x00,0x0a,0x00,0x10,0x07,0x0a,0xff, ++ 0xd4,0xa3,0x00,0x0a,0x00,0xd1,0x0b,0x10,0x07,0x0b,0xff,0xd4,0xa5,0x00,0x0b,0x00, ++ 0x10,0x07,0x0c,0xff,0xd4,0xa7,0x00,0x0c,0x00,0xd2,0x16,0xd1,0x0b,0x10,0x07,0x10, ++ 0xff,0xd4,0xa9,0x00,0x10,0x00,0x10,0x07,0x10,0xff,0xd4,0xab,0x00,0x10,0x00,0xd1, ++ 0x0b,0x10,0x07,0x10,0xff,0xd4,0xad,0x00,0x10,0x00,0x10,0x07,0x10,0xff,0xd4,0xaf, ++ 0x00,0x10,0x00,0xd3,0x35,0xd2,0x19,0xd1,0x0b,0x10,0x04,0x00,0x00,0x01,0xff,0xd5, ++ 0xa1,0x00,0x10,0x07,0x01,0xff,0xd5,0xa2,0x00,0x01,0xff,0xd5,0xa3,0x00,0xd1,0x0e, ++ 0x10,0x07,0x01,0xff,0xd5,0xa4,0x00,0x01,0xff,0xd5,0xa5,0x00,0x10,0x07,0x01,0xff, ++ 0xd5,0xa6,0x00,0x01,0xff,0xd5,0xa7,0x00,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff, ++ 0xd5,0xa8,0x00,0x01,0xff,0xd5,0xa9,0x00,0x10,0x07,0x01,0xff,0xd5,0xaa,0x00,0x01, ++ 0xff,0xd5,0xab,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd5,0xac,0x00,0x01,0xff,0xd5, ++ 0xad,0x00,0x10,0x07,0x01,0xff,0xd5,0xae,0x00,0x01,0xff,0xd5,0xaf,0x00,0xcf,0x86, ++ 0xe5,0x08,0x3f,0xd4,0x70,0xd3,0x38,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd5, ++ 0xb0,0x00,0x01,0xff,0xd5,0xb1,0x00,0x10,0x07,0x01,0xff,0xd5,0xb2,0x00,0x01,0xff, ++ 0xd5,0xb3,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd5,0xb4,0x00,0x01,0xff,0xd5,0xb5, ++ 0x00,0x10,0x07,0x01,0xff,0xd5,0xb6,0x00,0x01,0xff,0xd5,0xb7,0x00,0xd2,0x1c,0xd1, ++ 0x0e,0x10,0x07,0x01,0xff,0xd5,0xb8,0x00,0x01,0xff,0xd5,0xb9,0x00,0x10,0x07,0x01, ++ 0xff,0xd5,0xba,0x00,0x01,0xff,0xd5,0xbb,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd5, ++ 0xbc,0x00,0x01,0xff,0xd5,0xbd,0x00,0x10,0x07,0x01,0xff,0xd5,0xbe,0x00,0x01,0xff, ++ 0xd5,0xbf,0x00,0xe3,0x87,0x3e,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd6,0x80, ++ 0x00,0x01,0xff,0xd6,0x81,0x00,0x10,0x07,0x01,0xff,0xd6,0x82,0x00,0x01,0xff,0xd6, ++ 0x83,0x00,0xd1,0x0e,0x10,0x07,0x01,0xff,0xd6,0x84,0x00,0x01,0xff,0xd6,0x85,0x00, ++ 0x10,0x07,0x01,0xff,0xd6,0x86,0x00,0x00,0x00,0xe0,0x2f,0x3f,0xcf,0x86,0xe5,0xc0, ++ 0x3e,0xe4,0x97,0x3e,0xe3,0x76,0x3e,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0xd5,0xa5,0xd6,0x82,0x00,0xe4,0x3e,0x25,0xe3,0xc3,0x1a, ++ 0xe2,0x7b,0x81,0xe1,0xc0,0x13,0xd0,0x1e,0xcf,0x86,0xc5,0xe4,0x08,0x4b,0xe3,0x53, ++ 0x46,0xe2,0xe9,0x43,0xe1,0x1c,0x43,0xe0,0xe1,0x42,0xcf,0x86,0xe5,0xa6,0x42,0x64, ++ 0x89,0x42,0x0b,0x00,0xcf,0x86,0xe5,0xfa,0x01,0xe4,0x03,0x56,0xe3,0x76,0x01,0xe2, ++ 0x8e,0x53,0xd1,0x0c,0xe0,0xef,0x52,0xcf,0x86,0x65,0x8d,0x52,0x04,0x00,0xe0,0x0d, ++ 0x01,0xcf,0x86,0xd5,0x0a,0xe4,0x10,0x53,0x63,0xff,0x52,0x0a,0x00,0xd4,0x80,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x80,0x00,0x01,0xff,0xe2, ++ 0xb4,0x81,0x00,0x10,0x08,0x01,0xff,0xe2,0xb4,0x82,0x00,0x01,0xff,0xe2,0xb4,0x83, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x84,0x00,0x01,0xff,0xe2,0xb4,0x85, ++ 0x00,0x10,0x08,0x01,0xff,0xe2,0xb4,0x86,0x00,0x01,0xff,0xe2,0xb4,0x87,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x88,0x00,0x01,0xff,0xe2,0xb4,0x89, ++ 0x00,0x10,0x08,0x01,0xff,0xe2,0xb4,0x8a,0x00,0x01,0xff,0xe2,0xb4,0x8b,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x8c,0x00,0x01,0xff,0xe2,0xb4,0x8d,0x00,0x10, ++ 0x08,0x01,0xff,0xe2,0xb4,0x8e,0x00,0x01,0xff,0xe2,0xb4,0x8f,0x00,0xd3,0x40,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x90,0x00,0x01,0xff,0xe2,0xb4,0x91, ++ 0x00,0x10,0x08,0x01,0xff,0xe2,0xb4,0x92,0x00,0x01,0xff,0xe2,0xb4,0x93,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x94,0x00,0x01,0xff,0xe2,0xb4,0x95,0x00,0x10, ++ 0x08,0x01,0xff,0xe2,0xb4,0x96,0x00,0x01,0xff,0xe2,0xb4,0x97,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0x98,0x00,0x01,0xff,0xe2,0xb4,0x99,0x00,0x10, ++ 0x08,0x01,0xff,0xe2,0xb4,0x9a,0x00,0x01,0xff,0xe2,0xb4,0x9b,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe2,0xb4,0x9c,0x00,0x01,0xff,0xe2,0xb4,0x9d,0x00,0x10,0x08,0x01, ++ 0xff,0xe2,0xb4,0x9e,0x00,0x01,0xff,0xe2,0xb4,0x9f,0x00,0xcf,0x86,0xe5,0x42,0x52, ++ 0x94,0x50,0xd3,0x3c,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0xa0,0x00, ++ 0x01,0xff,0xe2,0xb4,0xa1,0x00,0x10,0x08,0x01,0xff,0xe2,0xb4,0xa2,0x00,0x01,0xff, ++ 0xe2,0xb4,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0xb4,0xa4,0x00,0x01,0xff, ++ 0xe2,0xb4,0xa5,0x00,0x10,0x04,0x00,0x00,0x0d,0xff,0xe2,0xb4,0xa7,0x00,0x52,0x04, ++ 0x00,0x00,0x91,0x0c,0x10,0x04,0x00,0x00,0x0d,0xff,0xe2,0xb4,0xad,0x00,0x00,0x00, ++ 0x01,0x00,0xd2,0x1b,0xe1,0xfc,0x52,0xe0,0xad,0x52,0xcf,0x86,0x95,0x0f,0x94,0x0b, ++ 0x93,0x07,0x62,0x92,0x52,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0xd1,0x13,0xe0, ++ 0xd3,0x53,0xcf,0x86,0x95,0x0a,0xe4,0xa8,0x53,0x63,0x97,0x53,0x04,0x00,0x04,0x00, ++ 0xd0,0x0d,0xcf,0x86,0x95,0x07,0x64,0x22,0x54,0x08,0x00,0x04,0x00,0xcf,0x86,0x55, ++ 0x04,0x04,0x00,0x54,0x04,0x04,0x00,0xd3,0x07,0x62,0x2f,0x54,0x04,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8f,0xb0,0x00,0x11,0xff,0xe1,0x8f,0xb1,0x00, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0xb2,0x00,0x11,0xff,0xe1,0x8f,0xb3,0x00,0x91,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0xb4,0x00,0x11,0xff,0xe1,0x8f,0xb5,0x00,0x00,0x00, ++ 0xd4,0x1c,0xe3,0xe0,0x56,0xe2,0x17,0x56,0xe1,0xda,0x55,0xe0,0xbb,0x55,0xcf,0x86, ++ 0x95,0x0a,0xe4,0xa4,0x55,0x63,0x88,0x55,0x04,0x00,0x04,0x00,0xe3,0xd2,0x01,0xe2, ++ 0x2b,0x5a,0xd1,0x0c,0xe0,0x4c,0x59,0xcf,0x86,0x65,0x25,0x59,0x0a,0x00,0xe0,0x9c, ++ 0x59,0xcf,0x86,0xd5,0xc5,0xd4,0x45,0xd3,0x31,0xd2,0x1c,0xd1,0x0e,0x10,0x07,0x12, ++ 0xff,0xd0,0xb2,0x00,0x12,0xff,0xd0,0xb4,0x00,0x10,0x07,0x12,0xff,0xd0,0xbe,0x00, ++ 0x12,0xff,0xd1,0x81,0x00,0x51,0x07,0x12,0xff,0xd1,0x82,0x00,0x10,0x07,0x12,0xff, ++ 0xd1,0x8a,0x00,0x12,0xff,0xd1,0xa3,0x00,0x92,0x10,0x91,0x0c,0x10,0x08,0x12,0xff, ++ 0xea,0x99,0x8b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x14,0xff,0xe1,0x83,0x90,0x00,0x14,0xff,0xe1,0x83,0x91,0x00,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0x92,0x00,0x14,0xff,0xe1,0x83,0x93,0x00,0xd1,0x10,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0x94,0x00,0x14,0xff,0xe1,0x83,0x95,0x00,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0x96,0x00,0x14,0xff,0xe1,0x83,0x97,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0x98,0x00,0x14,0xff,0xe1,0x83,0x99,0x00,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0x9a,0x00,0x14,0xff,0xe1,0x83,0x9b,0x00,0xd1,0x10,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0x9c,0x00,0x14,0xff,0xe1,0x83,0x9d,0x00,0x10,0x08,0x14,0xff,0xe1,0x83, ++ 0x9e,0x00,0x14,0xff,0xe1,0x83,0x9f,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x14,0xff,0xe1,0x83,0xa0,0x00,0x14,0xff,0xe1,0x83,0xa1,0x00,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0xa2,0x00,0x14,0xff,0xe1,0x83,0xa3,0x00,0xd1,0x10,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0xa4,0x00,0x14,0xff,0xe1,0x83,0xa5,0x00,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xa6,0x00,0x14,0xff,0xe1,0x83,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0xa8,0x00,0x14,0xff,0xe1,0x83,0xa9,0x00,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xaa,0x00,0x14,0xff,0xe1,0x83,0xab,0x00,0xd1,0x10,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xac,0x00,0x14,0xff,0xe1,0x83,0xad,0x00,0x10,0x08,0x14,0xff,0xe1,0x83, ++ 0xae,0x00,0x14,0xff,0xe1,0x83,0xaf,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x14,0xff,0xe1,0x83,0xb0,0x00,0x14,0xff,0xe1,0x83,0xb1,0x00,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xb2,0x00,0x14,0xff,0xe1,0x83,0xb3,0x00,0xd1,0x10,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xb4,0x00,0x14,0xff,0xe1,0x83,0xb5,0x00,0x10,0x08,0x14,0xff,0xe1,0x83, ++ 0xb6,0x00,0x14,0xff,0xe1,0x83,0xb7,0x00,0xd2,0x1c,0xd1,0x10,0x10,0x08,0x14,0xff, ++ 0xe1,0x83,0xb8,0x00,0x14,0xff,0xe1,0x83,0xb9,0x00,0x10,0x08,0x14,0xff,0xe1,0x83, ++ 0xba,0x00,0x00,0x00,0xd1,0x0c,0x10,0x04,0x00,0x00,0x14,0xff,0xe1,0x83,0xbd,0x00, ++ 0x10,0x08,0x14,0xff,0xe1,0x83,0xbe,0x00,0x14,0xff,0xe1,0x83,0xbf,0x00,0xe2,0x9d, ++ 0x08,0xe1,0x48,0x04,0xe0,0x1c,0x02,0xcf,0x86,0xe5,0x11,0x01,0xd4,0x84,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x61,0xcc,0xa5,0x00,0x01,0xff,0x61,0xcc, ++ 0xa5,0x00,0x10,0x08,0x01,0xff,0x62,0xcc,0x87,0x00,0x01,0xff,0x62,0xcc,0x87,0x00, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x62,0xcc,0xa3,0x00,0x01,0xff,0x62,0xcc,0xa3,0x00, ++ 0x10,0x08,0x01,0xff,0x62,0xcc,0xb1,0x00,0x01,0xff,0x62,0xcc,0xb1,0x00,0xd2,0x24, ++ 0xd1,0x14,0x10,0x0a,0x01,0xff,0x63,0xcc,0xa7,0xcc,0x81,0x00,0x01,0xff,0x63,0xcc, ++ 0xa7,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x64,0xcc,0x87,0x00,0x01,0xff,0x64,0xcc, ++ 0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x64,0xcc,0xa3,0x00,0x01,0xff,0x64,0xcc, ++ 0xa3,0x00,0x10,0x08,0x01,0xff,0x64,0xcc,0xb1,0x00,0x01,0xff,0x64,0xcc,0xb1,0x00, ++ 0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x64,0xcc,0xa7,0x00,0x01,0xff, ++ 0x64,0xcc,0xa7,0x00,0x10,0x08,0x01,0xff,0x64,0xcc,0xad,0x00,0x01,0xff,0x64,0xcc, ++ 0xad,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x65,0xcc,0x84,0xcc,0x80,0x00,0x01,0xff, ++ 0x65,0xcc,0x84,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x65,0xcc,0x84,0xcc,0x81,0x00, ++ 0x01,0xff,0x65,0xcc,0x84,0xcc,0x81,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x65,0xcc,0xad,0x00,0x01,0xff,0x65,0xcc,0xad,0x00,0x10,0x08,0x01,0xff,0x65,0xcc, ++ 0xb0,0x00,0x01,0xff,0x65,0xcc,0xb0,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x65,0xcc, ++ 0xa7,0xcc,0x86,0x00,0x01,0xff,0x65,0xcc,0xa7,0xcc,0x86,0x00,0x10,0x08,0x01,0xff, ++ 0x66,0xcc,0x87,0x00,0x01,0xff,0x66,0xcc,0x87,0x00,0xd4,0x84,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x67,0xcc,0x84,0x00,0x01,0xff,0x67,0xcc,0x84,0x00, ++ 0x10,0x08,0x01,0xff,0x68,0xcc,0x87,0x00,0x01,0xff,0x68,0xcc,0x87,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0x68,0xcc,0xa3,0x00,0x01,0xff,0x68,0xcc,0xa3,0x00,0x10,0x08, ++ 0x01,0xff,0x68,0xcc,0x88,0x00,0x01,0xff,0x68,0xcc,0x88,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0x68,0xcc,0xa7,0x00,0x01,0xff,0x68,0xcc,0xa7,0x00,0x10,0x08, ++ 0x01,0xff,0x68,0xcc,0xae,0x00,0x01,0xff,0x68,0xcc,0xae,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0x69,0xcc,0xb0,0x00,0x01,0xff,0x69,0xcc,0xb0,0x00,0x10,0x0a,0x01,0xff, ++ 0x69,0xcc,0x88,0xcc,0x81,0x00,0x01,0xff,0x69,0xcc,0x88,0xcc,0x81,0x00,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x6b,0xcc,0x81,0x00,0x01,0xff,0x6b,0xcc, ++ 0x81,0x00,0x10,0x08,0x01,0xff,0x6b,0xcc,0xa3,0x00,0x01,0xff,0x6b,0xcc,0xa3,0x00, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x6b,0xcc,0xb1,0x00,0x01,0xff,0x6b,0xcc,0xb1,0x00, ++ 0x10,0x08,0x01,0xff,0x6c,0xcc,0xa3,0x00,0x01,0xff,0x6c,0xcc,0xa3,0x00,0xd2,0x24, ++ 0xd1,0x14,0x10,0x0a,0x01,0xff,0x6c,0xcc,0xa3,0xcc,0x84,0x00,0x01,0xff,0x6c,0xcc, ++ 0xa3,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x6c,0xcc,0xb1,0x00,0x01,0xff,0x6c,0xcc, ++ 0xb1,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6c,0xcc,0xad,0x00,0x01,0xff,0x6c,0xcc, ++ 0xad,0x00,0x10,0x08,0x01,0xff,0x6d,0xcc,0x81,0x00,0x01,0xff,0x6d,0xcc,0x81,0x00, ++ 0xcf,0x86,0xe5,0x15,0x01,0xd4,0x88,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x6d,0xcc,0x87,0x00,0x01,0xff,0x6d,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x6d, ++ 0xcc,0xa3,0x00,0x01,0xff,0x6d,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6e, ++ 0xcc,0x87,0x00,0x01,0xff,0x6e,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x6e,0xcc,0xa3, ++ 0x00,0x01,0xff,0x6e,0xcc,0xa3,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x6e, ++ 0xcc,0xb1,0x00,0x01,0xff,0x6e,0xcc,0xb1,0x00,0x10,0x08,0x01,0xff,0x6e,0xcc,0xad, ++ 0x00,0x01,0xff,0x6e,0xcc,0xad,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x83, ++ 0xcc,0x81,0x00,0x01,0xff,0x6f,0xcc,0x83,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x6f, ++ 0xcc,0x83,0xcc,0x88,0x00,0x01,0xff,0x6f,0xcc,0x83,0xcc,0x88,0x00,0xd3,0x48,0xd2, ++ 0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x84,0xcc,0x80,0x00,0x01,0xff,0x6f, ++ 0xcc,0x84,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x84,0xcc,0x81,0x00,0x01, ++ 0xff,0x6f,0xcc,0x84,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x70,0xcc,0x81, ++ 0x00,0x01,0xff,0x70,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x70,0xcc,0x87,0x00,0x01, ++ 0xff,0x70,0xcc,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x72,0xcc,0x87, ++ 0x00,0x01,0xff,0x72,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x72,0xcc,0xa3,0x00,0x01, ++ 0xff,0x72,0xcc,0xa3,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x72,0xcc,0xa3,0xcc,0x84, ++ 0x00,0x01,0xff,0x72,0xcc,0xa3,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x72,0xcc,0xb1, ++ 0x00,0x01,0xff,0x72,0xcc,0xb1,0x00,0xd4,0x8c,0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x73,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x87,0x00,0x10,0x08,0x01, ++ 0xff,0x73,0xcc,0xa3,0x00,0x01,0xff,0x73,0xcc,0xa3,0x00,0xd1,0x14,0x10,0x0a,0x01, ++ 0xff,0x73,0xcc,0x81,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x81,0xcc,0x87,0x00,0x10, ++ 0x0a,0x01,0xff,0x73,0xcc,0x8c,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x8c,0xcc,0x87, ++ 0x00,0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x73,0xcc,0xa3,0xcc,0x87,0x00,0x01, ++ 0xff,0x73,0xcc,0xa3,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x74,0xcc,0x87,0x00,0x01, ++ 0xff,0x74,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x74,0xcc,0xa3,0x00,0x01, ++ 0xff,0x74,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x74,0xcc,0xb1,0x00,0x01,0xff,0x74, ++ 0xcc,0xb1,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x74,0xcc,0xad, ++ 0x00,0x01,0xff,0x74,0xcc,0xad,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0xa4,0x00,0x01, ++ 0xff,0x75,0xcc,0xa4,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc,0xb0,0x00,0x01, ++ 0xff,0x75,0xcc,0xb0,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0xad,0x00,0x01,0xff,0x75, ++ 0xcc,0xad,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x75,0xcc,0x83,0xcc,0x81, ++ 0x00,0x01,0xff,0x75,0xcc,0x83,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x84, ++ 0xcc,0x88,0x00,0x01,0xff,0x75,0xcc,0x84,0xcc,0x88,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x76,0xcc,0x83,0x00,0x01,0xff,0x76,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x76, ++ 0xcc,0xa3,0x00,0x01,0xff,0x76,0xcc,0xa3,0x00,0xe0,0x11,0x02,0xcf,0x86,0xd5,0xe2, ++ 0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x80,0x00, ++ 0x01,0xff,0x77,0xcc,0x80,0x00,0x10,0x08,0x01,0xff,0x77,0xcc,0x81,0x00,0x01,0xff, ++ 0x77,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x88,0x00,0x01,0xff, ++ 0x77,0xcc,0x88,0x00,0x10,0x08,0x01,0xff,0x77,0xcc,0x87,0x00,0x01,0xff,0x77,0xcc, ++ 0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0xa3,0x00,0x01,0xff, ++ 0x77,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x78,0xcc,0x87,0x00,0x01,0xff,0x78,0xcc, ++ 0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x78,0xcc,0x88,0x00,0x01,0xff,0x78,0xcc, ++ 0x88,0x00,0x10,0x08,0x01,0xff,0x79,0xcc,0x87,0x00,0x01,0xff,0x79,0xcc,0x87,0x00, ++ 0xd3,0x33,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x7a,0xcc,0x82,0x00,0x01,0xff, ++ 0x7a,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x7a,0xcc,0xa3,0x00,0x01,0xff,0x7a,0xcc, ++ 0xa3,0x00,0xe1,0x12,0x59,0x10,0x08,0x01,0xff,0x7a,0xcc,0xb1,0x00,0x01,0xff,0x7a, ++ 0xcc,0xb1,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x8a,0x00,0x01, ++ 0xff,0x79,0xcc,0x8a,0x00,0x10,0x08,0x01,0xff,0x61,0xca,0xbe,0x00,0x02,0xff,0x73, ++ 0xcc,0x87,0x00,0x51,0x04,0x0a,0x00,0x10,0x07,0x0a,0xff,0x73,0x73,0x00,0x0a,0x00, ++ 0xd4,0x98,0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x61,0xcc,0xa3,0x00, ++ 0x01,0xff,0x61,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x61,0xcc,0x89,0x00,0x01,0xff, ++ 0x61,0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x61,0xcc,0x82,0xcc,0x81,0x00, ++ 0x01,0xff,0x61,0xcc,0x82,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x61,0xcc,0x82,0xcc, ++ 0x80,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x80,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a, ++ 0x01,0xff,0x61,0xcc,0x82,0xcc,0x89,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x89,0x00, ++ 0x10,0x0a,0x01,0xff,0x61,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc, ++ 0x83,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x61,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff, ++ 0x61,0xcc,0xa3,0xcc,0x82,0x00,0x10,0x0a,0x01,0xff,0x61,0xcc,0x86,0xcc,0x81,0x00, ++ 0x01,0xff,0x61,0xcc,0x86,0xcc,0x81,0x00,0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a, ++ 0x01,0xff,0x61,0xcc,0x86,0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x86,0xcc,0x80,0x00, ++ 0x10,0x0a,0x01,0xff,0x61,0xcc,0x86,0xcc,0x89,0x00,0x01,0xff,0x61,0xcc,0x86,0xcc, ++ 0x89,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x61,0xcc,0x86,0xcc,0x83,0x00,0x01,0xff, ++ 0x61,0xcc,0x86,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x61,0xcc,0xa3,0xcc,0x86,0x00, ++ 0x01,0xff,0x61,0xcc,0xa3,0xcc,0x86,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x65,0xcc,0xa3,0x00,0x01,0xff,0x65,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x65,0xcc, ++ 0x89,0x00,0x01,0xff,0x65,0xcc,0x89,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc, ++ 0x83,0x00,0x01,0xff,0x65,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x65,0xcc,0x82,0xcc, ++ 0x81,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x81,0x00,0xcf,0x86,0xe5,0x31,0x01,0xd4, ++ 0x90,0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x65,0xcc,0x82,0xcc,0x80, ++ 0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x65,0xcc,0x82, ++ 0xcc,0x89,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a,0x01, ++ 0xff,0x65,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x83,0x00,0x10, ++ 0x0a,0x01,0xff,0x65,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff,0x65,0xcc,0xa3,0xcc,0x82, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x89,0x00,0x01,0xff,0x69, ++ 0xcc,0x89,0x00,0x10,0x08,0x01,0xff,0x69,0xcc,0xa3,0x00,0x01,0xff,0x69,0xcc,0xa3, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0xa3,0x00,0x01,0xff,0x6f,0xcc,0xa3, ++ 0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x89,0x00,0xd3, ++ 0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x81,0x00,0x01, ++ 0xff,0x6f,0xcc,0x82,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x80, ++ 0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x80,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f, ++ 0xcc,0x82,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x89,0x00,0x10,0x0a,0x01, ++ 0xff,0x6f,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x83,0x00,0xd2, ++ 0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff,0x6f, ++ 0xcc,0xa3,0xcc,0x82,0x00,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x81,0x00,0x01, ++ 0xff,0x6f,0xcc,0x9b,0xcc,0x81,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x9b, ++ 0xcc,0x80,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x6f, ++ 0xcc,0x9b,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x89,0x00,0xd4,0x98,0xd3, ++ 0x48,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x83,0x00,0x01, ++ 0xff,0x6f,0xcc,0x9b,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0xa3, ++ 0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x75, ++ 0xcc,0xa3,0x00,0x01,0xff,0x75,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0x89, ++ 0x00,0x01,0xff,0x75,0xcc,0x89,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x75, ++ 0xcc,0x9b,0xcc,0x81,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x81,0x00,0x10,0x0a,0x01, ++ 0xff,0x75,0xcc,0x9b,0xcc,0x80,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x80,0x00,0xd1, ++ 0x14,0x10,0x0a,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x89,0x00,0x01,0xff,0x75,0xcc,0x9b, ++ 0xcc,0x89,0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x83,0x00,0x01,0xff,0x75, ++ 0xcc,0x9b,0xcc,0x83,0x00,0xd3,0x44,0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x75, ++ 0xcc,0x9b,0xcc,0xa3,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0xa3,0x00,0x10,0x08,0x01, ++ 0xff,0x79,0xcc,0x80,0x00,0x01,0xff,0x79,0xcc,0x80,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x79,0xcc,0xa3,0x00,0x01,0xff,0x79,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x79, ++ 0xcc,0x89,0x00,0x01,0xff,0x79,0xcc,0x89,0x00,0xd2,0x1c,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x79,0xcc,0x83,0x00,0x01,0xff,0x79,0xcc,0x83,0x00,0x10,0x08,0x0a,0xff,0xe1, ++ 0xbb,0xbb,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xe1,0xbb,0xbd,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xe1,0xbb,0xbf,0x00,0x0a,0x00,0xe1,0xbf,0x02,0xe0,0xa1, ++ 0x01,0xcf,0x86,0xd5,0xc6,0xd4,0x6c,0xd3,0x18,0xe2,0x0e,0x59,0xe1,0xf7,0x58,0x10, ++ 0x09,0x01,0xff,0xce,0xb1,0xcc,0x93,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0x00,0xd2, ++ 0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x93,0x00,0x01,0xff,0xce,0xb1, ++ 0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff, ++ 0xce,0xb1,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc, ++ 0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01, ++ 0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcd,0x82, ++ 0x00,0xd3,0x18,0xe2,0x4a,0x59,0xe1,0x33,0x59,0x10,0x09,0x01,0xff,0xce,0xb5,0xcc, ++ 0x93,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01, ++ 0xff,0xce,0xb5,0xcc,0x93,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0x00,0x10,0x0b,0x01, ++ 0xff,0xce,0xb5,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0xcc,0x80, ++ 0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xce,0xb5,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff, ++ 0xce,0xb5,0xcc,0x94,0xcc,0x81,0x00,0x00,0x00,0xd4,0x6c,0xd3,0x18,0xe2,0x74,0x59, ++ 0xe1,0x5d,0x59,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc,0x93,0x00,0x01,0xff,0xce,0xb7, ++ 0xcc,0x94,0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc,0x93,0x00, ++ 0x01,0xff,0xce,0xb7,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc, ++ 0x80,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01, ++ 0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x81, ++ 0x00,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb7, ++ 0xcc,0x94,0xcd,0x82,0x00,0xd3,0x18,0xe2,0xb0,0x59,0xe1,0x99,0x59,0x10,0x09,0x01, ++ 0xff,0xce,0xb9,0xcc,0x93,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0x00,0xd2,0x28,0xd1, ++ 0x12,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x93,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94, ++ 0x00,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xb9, ++ 0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc,0x93,0xcc, ++ 0x81,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xce, ++ 0xb9,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0xcd,0x82,0x00,0xcf, ++ 0x86,0xd5,0xac,0xd4,0x5a,0xd3,0x18,0xe2,0xed,0x59,0xe1,0xd6,0x59,0x10,0x09,0x01, ++ 0xff,0xce,0xbf,0xcc,0x93,0x00,0x01,0xff,0xce,0xbf,0xcc,0x94,0x00,0xd2,0x28,0xd1, ++ 0x12,0x10,0x09,0x01,0xff,0xce,0xbf,0xcc,0x93,0x00,0x01,0xff,0xce,0xbf,0xcc,0x94, ++ 0x00,0x10,0x0b,0x01,0xff,0xce,0xbf,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xbf, ++ 0xcc,0x94,0xcc,0x80,0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xce,0xbf,0xcc,0x93,0xcc, ++ 0x81,0x00,0x01,0xff,0xce,0xbf,0xcc,0x94,0xcc,0x81,0x00,0x00,0x00,0xd3,0x18,0xe2, ++ 0x17,0x5a,0xe1,0x00,0x5a,0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x93,0x00,0x01,0xff, ++ 0xcf,0x85,0xcc,0x94,0x00,0xd2,0x1c,0xd1,0x0d,0x10,0x04,0x00,0x00,0x01,0xff,0xcf, ++ 0x85,0xcc,0x94,0x00,0x10,0x04,0x00,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcc,0x80, ++ 0x00,0xd1,0x0f,0x10,0x04,0x00,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcc,0x81,0x00, ++ 0x10,0x04,0x00,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcd,0x82,0x00,0xe4,0xd3,0x5a, ++ 0xd3,0x18,0xe2,0x52,0x5a,0xe1,0x3b,0x5a,0x10,0x09,0x01,0xff,0xcf,0x89,0xcc,0x93, ++ 0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff, ++ 0xcf,0x89,0xcc,0x93,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff, ++ 0xcf,0x89,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc,0x80,0x00, ++ 0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xcf, ++ 0x89,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x82, ++ 0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd,0x82,0x00,0xe0,0xd9,0x02,0xcf,0x86,0xe5, ++ 0x91,0x01,0xd4,0xc8,0xd3,0x64,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb1, ++ 0xcc,0x93,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xce,0xb9,0x00,0x10,0x0d, ++ 0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xcc, ++ 0x94,0xcc,0x80,0xce,0xb9,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93, ++ 0xcc,0x81,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x81,0xce,0xb9,0x00, ++ 0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82,0xce,0xb9,0x00,0x01,0xff,0xce, ++ 0xb1,0xcc,0x94,0xcd,0x82,0xce,0xb9,0x00,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff, ++ 0xce,0xb1,0xcc,0x93,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xce,0xb9,0x00, ++ 0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xce, ++ 0xb1,0xcc,0x94,0xcc,0x80,0xce,0xb9,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xce,0xb1, ++ 0xcc,0x93,0xcc,0x81,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x81,0xce, ++ 0xb9,0x00,0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82,0xce,0xb9,0x00,0x01, ++ 0xff,0xce,0xb1,0xcc,0x94,0xcd,0x82,0xce,0xb9,0x00,0xd3,0x64,0xd2,0x30,0xd1,0x16, ++ 0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xcc, ++ 0x94,0xce,0xb9,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x80,0xce,0xb9, ++ 0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80,0xce,0xb9,0x00,0xd1,0x1a,0x10,0x0d, ++ 0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xcc, ++ 0x94,0xcc,0x81,0xce,0xb9,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcd,0x82, ++ 0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x82,0xce,0xb9,0x00,0xd2,0x30, ++ 0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xce,0xb9,0x00,0x01,0xff,0xce, ++ 0xb7,0xcc,0x94,0xce,0xb9,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x80, ++ 0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80,0xce,0xb9,0x00,0xd1,0x1a, ++ 0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0xce,0xb9,0x00,0x01,0xff,0xce, ++ 0xb7,0xcc,0x94,0xcc,0x81,0xce,0xb9,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93, ++ 0xcd,0x82,0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x82,0xce,0xb9,0x00, ++ 0xd4,0xc8,0xd3,0x64,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93, ++ 0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xce,0xb9,0x00,0x10,0x0d,0x01,0xff, ++ 0xcf,0x89,0xcc,0x93,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc, ++ 0x80,0xce,0xb9,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x81, ++ 0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc,0x81,0xce,0xb9,0x00,0x10,0x0d, ++ 0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x82,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc, ++ 0x94,0xcd,0x82,0xce,0xb9,0x00,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x89, ++ 0xcc,0x93,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xce,0xb9,0x00,0x10,0x0d, ++ 0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc, ++ 0x94,0xcc,0x80,0xce,0xb9,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93, ++ 0xcc,0x81,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc,0x81,0xce,0xb9,0x00, ++ 0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x82,0xce,0xb9,0x00,0x01,0xff,0xcf, ++ 0x89,0xcc,0x94,0xcd,0x82,0xce,0xb9,0x00,0xd3,0x49,0xd2,0x26,0xd1,0x12,0x10,0x09, ++ 0x01,0xff,0xce,0xb1,0xcc,0x86,0x00,0x01,0xff,0xce,0xb1,0xcc,0x84,0x00,0x10,0x0b, ++ 0x01,0xff,0xce,0xb1,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xce,0xb1,0xce,0xb9,0x00, ++ 0xd1,0x0f,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x81,0xce,0xb9,0x00,0x00,0x00,0x10, ++ 0x09,0x01,0xff,0xce,0xb1,0xcd,0x82,0x00,0x01,0xff,0xce,0xb1,0xcd,0x82,0xce,0xb9, ++ 0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x86,0x00,0x01,0xff, ++ 0xce,0xb1,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x80,0x00,0x01,0xff, ++ 0xce,0xb1,0xcc,0x81,0x00,0xe1,0xf3,0x5a,0x10,0x09,0x01,0xff,0xce,0xb1,0xce,0xb9, ++ 0x00,0x01,0x00,0xcf,0x86,0xd5,0xbd,0xd4,0x7e,0xd3,0x44,0xd2,0x21,0xd1,0x0d,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0xc2,0xa8,0xcd,0x82,0x00,0x10,0x0b,0x01,0xff,0xce,0xb7, ++ 0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xce,0xb7,0xce,0xb9,0x00,0xd1,0x0f,0x10,0x0b, ++ 0x01,0xff,0xce,0xb7,0xcc,0x81,0xce,0xb9,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xce, ++ 0xb7,0xcd,0x82,0x00,0x01,0xff,0xce,0xb7,0xcd,0x82,0xce,0xb9,0x00,0xd2,0x24,0xd1, ++ 0x12,0x10,0x09,0x01,0xff,0xce,0xb5,0xcc,0x80,0x00,0x01,0xff,0xce,0xb5,0xcc,0x81, ++ 0x00,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc,0x80,0x00,0x01,0xff,0xce,0xb7,0xcc,0x81, ++ 0x00,0xe1,0x02,0x5b,0x10,0x09,0x01,0xff,0xce,0xb7,0xce,0xb9,0x00,0x01,0xff,0xe1, ++ 0xbe,0xbf,0xcc,0x80,0x00,0xd3,0x18,0xe2,0x28,0x5b,0xe1,0x11,0x5b,0x10,0x09,0x01, ++ 0xff,0xce,0xb9,0xcc,0x86,0x00,0x01,0xff,0xce,0xb9,0xcc,0x84,0x00,0xe2,0x4c,0x5b, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x86,0x00,0x01,0xff,0xce,0xb9,0xcc, ++ 0x84,0x00,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x80,0x00,0x01,0xff,0xce,0xb9,0xcc, ++ 0x81,0x00,0xd4,0x51,0xd3,0x18,0xe2,0x6f,0x5b,0xe1,0x58,0x5b,0x10,0x09,0x01,0xff, ++ 0xcf,0x85,0xcc,0x86,0x00,0x01,0xff,0xcf,0x85,0xcc,0x84,0x00,0xd2,0x24,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x86,0x00,0x01,0xff,0xcf,0x85,0xcc,0x84,0x00, ++ 0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x80,0x00,0x01,0xff,0xcf,0x85,0xcc,0x81,0x00, ++ 0xe1,0x8f,0x5b,0x10,0x09,0x01,0xff,0xcf,0x81,0xcc,0x94,0x00,0x01,0xff,0xc2,0xa8, ++ 0xcc,0x80,0x00,0xd3,0x3b,0xd2,0x18,0x51,0x04,0x00,0x00,0x10,0x0b,0x01,0xff,0xcf, ++ 0x89,0xcc,0x80,0xce,0xb9,0x00,0x01,0xff,0xcf,0x89,0xce,0xb9,0x00,0xd1,0x0f,0x10, ++ 0x0b,0x01,0xff,0xcf,0x89,0xcc,0x81,0xce,0xb9,0x00,0x00,0x00,0x10,0x09,0x01,0xff, ++ 0xcf,0x89,0xcd,0x82,0x00,0x01,0xff,0xcf,0x89,0xcd,0x82,0xce,0xb9,0x00,0xd2,0x24, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xbf,0xcc,0x80,0x00,0x01,0xff,0xce,0xbf,0xcc, ++ 0x81,0x00,0x10,0x09,0x01,0xff,0xcf,0x89,0xcc,0x80,0x00,0x01,0xff,0xcf,0x89,0xcc, ++ 0x81,0x00,0xe1,0x99,0x5b,0x10,0x09,0x01,0xff,0xcf,0x89,0xce,0xb9,0x00,0x01,0xff, ++ 0xc2,0xb4,0x00,0xe0,0x0c,0x68,0xcf,0x86,0xe5,0x23,0x02,0xe4,0x25,0x01,0xe3,0x85, ++ 0x5e,0xd2,0x2a,0xe1,0x5f,0x5c,0xe0,0xdd,0x5b,0xcf,0x86,0xe5,0xbb,0x5b,0x94,0x1b, ++ 0xe3,0xa4,0x5b,0x92,0x14,0x91,0x10,0x10,0x08,0x01,0xff,0xe2,0x80,0x82,0x00,0x01, ++ 0xff,0xe2,0x80,0x83,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd1,0xd6,0xd0,0x46,0xcf, ++ 0x86,0x55,0x04,0x01,0x00,0xd4,0x29,0xd3,0x13,0x52,0x04,0x01,0x00,0x51,0x04,0x01, ++ 0x00,0x10,0x07,0x01,0xff,0xcf,0x89,0x00,0x01,0x00,0x92,0x12,0x51,0x04,0x01,0x00, ++ 0x10,0x06,0x01,0xff,0x6b,0x00,0x01,0xff,0x61,0xcc,0x8a,0x00,0x01,0x00,0xe3,0x25, ++ 0x5d,0x92,0x10,0x51,0x04,0x01,0x00,0x10,0x08,0x01,0xff,0xe2,0x85,0x8e,0x00,0x01, ++ 0x00,0x01,0x00,0xcf,0x86,0xd5,0x0a,0xe4,0x42,0x5d,0x63,0x2d,0x5d,0x06,0x00,0x94, ++ 0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x85,0xb0,0x00,0x01, ++ 0xff,0xe2,0x85,0xb1,0x00,0x10,0x08,0x01,0xff,0xe2,0x85,0xb2,0x00,0x01,0xff,0xe2, ++ 0x85,0xb3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x85,0xb4,0x00,0x01,0xff,0xe2, ++ 0x85,0xb5,0x00,0x10,0x08,0x01,0xff,0xe2,0x85,0xb6,0x00,0x01,0xff,0xe2,0x85,0xb7, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x85,0xb8,0x00,0x01,0xff,0xe2, ++ 0x85,0xb9,0x00,0x10,0x08,0x01,0xff,0xe2,0x85,0xba,0x00,0x01,0xff,0xe2,0x85,0xbb, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x85,0xbc,0x00,0x01,0xff,0xe2,0x85,0xbd, ++ 0x00,0x10,0x08,0x01,0xff,0xe2,0x85,0xbe,0x00,0x01,0xff,0xe2,0x85,0xbf,0x00,0x01, ++ 0x00,0xe0,0x34,0x5d,0xcf,0x86,0xe5,0x13,0x5d,0xe4,0xf2,0x5c,0xe3,0xe1,0x5c,0xe2, ++ 0xd4,0x5c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x04,0xff,0xe2,0x86,0x84,0x00, ++ 0xe3,0x23,0x61,0xe2,0xf0,0x60,0xd1,0x0c,0xe0,0x9d,0x60,0xcf,0x86,0x65,0x7e,0x60, ++ 0x01,0x00,0xd0,0x62,0xcf,0x86,0x55,0x04,0x01,0x00,0x54,0x04,0x01,0x00,0xd3,0x18, ++ 0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x08,0x01,0xff,0xe2,0x93,0x90,0x00, ++ 0x01,0xff,0xe2,0x93,0x91,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x93, ++ 0x92,0x00,0x01,0xff,0xe2,0x93,0x93,0x00,0x10,0x08,0x01,0xff,0xe2,0x93,0x94,0x00, ++ 0x01,0xff,0xe2,0x93,0x95,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe2,0x93,0x96,0x00, ++ 0x01,0xff,0xe2,0x93,0x97,0x00,0x10,0x08,0x01,0xff,0xe2,0x93,0x98,0x00,0x01,0xff, ++ 0xe2,0x93,0x99,0x00,0xcf,0x86,0xe5,0x57,0x60,0x94,0x80,0xd3,0x40,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe2,0x93,0x9a,0x00,0x01,0xff,0xe2,0x93,0x9b,0x00,0x10, ++ 0x08,0x01,0xff,0xe2,0x93,0x9c,0x00,0x01,0xff,0xe2,0x93,0x9d,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe2,0x93,0x9e,0x00,0x01,0xff,0xe2,0x93,0x9f,0x00,0x10,0x08,0x01, ++ 0xff,0xe2,0x93,0xa0,0x00,0x01,0xff,0xe2,0x93,0xa1,0x00,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe2,0x93,0xa2,0x00,0x01,0xff,0xe2,0x93,0xa3,0x00,0x10,0x08,0x01, ++ 0xff,0xe2,0x93,0xa4,0x00,0x01,0xff,0xe2,0x93,0xa5,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe2,0x93,0xa6,0x00,0x01,0xff,0xe2,0x93,0xa7,0x00,0x10,0x08,0x01,0xff,0xe2, ++ 0x93,0xa8,0x00,0x01,0xff,0xe2,0x93,0xa9,0x00,0x01,0x00,0xd4,0x0c,0xe3,0x33,0x62, ++ 0xe2,0x2c,0x62,0xcf,0x06,0x04,0x00,0xe3,0x0c,0x65,0xe2,0xff,0x63,0xe1,0x2e,0x02, ++ 0xe0,0x84,0x01,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x08,0xff,0xe2,0xb0,0xb0,0x00,0x08,0xff,0xe2,0xb0,0xb1,0x00,0x10,0x08, ++ 0x08,0xff,0xe2,0xb0,0xb2,0x00,0x08,0xff,0xe2,0xb0,0xb3,0x00,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe2,0xb0,0xb4,0x00,0x08,0xff,0xe2,0xb0,0xb5,0x00,0x10,0x08,0x08,0xff, ++ 0xe2,0xb0,0xb6,0x00,0x08,0xff,0xe2,0xb0,0xb7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe2,0xb0,0xb8,0x00,0x08,0xff,0xe2,0xb0,0xb9,0x00,0x10,0x08,0x08,0xff, ++ 0xe2,0xb0,0xba,0x00,0x08,0xff,0xe2,0xb0,0xbb,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe2,0xb0,0xbc,0x00,0x08,0xff,0xe2,0xb0,0xbd,0x00,0x10,0x08,0x08,0xff,0xe2,0xb0, ++ 0xbe,0x00,0x08,0xff,0xe2,0xb0,0xbf,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe2,0xb1,0x80,0x00,0x08,0xff,0xe2,0xb1,0x81,0x00,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x82,0x00,0x08,0xff,0xe2,0xb1,0x83,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x84,0x00,0x08,0xff,0xe2,0xb1,0x85,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x86,0x00,0x08,0xff,0xe2,0xb1,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x88,0x00,0x08,0xff,0xe2,0xb1,0x89,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x8a,0x00,0x08,0xff,0xe2,0xb1,0x8b,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x8c,0x00,0x08,0xff,0xe2,0xb1,0x8d,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1,0x8e,0x00, ++ 0x08,0xff,0xe2,0xb1,0x8f,0x00,0x94,0x7c,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe2,0xb1,0x90,0x00,0x08,0xff,0xe2,0xb1,0x91,0x00,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x92,0x00,0x08,0xff,0xe2,0xb1,0x93,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x94,0x00,0x08,0xff,0xe2,0xb1,0x95,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x96,0x00,0x08,0xff,0xe2,0xb1,0x97,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe2,0xb1,0x98,0x00,0x08,0xff,0xe2,0xb1,0x99,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x9a,0x00,0x08,0xff,0xe2,0xb1,0x9b,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe2,0xb1, ++ 0x9c,0x00,0x08,0xff,0xe2,0xb1,0x9d,0x00,0x10,0x08,0x08,0xff,0xe2,0xb1,0x9e,0x00, ++ 0x00,0x00,0x08,0x00,0xcf,0x86,0xd5,0x07,0x64,0xef,0x61,0x08,0x00,0xd4,0x63,0xd3, ++ 0x32,0xd2,0x1b,0xd1,0x0c,0x10,0x08,0x09,0xff,0xe2,0xb1,0xa1,0x00,0x09,0x00,0x10, ++ 0x07,0x09,0xff,0xc9,0xab,0x00,0x09,0xff,0xe1,0xb5,0xbd,0x00,0xd1,0x0b,0x10,0x07, ++ 0x09,0xff,0xc9,0xbd,0x00,0x09,0x00,0x10,0x04,0x09,0x00,0x09,0xff,0xe2,0xb1,0xa8, ++ 0x00,0xd2,0x18,0xd1,0x0c,0x10,0x04,0x09,0x00,0x09,0xff,0xe2,0xb1,0xaa,0x00,0x10, ++ 0x04,0x09,0x00,0x09,0xff,0xe2,0xb1,0xac,0x00,0xd1,0x0b,0x10,0x04,0x09,0x00,0x0a, ++ 0xff,0xc9,0x91,0x00,0x10,0x07,0x0a,0xff,0xc9,0xb1,0x00,0x0a,0xff,0xc9,0x90,0x00, ++ 0xd3,0x27,0xd2,0x17,0xd1,0x0b,0x10,0x07,0x0b,0xff,0xc9,0x92,0x00,0x0a,0x00,0x10, ++ 0x08,0x0a,0xff,0xe2,0xb1,0xb3,0x00,0x0a,0x00,0x91,0x0c,0x10,0x04,0x09,0x00,0x09, ++ 0xff,0xe2,0xb1,0xb6,0x00,0x09,0x00,0x52,0x04,0x0a,0x00,0x51,0x04,0x0a,0x00,0x10, ++ 0x07,0x0b,0xff,0xc8,0xbf,0x00,0x0b,0xff,0xc9,0x80,0x00,0xe0,0x83,0x01,0xcf,0x86, ++ 0xd5,0xc0,0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2, ++ 0x81,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x83,0x00,0x08,0x00,0xd1,0x0c, ++ 0x10,0x08,0x08,0xff,0xe2,0xb2,0x85,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2, ++ 0x87,0x00,0x08,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0x89,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x8b,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08, ++ 0x08,0xff,0xe2,0xb2,0x8d,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x8f,0x00, ++ 0x08,0x00,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0x91,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x93,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08, ++ 0x08,0xff,0xe2,0xb2,0x95,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x97,0x00, ++ 0x08,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0x99,0x00,0x08,0x00, ++ 0x10,0x08,0x08,0xff,0xe2,0xb2,0x9b,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08,0x08,0xff, ++ 0xe2,0xb2,0x9d,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0x9f,0x00,0x08,0x00, ++ 0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0xa1,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0xa3,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08, ++ 0x08,0xff,0xe2,0xb2,0xa5,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0xa7,0x00, ++ 0x08,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0xa9,0x00,0x08,0x00, ++ 0x10,0x08,0x08,0xff,0xe2,0xb2,0xab,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08,0x08,0xff, ++ 0xe2,0xb2,0xad,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0xaf,0x00,0x08,0x00, ++ 0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0xb1,0x00,0x08,0x00, ++ 0x10,0x08,0x08,0xff,0xe2,0xb2,0xb3,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08,0x08,0xff, ++ 0xe2,0xb2,0xb5,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0xb7,0x00,0x08,0x00, ++ 0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2,0xb9,0x00,0x08,0x00,0x10,0x08, ++ 0x08,0xff,0xe2,0xb2,0xbb,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb2, ++ 0xbd,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb2,0xbf,0x00,0x08,0x00,0xcf,0x86, ++ 0xd5,0xc0,0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb3, ++ 0x81,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x83,0x00,0x08,0x00,0xd1,0x0c, ++ 0x10,0x08,0x08,0xff,0xe2,0xb3,0x85,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3, ++ 0x87,0x00,0x08,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb3,0x89,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x8b,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08, ++ 0x08,0xff,0xe2,0xb3,0x8d,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x8f,0x00, ++ 0x08,0x00,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb3,0x91,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x93,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08, ++ 0x08,0xff,0xe2,0xb3,0x95,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x97,0x00, ++ 0x08,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb3,0x99,0x00,0x08,0x00, ++ 0x10,0x08,0x08,0xff,0xe2,0xb3,0x9b,0x00,0x08,0x00,0xd1,0x0c,0x10,0x08,0x08,0xff, ++ 0xe2,0xb3,0x9d,0x00,0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0x9f,0x00,0x08,0x00, ++ 0xd4,0x3b,0xd3,0x1c,0x92,0x18,0xd1,0x0c,0x10,0x08,0x08,0xff,0xe2,0xb3,0xa1,0x00, ++ 0x08,0x00,0x10,0x08,0x08,0xff,0xe2,0xb3,0xa3,0x00,0x08,0x00,0x08,0x00,0xd2,0x10, ++ 0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x0b,0xff,0xe2,0xb3,0xac,0x00,0xe1,0x3b, ++ 0x5f,0x10,0x04,0x0b,0x00,0x0b,0xff,0xe2,0xb3,0xae,0x00,0xe3,0x40,0x5f,0x92,0x10, ++ 0x51,0x04,0x0b,0xe6,0x10,0x08,0x0d,0xff,0xe2,0xb3,0xb3,0x00,0x0d,0x00,0x00,0x00, ++ 0xe2,0x98,0x08,0xd1,0x0b,0xe0,0x11,0x67,0xcf,0x86,0xcf,0x06,0x01,0x00,0xe0,0x65, ++ 0x6c,0xcf,0x86,0xe5,0xa7,0x05,0xd4,0x06,0xcf,0x06,0x04,0x00,0xd3,0x0c,0xe2,0xf8, ++ 0x67,0xe1,0x8f,0x67,0xcf,0x06,0x04,0x00,0xe2,0xdb,0x01,0xe1,0x26,0x01,0xd0,0x09, ++ 0xcf,0x86,0x65,0xf4,0x67,0x0a,0x00,0xcf,0x86,0xd5,0xc0,0xd4,0x60,0xd3,0x30,0xd2, ++ 0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x81,0x00,0x0a,0x00,0x10,0x08,0x0a, ++ 0xff,0xea,0x99,0x83,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x85, ++ 0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x99,0x87,0x00,0x0a,0x00,0xd2,0x18,0xd1, ++ 0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x89,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea, ++ 0x99,0x8b,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x8d,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x99,0x8f,0x00,0x0a,0x00,0xd3,0x30,0xd2,0x18,0xd1, ++ 0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x91,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea, ++ 0x99,0x93,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x95,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x99,0x97,0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10, ++ 0x08,0x0a,0xff,0xea,0x99,0x99,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x99,0x9b, ++ 0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0x9d,0x00,0x0a,0x00,0x10, ++ 0x08,0x0a,0xff,0xea,0x99,0x9f,0x00,0x0a,0x00,0xe4,0x5d,0x67,0xd3,0x30,0xd2,0x18, ++ 0xd1,0x0c,0x10,0x08,0x0c,0xff,0xea,0x99,0xa1,0x00,0x0c,0x00,0x10,0x08,0x0a,0xff, ++ 0xea,0x99,0xa3,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x99,0xa5,0x00, ++ 0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x99,0xa7,0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c, ++ 0x10,0x08,0x0a,0xff,0xea,0x99,0xa9,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x99, ++ 0xab,0x00,0x0a,0x00,0xe1,0x0c,0x67,0x10,0x08,0x0a,0xff,0xea,0x99,0xad,0x00,0x0a, ++ 0x00,0xe0,0x35,0x67,0xcf,0x86,0x95,0xab,0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c, ++ 0x10,0x08,0x0a,0xff,0xea,0x9a,0x81,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9a, ++ 0x83,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9a,0x85,0x00,0x0a,0x00, ++ 0x10,0x08,0x0a,0xff,0xea,0x9a,0x87,0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08, ++ 0x0a,0xff,0xea,0x9a,0x89,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9a,0x8b,0x00, ++ 0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9a,0x8d,0x00,0x0a,0x00,0x10,0x08, ++ 0x0a,0xff,0xea,0x9a,0x8f,0x00,0x0a,0x00,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08, ++ 0x0a,0xff,0xea,0x9a,0x91,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9a,0x93,0x00, ++ 0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9a,0x95,0x00,0x0a,0x00,0x10,0x08, ++ 0x0a,0xff,0xea,0x9a,0x97,0x00,0x0a,0x00,0xe2,0x92,0x66,0xd1,0x0c,0x10,0x08,0x10, ++ 0xff,0xea,0x9a,0x99,0x00,0x10,0x00,0x10,0x08,0x10,0xff,0xea,0x9a,0x9b,0x00,0x10, ++ 0x00,0x0b,0x00,0xe1,0x10,0x02,0xd0,0xb9,0xcf,0x86,0xd5,0x07,0x64,0x9e,0x66,0x08, ++ 0x00,0xd4,0x58,0xd3,0x28,0xd2,0x10,0x51,0x04,0x09,0x00,0x10,0x08,0x0a,0xff,0xea, ++ 0x9c,0xa3,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9c,0xa5,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x9c,0xa7,0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10, ++ 0x08,0x0a,0xff,0xea,0x9c,0xa9,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9c,0xab, ++ 0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9c,0xad,0x00,0x0a,0x00,0x10, ++ 0x08,0x0a,0xff,0xea,0x9c,0xaf,0x00,0x0a,0x00,0xd3,0x28,0xd2,0x10,0x51,0x04,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x9c,0xb3,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a, ++ 0xff,0xea,0x9c,0xb5,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9c,0xb7,0x00,0x0a, ++ 0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9c,0xb9,0x00,0x0a,0x00,0x10, ++ 0x08,0x0a,0xff,0xea,0x9c,0xbb,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea, ++ 0x9c,0xbd,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9c,0xbf,0x00,0x0a,0x00,0xcf, ++ 0x86,0xd5,0xc0,0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea, ++ 0x9d,0x81,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x83,0x00,0x0a,0x00,0xd1, ++ 0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0x85,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea, ++ 0x9d,0x87,0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0x89, ++ 0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x8b,0x00,0x0a,0x00,0xd1,0x0c,0x10, ++ 0x08,0x0a,0xff,0xea,0x9d,0x8d,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x8f, ++ 0x00,0x0a,0x00,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0x91, ++ 0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x93,0x00,0x0a,0x00,0xd1,0x0c,0x10, ++ 0x08,0x0a,0xff,0xea,0x9d,0x95,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x97, ++ 0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0x99,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x9b,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a, ++ 0xff,0xea,0x9d,0x9d,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0x9f,0x00,0x0a, ++ 0x00,0xd4,0x60,0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0xa1, ++ 0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0xa3,0x00,0x0a,0x00,0xd1,0x0c,0x10, ++ 0x08,0x0a,0xff,0xea,0x9d,0xa5,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0xa7, ++ 0x00,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9d,0xa9,0x00,0x0a, ++ 0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0xab,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a, ++ 0xff,0xea,0x9d,0xad,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0xaf,0x00,0x0a, ++ 0x00,0x53,0x04,0x0a,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x04,0x0a,0x00,0x0a,0xff,0xea, ++ 0x9d,0xba,0x00,0x10,0x04,0x0a,0x00,0x0a,0xff,0xea,0x9d,0xbc,0x00,0xd1,0x0c,0x10, ++ 0x04,0x0a,0x00,0x0a,0xff,0xe1,0xb5,0xb9,0x00,0x10,0x08,0x0a,0xff,0xea,0x9d,0xbf, ++ 0x00,0x0a,0x00,0xe0,0x71,0x01,0xcf,0x86,0xd5,0xa6,0xd4,0x4e,0xd3,0x30,0xd2,0x18, ++ 0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9e,0x81,0x00,0x0a,0x00,0x10,0x08,0x0a,0xff, ++ 0xea,0x9e,0x83,0x00,0x0a,0x00,0xd1,0x0c,0x10,0x08,0x0a,0xff,0xea,0x9e,0x85,0x00, ++ 0x0a,0x00,0x10,0x08,0x0a,0xff,0xea,0x9e,0x87,0x00,0x0a,0x00,0xd2,0x10,0x51,0x04, ++ 0x0a,0x00,0x10,0x04,0x0a,0x00,0x0a,0xff,0xea,0x9e,0x8c,0x00,0xe1,0x9a,0x64,0x10, ++ 0x04,0x0a,0x00,0x0c,0xff,0xc9,0xa5,0x00,0xd3,0x28,0xd2,0x18,0xd1,0x0c,0x10,0x08, ++ 0x0c,0xff,0xea,0x9e,0x91,0x00,0x0c,0x00,0x10,0x08,0x0d,0xff,0xea,0x9e,0x93,0x00, ++ 0x0d,0x00,0x51,0x04,0x10,0x00,0x10,0x08,0x10,0xff,0xea,0x9e,0x97,0x00,0x10,0x00, ++ 0xd2,0x18,0xd1,0x0c,0x10,0x08,0x10,0xff,0xea,0x9e,0x99,0x00,0x10,0x00,0x10,0x08, ++ 0x10,0xff,0xea,0x9e,0x9b,0x00,0x10,0x00,0xd1,0x0c,0x10,0x08,0x10,0xff,0xea,0x9e, ++ 0x9d,0x00,0x10,0x00,0x10,0x08,0x10,0xff,0xea,0x9e,0x9f,0x00,0x10,0x00,0xd4,0x63, ++ 0xd3,0x30,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x0c,0xff,0xea,0x9e,0xa1,0x00,0x0c,0x00, ++ 0x10,0x08,0x0c,0xff,0xea,0x9e,0xa3,0x00,0x0c,0x00,0xd1,0x0c,0x10,0x08,0x0c,0xff, ++ 0xea,0x9e,0xa5,0x00,0x0c,0x00,0x10,0x08,0x0c,0xff,0xea,0x9e,0xa7,0x00,0x0c,0x00, ++ 0xd2,0x1a,0xd1,0x0c,0x10,0x08,0x0c,0xff,0xea,0x9e,0xa9,0x00,0x0c,0x00,0x10,0x07, ++ 0x0d,0xff,0xc9,0xa6,0x00,0x10,0xff,0xc9,0x9c,0x00,0xd1,0x0e,0x10,0x07,0x10,0xff, ++ 0xc9,0xa1,0x00,0x10,0xff,0xc9,0xac,0x00,0x10,0x07,0x12,0xff,0xc9,0xaa,0x00,0x14, ++ 0x00,0xd3,0x35,0xd2,0x1d,0xd1,0x0e,0x10,0x07,0x10,0xff,0xca,0x9e,0x00,0x10,0xff, ++ 0xca,0x87,0x00,0x10,0x07,0x11,0xff,0xca,0x9d,0x00,0x11,0xff,0xea,0xad,0x93,0x00, ++ 0xd1,0x0c,0x10,0x08,0x11,0xff,0xea,0x9e,0xb5,0x00,0x11,0x00,0x10,0x08,0x11,0xff, ++ 0xea,0x9e,0xb7,0x00,0x11,0x00,0xd2,0x18,0xd1,0x0c,0x10,0x08,0x14,0xff,0xea,0x9e, ++ 0xb9,0x00,0x14,0x00,0x10,0x08,0x15,0xff,0xea,0x9e,0xbb,0x00,0x15,0x00,0xd1,0x0c, ++ 0x10,0x08,0x15,0xff,0xea,0x9e,0xbd,0x00,0x15,0x00,0x10,0x08,0x15,0xff,0xea,0x9e, ++ 0xbf,0x00,0x15,0x00,0xcf,0x86,0xe5,0xd4,0x63,0x94,0x2f,0x93,0x2b,0xd2,0x10,0x51, ++ 0x04,0x00,0x00,0x10,0x08,0x15,0xff,0xea,0x9f,0x83,0x00,0x15,0x00,0xd1,0x0f,0x10, ++ 0x08,0x15,0xff,0xea,0x9e,0x94,0x00,0x15,0xff,0xca,0x82,0x00,0x10,0x08,0x15,0xff, ++ 0xe1,0xb6,0x8e,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xe4,0xb4,0x66,0xd3,0x1d,0xe2, ++ 0x5b,0x64,0xe1,0x0a,0x64,0xe0,0xf7,0x63,0xcf,0x86,0xe5,0xd8,0x63,0x94,0x0b,0x93, ++ 0x07,0x62,0xc3,0x63,0x08,0x00,0x08,0x00,0x08,0x00,0xd2,0x0f,0xe1,0x5a,0x65,0xe0, ++ 0x27,0x65,0xcf,0x86,0x65,0x0c,0x65,0x0a,0x00,0xd1,0xab,0xd0,0x1a,0xcf,0x86,0xe5, ++ 0x17,0x66,0xe4,0xfa,0x65,0xe3,0xe1,0x65,0xe2,0xd4,0x65,0x91,0x08,0x10,0x04,0x00, ++ 0x00,0x0c,0x00,0x0c,0x00,0xcf,0x86,0x55,0x04,0x10,0x00,0xd4,0x0b,0x93,0x07,0x62, ++ 0x27,0x66,0x11,0x00,0x00,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x11,0xff, ++ 0xe1,0x8e,0xa0,0x00,0x11,0xff,0xe1,0x8e,0xa1,0x00,0x10,0x08,0x11,0xff,0xe1,0x8e, ++ 0xa2,0x00,0x11,0xff,0xe1,0x8e,0xa3,0x00,0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e, ++ 0xa4,0x00,0x11,0xff,0xe1,0x8e,0xa5,0x00,0x10,0x08,0x11,0xff,0xe1,0x8e,0xa6,0x00, ++ 0x11,0xff,0xe1,0x8e,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e, ++ 0xa8,0x00,0x11,0xff,0xe1,0x8e,0xa9,0x00,0x10,0x08,0x11,0xff,0xe1,0x8e,0xaa,0x00, ++ 0x11,0xff,0xe1,0x8e,0xab,0x00,0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e,0xac,0x00, ++ 0x11,0xff,0xe1,0x8e,0xad,0x00,0x10,0x08,0x11,0xff,0xe1,0x8e,0xae,0x00,0x11,0xff, ++ 0xe1,0x8e,0xaf,0x00,0xe0,0xb2,0x65,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e,0xb0,0x00,0x11,0xff,0xe1,0x8e, ++ 0xb1,0x00,0x10,0x08,0x11,0xff,0xe1,0x8e,0xb2,0x00,0x11,0xff,0xe1,0x8e,0xb3,0x00, ++ 0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e,0xb4,0x00,0x11,0xff,0xe1,0x8e,0xb5,0x00, ++ 0x10,0x08,0x11,0xff,0xe1,0x8e,0xb6,0x00,0x11,0xff,0xe1,0x8e,0xb7,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8e,0xb8,0x00,0x11,0xff,0xe1,0x8e,0xb9,0x00, ++ 0x10,0x08,0x11,0xff,0xe1,0x8e,0xba,0x00,0x11,0xff,0xe1,0x8e,0xbb,0x00,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8e,0xbc,0x00,0x11,0xff,0xe1,0x8e,0xbd,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8e,0xbe,0x00,0x11,0xff,0xe1,0x8e,0xbf,0x00,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8f,0x80,0x00,0x11,0xff,0xe1,0x8f,0x81,0x00, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x82,0x00,0x11,0xff,0xe1,0x8f,0x83,0x00,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x84,0x00,0x11,0xff,0xe1,0x8f,0x85,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x86,0x00,0x11,0xff,0xe1,0x8f,0x87,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x88,0x00,0x11,0xff,0xe1,0x8f,0x89,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x8a,0x00,0x11,0xff,0xe1,0x8f,0x8b,0x00,0xd1,0x10,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x8c,0x00,0x11,0xff,0xe1,0x8f,0x8d,0x00,0x10,0x08,0x11,0xff, ++ 0xe1,0x8f,0x8e,0x00,0x11,0xff,0xe1,0x8f,0x8f,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x11,0xff,0xe1,0x8f,0x90,0x00,0x11,0xff,0xe1,0x8f,0x91,0x00, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x92,0x00,0x11,0xff,0xe1,0x8f,0x93,0x00,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x94,0x00,0x11,0xff,0xe1,0x8f,0x95,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x96,0x00,0x11,0xff,0xe1,0x8f,0x97,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0x98,0x00,0x11,0xff,0xe1,0x8f,0x99,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x9a,0x00,0x11,0xff,0xe1,0x8f,0x9b,0x00,0xd1,0x10,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0x9c,0x00,0x11,0xff,0xe1,0x8f,0x9d,0x00,0x10,0x08,0x11,0xff, ++ 0xe1,0x8f,0x9e,0x00,0x11,0xff,0xe1,0x8f,0x9f,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x11,0xff,0xe1,0x8f,0xa0,0x00,0x11,0xff,0xe1,0x8f,0xa1,0x00,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0xa2,0x00,0x11,0xff,0xe1,0x8f,0xa3,0x00,0xd1,0x10,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0xa4,0x00,0x11,0xff,0xe1,0x8f,0xa5,0x00,0x10,0x08,0x11,0xff, ++ 0xe1,0x8f,0xa6,0x00,0x11,0xff,0xe1,0x8f,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x11,0xff,0xe1,0x8f,0xa8,0x00,0x11,0xff,0xe1,0x8f,0xa9,0x00,0x10,0x08,0x11,0xff, ++ 0xe1,0x8f,0xaa,0x00,0x11,0xff,0xe1,0x8f,0xab,0x00,0xd1,0x10,0x10,0x08,0x11,0xff, ++ 0xe1,0x8f,0xac,0x00,0x11,0xff,0xe1,0x8f,0xad,0x00,0x10,0x08,0x11,0xff,0xe1,0x8f, ++ 0xae,0x00,0x11,0xff,0xe1,0x8f,0xaf,0x00,0xd1,0x0c,0xe0,0xeb,0x63,0xcf,0x86,0xcf, ++ 0x06,0x02,0xff,0xff,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x06, ++ 0xcf,0x06,0x01,0x00,0xd4,0xae,0xd3,0x09,0xe2,0x54,0x64,0xcf,0x06,0x01,0x00,0xd2, ++ 0x27,0xe1,0x1f,0x70,0xe0,0x26,0x6e,0xcf,0x86,0xe5,0x3f,0x6d,0xe4,0xce,0x6c,0xe3, ++ 0x99,0x6c,0xe2,0x78,0x6c,0xe1,0x67,0x6c,0x10,0x08,0x01,0xff,0xe5,0x88,0x87,0x00, ++ 0x01,0xff,0xe5,0xba,0xa6,0x00,0xe1,0x74,0x74,0xe0,0xe8,0x73,0xcf,0x86,0xe5,0x22, ++ 0x73,0xd4,0x3b,0x93,0x37,0xd2,0x1d,0xd1,0x0e,0x10,0x07,0x01,0xff,0x66,0x66,0x00, ++ 0x01,0xff,0x66,0x69,0x00,0x10,0x07,0x01,0xff,0x66,0x6c,0x00,0x01,0xff,0x66,0x66, ++ 0x69,0x00,0xd1,0x0f,0x10,0x08,0x01,0xff,0x66,0x66,0x6c,0x00,0x01,0xff,0x73,0x74, ++ 0x00,0x10,0x07,0x01,0xff,0x73,0x74,0x00,0x00,0x00,0x00,0x00,0xe3,0xc8,0x72,0xd2, ++ 0x11,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0xff,0xd5,0xb4,0xd5,0xb6,0x00, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xd5,0xb4,0xd5,0xa5,0x00,0x01,0xff,0xd5,0xb4,0xd5, ++ 0xab,0x00,0x10,0x09,0x01,0xff,0xd5,0xbe,0xd5,0xb6,0x00,0x01,0xff,0xd5,0xb4,0xd5, ++ 0xad,0x00,0xd3,0x09,0xe2,0x40,0x74,0xcf,0x06,0x01,0x00,0xd2,0x13,0xe1,0x30,0x75, ++ 0xe0,0xc1,0x74,0xcf,0x86,0xe5,0x9e,0x74,0x64,0x8d,0x74,0x06,0xff,0x00,0xe1,0x96, ++ 0x75,0xe0,0x63,0x75,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x7c, ++ 0xd3,0x3c,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0xef,0xbd,0x81,0x00, ++ 0x10,0x08,0x01,0xff,0xef,0xbd,0x82,0x00,0x01,0xff,0xef,0xbd,0x83,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xef,0xbd,0x84,0x00,0x01,0xff,0xef,0xbd,0x85,0x00,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x86,0x00,0x01,0xff,0xef,0xbd,0x87,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xef,0xbd,0x88,0x00,0x01,0xff,0xef,0xbd,0x89,0x00,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x8a,0x00,0x01,0xff,0xef,0xbd,0x8b,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x8c,0x00,0x01,0xff,0xef,0xbd,0x8d,0x00,0x10,0x08,0x01,0xff, ++ 0xef,0xbd,0x8e,0x00,0x01,0xff,0xef,0xbd,0x8f,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xef,0xbd,0x90,0x00,0x01,0xff,0xef,0xbd,0x91,0x00,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x92,0x00,0x01,0xff,0xef,0xbd,0x93,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x94,0x00,0x01,0xff,0xef,0xbd,0x95,0x00,0x10,0x08,0x01,0xff, ++ 0xef,0xbd,0x96,0x00,0x01,0xff,0xef,0xbd,0x97,0x00,0x92,0x1c,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xef,0xbd,0x98,0x00,0x01,0xff,0xef,0xbd,0x99,0x00,0x10,0x08,0x01,0xff, ++ 0xef,0xbd,0x9a,0x00,0x01,0x00,0x01,0x00,0x83,0xe2,0x87,0xb3,0xe1,0x60,0xb0,0xe0, ++ 0xdd,0xae,0xcf,0x86,0xe5,0x81,0x9b,0xc4,0xe3,0xc1,0x07,0xe2,0x62,0x06,0xe1,0x11, ++ 0x86,0xe0,0x09,0x05,0xcf,0x86,0xe5,0xfb,0x02,0xd4,0x1c,0xe3,0x7f,0x76,0xe2,0xd6, ++ 0x75,0xe1,0xb1,0x75,0xe0,0x8a,0x75,0xcf,0x86,0xe5,0x57,0x75,0x94,0x07,0x63,0x42, ++ 0x75,0x07,0x00,0x07,0x00,0xe3,0x2b,0x78,0xe2,0xf0,0x77,0xe1,0x77,0x01,0xe0,0x88, ++ 0x77,0xcf,0x86,0xe5,0x21,0x01,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09, ++ 0x05,0xff,0xf0,0x90,0x90,0xa8,0x00,0x05,0xff,0xf0,0x90,0x90,0xa9,0x00,0x10,0x09, ++ 0x05,0xff,0xf0,0x90,0x90,0xaa,0x00,0x05,0xff,0xf0,0x90,0x90,0xab,0x00,0xd1,0x12, ++ 0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xac,0x00,0x05,0xff,0xf0,0x90,0x90,0xad,0x00, ++ 0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xae,0x00,0x05,0xff,0xf0,0x90,0x90,0xaf,0x00, ++ 0xd2,0x24,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xb0,0x00,0x05,0xff,0xf0, ++ 0x90,0x90,0xb1,0x00,0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xb2,0x00,0x05,0xff,0xf0, ++ 0x90,0x90,0xb3,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xb4,0x00,0x05, ++ 0xff,0xf0,0x90,0x90,0xb5,0x00,0x10,0x09,0x05,0xff,0xf0,0x90,0x90,0xb6,0x00,0x05, ++ 0xff,0xf0,0x90,0x90,0xb7,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x05,0xff, ++ 0xf0,0x90,0x90,0xb8,0x00,0x05,0xff,0xf0,0x90,0x90,0xb9,0x00,0x10,0x09,0x05,0xff, ++ 0xf0,0x90,0x90,0xba,0x00,0x05,0xff,0xf0,0x90,0x90,0xbb,0x00,0xd1,0x12,0x10,0x09, ++ 0x05,0xff,0xf0,0x90,0x90,0xbc,0x00,0x05,0xff,0xf0,0x90,0x90,0xbd,0x00,0x10,0x09, ++ 0x05,0xff,0xf0,0x90,0x90,0xbe,0x00,0x05,0xff,0xf0,0x90,0x90,0xbf,0x00,0xd2,0x24, ++ 0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0x90,0x91,0x80,0x00,0x05,0xff,0xf0,0x90,0x91, ++ 0x81,0x00,0x10,0x09,0x05,0xff,0xf0,0x90,0x91,0x82,0x00,0x05,0xff,0xf0,0x90,0x91, ++ 0x83,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0x90,0x91,0x84,0x00,0x05,0xff,0xf0, ++ 0x90,0x91,0x85,0x00,0x10,0x09,0x05,0xff,0xf0,0x90,0x91,0x86,0x00,0x05,0xff,0xf0, ++ 0x90,0x91,0x87,0x00,0x94,0x4c,0x93,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x05,0xff, ++ 0xf0,0x90,0x91,0x88,0x00,0x05,0xff,0xf0,0x90,0x91,0x89,0x00,0x10,0x09,0x05,0xff, ++ 0xf0,0x90,0x91,0x8a,0x00,0x05,0xff,0xf0,0x90,0x91,0x8b,0x00,0xd1,0x12,0x10,0x09, ++ 0x05,0xff,0xf0,0x90,0x91,0x8c,0x00,0x05,0xff,0xf0,0x90,0x91,0x8d,0x00,0x10,0x09, ++ 0x07,0xff,0xf0,0x90,0x91,0x8e,0x00,0x07,0xff,0xf0,0x90,0x91,0x8f,0x00,0x05,0x00, ++ 0x05,0x00,0xd0,0xa0,0xcf,0x86,0xd5,0x07,0x64,0x30,0x76,0x07,0x00,0xd4,0x07,0x63, ++ 0x3d,0x76,0x07,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x90, ++ 0x93,0x98,0x00,0x12,0xff,0xf0,0x90,0x93,0x99,0x00,0x10,0x09,0x12,0xff,0xf0,0x90, ++ 0x93,0x9a,0x00,0x12,0xff,0xf0,0x90,0x93,0x9b,0x00,0xd1,0x12,0x10,0x09,0x12,0xff, ++ 0xf0,0x90,0x93,0x9c,0x00,0x12,0xff,0xf0,0x90,0x93,0x9d,0x00,0x10,0x09,0x12,0xff, ++ 0xf0,0x90,0x93,0x9e,0x00,0x12,0xff,0xf0,0x90,0x93,0x9f,0x00,0xd2,0x24,0xd1,0x12, ++ 0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xa0,0x00,0x12,0xff,0xf0,0x90,0x93,0xa1,0x00, ++ 0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xa2,0x00,0x12,0xff,0xf0,0x90,0x93,0xa3,0x00, ++ 0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xa4,0x00,0x12,0xff,0xf0,0x90,0x93, ++ 0xa5,0x00,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xa6,0x00,0x12,0xff,0xf0,0x90,0x93, ++ 0xa7,0x00,0xcf,0x86,0xe5,0xc6,0x75,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10, ++ 0x09,0x12,0xff,0xf0,0x90,0x93,0xa8,0x00,0x12,0xff,0xf0,0x90,0x93,0xa9,0x00,0x10, ++ 0x09,0x12,0xff,0xf0,0x90,0x93,0xaa,0x00,0x12,0xff,0xf0,0x90,0x93,0xab,0x00,0xd1, ++ 0x12,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xac,0x00,0x12,0xff,0xf0,0x90,0x93,0xad, ++ 0x00,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xae,0x00,0x12,0xff,0xf0,0x90,0x93,0xaf, ++ 0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xb0,0x00,0x12,0xff, ++ 0xf0,0x90,0x93,0xb1,0x00,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xb2,0x00,0x12,0xff, ++ 0xf0,0x90,0x93,0xb3,0x00,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xb4,0x00, ++ 0x12,0xff,0xf0,0x90,0x93,0xb5,0x00,0x10,0x09,0x12,0xff,0xf0,0x90,0x93,0xb6,0x00, ++ 0x12,0xff,0xf0,0x90,0x93,0xb7,0x00,0x93,0x28,0x92,0x24,0xd1,0x12,0x10,0x09,0x12, ++ 0xff,0xf0,0x90,0x93,0xb8,0x00,0x12,0xff,0xf0,0x90,0x93,0xb9,0x00,0x10,0x09,0x12, ++ 0xff,0xf0,0x90,0x93,0xba,0x00,0x12,0xff,0xf0,0x90,0x93,0xbb,0x00,0x00,0x00,0x12, ++ 0x00,0xd4,0x1f,0xe3,0xdf,0x76,0xe2,0x6a,0x76,0xe1,0x09,0x76,0xe0,0xea,0x75,0xcf, ++ 0x86,0xe5,0xb7,0x75,0x94,0x0a,0xe3,0xa2,0x75,0x62,0x99,0x75,0x07,0x00,0x07,0x00, ++ 0xe3,0xde,0x78,0xe2,0xaf,0x78,0xd1,0x09,0xe0,0x4c,0x78,0xcf,0x06,0x0b,0x00,0xe0, ++ 0x7f,0x78,0xcf,0x86,0xe5,0x21,0x01,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0x80,0x00,0x11,0xff,0xf0,0x90,0xb3,0x81,0x00,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0x82,0x00,0x11,0xff,0xf0,0x90,0xb3,0x83,0x00,0xd1, ++ 0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x84,0x00,0x11,0xff,0xf0,0x90,0xb3,0x85, ++ 0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x86,0x00,0x11,0xff,0xf0,0x90,0xb3,0x87, ++ 0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x88,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0x89,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x8a,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0x8b,0x00,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x8c,0x00, ++ 0x11,0xff,0xf0,0x90,0xb3,0x8d,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x8e,0x00, ++ 0x11,0xff,0xf0,0x90,0xb3,0x8f,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x11, ++ 0xff,0xf0,0x90,0xb3,0x90,0x00,0x11,0xff,0xf0,0x90,0xb3,0x91,0x00,0x10,0x09,0x11, ++ 0xff,0xf0,0x90,0xb3,0x92,0x00,0x11,0xff,0xf0,0x90,0xb3,0x93,0x00,0xd1,0x12,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0x94,0x00,0x11,0xff,0xf0,0x90,0xb3,0x95,0x00,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0x96,0x00,0x11,0xff,0xf0,0x90,0xb3,0x97,0x00,0xd2, ++ 0x24,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x98,0x00,0x11,0xff,0xf0,0x90, ++ 0xb3,0x99,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x9a,0x00,0x11,0xff,0xf0,0x90, ++ 0xb3,0x9b,0x00,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x9c,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0x9d,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0x9e,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0x9f,0x00,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x11, ++ 0xff,0xf0,0x90,0xb3,0xa0,0x00,0x11,0xff,0xf0,0x90,0xb3,0xa1,0x00,0x10,0x09,0x11, ++ 0xff,0xf0,0x90,0xb3,0xa2,0x00,0x11,0xff,0xf0,0x90,0xb3,0xa3,0x00,0xd1,0x12,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0xa4,0x00,0x11,0xff,0xf0,0x90,0xb3,0xa5,0x00,0x10, ++ 0x09,0x11,0xff,0xf0,0x90,0xb3,0xa6,0x00,0x11,0xff,0xf0,0x90,0xb3,0xa7,0x00,0xd2, ++ 0x24,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0xa8,0x00,0x11,0xff,0xf0,0x90, ++ 0xb3,0xa9,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0xaa,0x00,0x11,0xff,0xf0,0x90, ++ 0xb3,0xab,0x00,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0xac,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0xad,0x00,0x10,0x09,0x11,0xff,0xf0,0x90,0xb3,0xae,0x00,0x11,0xff, ++ 0xf0,0x90,0xb3,0xaf,0x00,0x93,0x23,0x92,0x1f,0xd1,0x12,0x10,0x09,0x11,0xff,0xf0, ++ 0x90,0xb3,0xb0,0x00,0x11,0xff,0xf0,0x90,0xb3,0xb1,0x00,0x10,0x09,0x11,0xff,0xf0, ++ 0x90,0xb3,0xb2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x15,0xe4,0x91, ++ 0x7b,0xe3,0x9b,0x79,0xe2,0x94,0x78,0xe1,0xe4,0x77,0xe0,0x9d,0x77,0xcf,0x06,0x0c, ++ 0x00,0xe4,0xeb,0x7e,0xe3,0x44,0x7e,0xe2,0xed,0x7d,0xd1,0x0c,0xe0,0xb2,0x7d,0xcf, ++ 0x86,0x65,0x93,0x7d,0x14,0x00,0xe0,0xb6,0x7d,0xcf,0x86,0x55,0x04,0x00,0x00,0xd4, ++ 0x90,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x80,0x00, ++ 0x10,0xff,0xf0,0x91,0xa3,0x81,0x00,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x82,0x00, ++ 0x10,0xff,0xf0,0x91,0xa3,0x83,0x00,0xd1,0x12,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3, ++ 0x84,0x00,0x10,0xff,0xf0,0x91,0xa3,0x85,0x00,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3, ++ 0x86,0x00,0x10,0xff,0xf0,0x91,0xa3,0x87,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x10, ++ 0xff,0xf0,0x91,0xa3,0x88,0x00,0x10,0xff,0xf0,0x91,0xa3,0x89,0x00,0x10,0x09,0x10, ++ 0xff,0xf0,0x91,0xa3,0x8a,0x00,0x10,0xff,0xf0,0x91,0xa3,0x8b,0x00,0xd1,0x12,0x10, ++ 0x09,0x10,0xff,0xf0,0x91,0xa3,0x8c,0x00,0x10,0xff,0xf0,0x91,0xa3,0x8d,0x00,0x10, ++ 0x09,0x10,0xff,0xf0,0x91,0xa3,0x8e,0x00,0x10,0xff,0xf0,0x91,0xa3,0x8f,0x00,0xd3, ++ 0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x90,0x00,0x10,0xff, ++ 0xf0,0x91,0xa3,0x91,0x00,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x92,0x00,0x10,0xff, ++ 0xf0,0x91,0xa3,0x93,0x00,0xd1,0x12,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x94,0x00, ++ 0x10,0xff,0xf0,0x91,0xa3,0x95,0x00,0x10,0x09,0x10,0xff,0xf0,0x91,0xa3,0x96,0x00, ++ 0x10,0xff,0xf0,0x91,0xa3,0x97,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x10,0xff,0xf0, ++ 0x91,0xa3,0x98,0x00,0x10,0xff,0xf0,0x91,0xa3,0x99,0x00,0x10,0x09,0x10,0xff,0xf0, ++ 0x91,0xa3,0x9a,0x00,0x10,0xff,0xf0,0x91,0xa3,0x9b,0x00,0xd1,0x12,0x10,0x09,0x10, ++ 0xff,0xf0,0x91,0xa3,0x9c,0x00,0x10,0xff,0xf0,0x91,0xa3,0x9d,0x00,0x10,0x09,0x10, ++ 0xff,0xf0,0x91,0xa3,0x9e,0x00,0x10,0xff,0xf0,0x91,0xa3,0x9f,0x00,0xd1,0x11,0xe0, ++ 0x12,0x81,0xcf,0x86,0xe5,0x09,0x81,0xe4,0xd2,0x80,0xcf,0x06,0x00,0x00,0xe0,0xdb, ++ 0x82,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x09,0xe3,0x10,0x81,0xcf,0x06, ++ 0x0c,0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xe2,0x3b,0x82,0xe1,0x16,0x82,0xd0,0x06, ++ 0xcf,0x06,0x00,0x00,0xcf,0x86,0xa5,0x21,0x01,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1, ++ 0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xa0,0x00,0x14,0xff,0xf0,0x96,0xb9,0xa1, ++ 0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xa2,0x00,0x14,0xff,0xf0,0x96,0xb9,0xa3, ++ 0x00,0xd1,0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xa4,0x00,0x14,0xff,0xf0,0x96, ++ 0xb9,0xa5,0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xa6,0x00,0x14,0xff,0xf0,0x96, ++ 0xb9,0xa7,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xa8,0x00, ++ 0x14,0xff,0xf0,0x96,0xb9,0xa9,0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xaa,0x00, ++ 0x14,0xff,0xf0,0x96,0xb9,0xab,0x00,0xd1,0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9, ++ 0xac,0x00,0x14,0xff,0xf0,0x96,0xb9,0xad,0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9, ++ 0xae,0x00,0x14,0xff,0xf0,0x96,0xb9,0xaf,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10, ++ 0x09,0x14,0xff,0xf0,0x96,0xb9,0xb0,0x00,0x14,0xff,0xf0,0x96,0xb9,0xb1,0x00,0x10, ++ 0x09,0x14,0xff,0xf0,0x96,0xb9,0xb2,0x00,0x14,0xff,0xf0,0x96,0xb9,0xb3,0x00,0xd1, ++ 0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xb4,0x00,0x14,0xff,0xf0,0x96,0xb9,0xb5, ++ 0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xb6,0x00,0x14,0xff,0xf0,0x96,0xb9,0xb7, ++ 0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xb8,0x00,0x14,0xff, ++ 0xf0,0x96,0xb9,0xb9,0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xba,0x00,0x14,0xff, ++ 0xf0,0x96,0xb9,0xbb,0x00,0xd1,0x12,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xbc,0x00, ++ 0x14,0xff,0xf0,0x96,0xb9,0xbd,0x00,0x10,0x09,0x14,0xff,0xf0,0x96,0xb9,0xbe,0x00, ++ 0x14,0xff,0xf0,0x96,0xb9,0xbf,0x00,0x14,0x00,0xd2,0x14,0xe1,0x25,0x82,0xe0,0x1c, ++ 0x82,0xcf,0x86,0xe5,0xdd,0x81,0xe4,0x9a,0x81,0xcf,0x06,0x12,0x00,0xd1,0x0b,0xe0, ++ 0x51,0x83,0xcf,0x86,0xcf,0x06,0x00,0x00,0xe0,0x95,0x8b,0xcf,0x86,0xd5,0x22,0xe4, ++ 0xd0,0x88,0xe3,0x93,0x88,0xe2,0x38,0x88,0xe1,0x31,0x88,0xe0,0x2a,0x88,0xcf,0x86, ++ 0xe5,0xfb,0x87,0xe4,0xe2,0x87,0x93,0x07,0x62,0xd1,0x87,0x12,0xe6,0x12,0xe6,0xe4, ++ 0x36,0x89,0xe3,0x2f,0x89,0xd2,0x09,0xe1,0xb8,0x88,0xcf,0x06,0x10,0x00,0xe1,0x1f, ++ 0x89,0xe0,0xec,0x88,0xcf,0x86,0xe5,0x21,0x01,0xd4,0x90,0xd3,0x48,0xd2,0x24,0xd1, ++ 0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xa2,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xa3, ++ 0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xa4,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xa5, ++ 0x00,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xa6,0x00,0x12,0xff,0xf0,0x9e, ++ 0xa4,0xa7,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xa8,0x00,0x12,0xff,0xf0,0x9e, ++ 0xa4,0xa9,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xaa,0x00, ++ 0x12,0xff,0xf0,0x9e,0xa4,0xab,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xac,0x00, ++ 0x12,0xff,0xf0,0x9e,0xa4,0xad,0x00,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4, ++ 0xae,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xaf,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4, ++ 0xb0,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb1,0x00,0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10, ++ 0x09,0x12,0xff,0xf0,0x9e,0xa4,0xb2,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb3,0x00,0x10, ++ 0x09,0x12,0xff,0xf0,0x9e,0xa4,0xb4,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb5,0x00,0xd1, ++ 0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xb6,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb7, ++ 0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xb8,0x00,0x12,0xff,0xf0,0x9e,0xa4,0xb9, ++ 0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xba,0x00,0x12,0xff, ++ 0xf0,0x9e,0xa4,0xbb,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xbc,0x00,0x12,0xff, ++ 0xf0,0x9e,0xa4,0xbd,0x00,0xd1,0x12,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa4,0xbe,0x00, ++ 0x12,0xff,0xf0,0x9e,0xa4,0xbf,0x00,0x10,0x09,0x12,0xff,0xf0,0x9e,0xa5,0x80,0x00, ++ 0x12,0xff,0xf0,0x9e,0xa5,0x81,0x00,0x94,0x1e,0x93,0x1a,0x92,0x16,0x91,0x12,0x10, ++ 0x09,0x12,0xff,0xf0,0x9e,0xa5,0x82,0x00,0x12,0xff,0xf0,0x9e,0xa5,0x83,0x00,0x12, ++ 0x00,0x12,0x00,0x12,0x00,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ /* nfdi_c0100 */ ++ 0x57,0x04,0x01,0x00,0xc6,0xe5,0xac,0x13,0xe4,0x41,0x0c,0xe3,0x7a,0x07,0xe2,0xf3, ++ 0x01,0xc1,0xd0,0x1f,0xcf,0x86,0x55,0x04,0x01,0x00,0x94,0x15,0x53,0x04,0x01,0x00, ++ 0x52,0x04,0x01,0x00,0x91,0x09,0x10,0x04,0x01,0x00,0x01,0xff,0x00,0x01,0x00,0x01, ++ 0x00,0xcf,0x86,0xd5,0xe4,0xd4,0x7c,0xd3,0x3c,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x41,0xcc,0x80,0x00,0x01,0xff,0x41,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x41, ++ 0xcc,0x82,0x00,0x01,0xff,0x41,0xcc,0x83,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x41, ++ 0xcc,0x88,0x00,0x01,0xff,0x41,0xcc,0x8a,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0x43, ++ 0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc,0x80,0x00,0x01, ++ 0xff,0x45,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x82,0x00,0x01,0xff,0x45, ++ 0xcc,0x88,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x80,0x00,0x01,0xff,0x49, ++ 0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0x82,0x00,0x01,0xff,0x49,0xcc,0x88, ++ 0x00,0xd3,0x38,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x4e,0xcc,0x83, ++ 0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0x80,0x00,0x01,0xff,0x4f,0xcc,0x81,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x4f,0xcc,0x82,0x00,0x01,0xff,0x4f,0xcc,0x83,0x00,0x10, ++ 0x08,0x01,0xff,0x4f,0xcc,0x88,0x00,0x01,0x00,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01, ++ 0x00,0x01,0xff,0x55,0xcc,0x80,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0x81,0x00,0x01, ++ 0xff,0x55,0xcc,0x82,0x00,0x91,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0x88,0x00,0x01, ++ 0xff,0x59,0xcc,0x81,0x00,0x01,0x00,0xd4,0x7c,0xd3,0x3c,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x61,0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x81,0x00,0x10,0x08,0x01, ++ 0xff,0x61,0xcc,0x82,0x00,0x01,0xff,0x61,0xcc,0x83,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x61,0xcc,0x88,0x00,0x01,0xff,0x61,0xcc,0x8a,0x00,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0x63,0xcc,0xa7,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x65,0xcc,0x80, ++ 0x00,0x01,0xff,0x65,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x65,0xcc,0x82,0x00,0x01, ++ 0xff,0x65,0xcc,0x88,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x80,0x00,0x01, ++ 0xff,0x69,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x69,0xcc,0x82,0x00,0x01,0xff,0x69, ++ 0xcc,0x88,0x00,0xd3,0x38,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x6e, ++ 0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x80,0x00,0x01,0xff,0x6f,0xcc,0x81, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x6f,0xcc,0x82,0x00,0x01,0xff,0x6f,0xcc,0x83, ++ 0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x88,0x00,0x01,0x00,0xd2,0x1c,0xd1,0x0c,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0x75,0xcc,0x80,0x00,0x10,0x08,0x01,0xff,0x75,0xcc,0x81, ++ 0x00,0x01,0xff,0x75,0xcc,0x82,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x75,0xcc,0x88, ++ 0x00,0x01,0xff,0x79,0xcc,0x81,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0x79,0xcc,0x88, ++ 0x00,0xe1,0x9a,0x03,0xe0,0xd3,0x01,0xcf,0x86,0xd5,0xf4,0xd4,0x80,0xd3,0x40,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0x84,0x00,0x01,0xff,0x61,0xcc,0x84, ++ 0x00,0x10,0x08,0x01,0xff,0x41,0xcc,0x86,0x00,0x01,0xff,0x61,0xcc,0x86,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0xa8,0x00,0x01,0xff,0x61,0xcc,0xa8,0x00,0x10, ++ 0x08,0x01,0xff,0x43,0xcc,0x81,0x00,0x01,0xff,0x63,0xcc,0x81,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x43,0xcc,0x82,0x00,0x01,0xff,0x63,0xcc,0x82,0x00,0x10, ++ 0x08,0x01,0xff,0x43,0xcc,0x87,0x00,0x01,0xff,0x63,0xcc,0x87,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x43,0xcc,0x8c,0x00,0x01,0xff,0x63,0xcc,0x8c,0x00,0x10,0x08,0x01, ++ 0xff,0x44,0xcc,0x8c,0x00,0x01,0xff,0x64,0xcc,0x8c,0x00,0xd3,0x34,0xd2,0x14,0x51, ++ 0x04,0x01,0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x84,0x00,0x01,0xff,0x65,0xcc,0x84, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc,0x86,0x00,0x01,0xff,0x65,0xcc,0x86, ++ 0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x87,0x00,0x01,0xff,0x65,0xcc,0x87,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc,0xa8,0x00,0x01,0xff,0x65,0xcc,0xa8, ++ 0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x8c,0x00,0x01,0xff,0x65,0xcc,0x8c,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x47,0xcc,0x82,0x00,0x01,0xff,0x67,0xcc,0x82,0x00,0x10, ++ 0x08,0x01,0xff,0x47,0xcc,0x86,0x00,0x01,0xff,0x67,0xcc,0x86,0x00,0xd4,0x74,0xd3, ++ 0x34,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x47,0xcc,0x87,0x00,0x01,0xff,0x67, ++ 0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x47,0xcc,0xa7,0x00,0x01,0xff,0x67,0xcc,0xa7, ++ 0x00,0x91,0x10,0x10,0x08,0x01,0xff,0x48,0xcc,0x82,0x00,0x01,0xff,0x68,0xcc,0x82, ++ 0x00,0x01,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x83,0x00,0x01, ++ 0xff,0x69,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0x84,0x00,0x01,0xff,0x69, ++ 0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x86,0x00,0x01,0xff,0x69, ++ 0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0xa8,0x00,0x01,0xff,0x69,0xcc,0xa8, ++ 0x00,0xd3,0x30,0xd2,0x10,0x91,0x0c,0x10,0x08,0x01,0xff,0x49,0xcc,0x87,0x00,0x01, ++ 0x00,0x01,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4a,0xcc,0x82,0x00,0x01,0xff,0x6a, ++ 0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x4b,0xcc,0xa7,0x00,0x01,0xff,0x6b,0xcc,0xa7, ++ 0x00,0xd2,0x1c,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x4c,0xcc,0x81,0x00,0x10, ++ 0x08,0x01,0xff,0x6c,0xcc,0x81,0x00,0x01,0xff,0x4c,0xcc,0xa7,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x6c,0xcc,0xa7,0x00,0x01,0xff,0x4c,0xcc,0x8c,0x00,0x10,0x08,0x01, ++ 0xff,0x6c,0xcc,0x8c,0x00,0x01,0x00,0xcf,0x86,0xd5,0xd4,0xd4,0x60,0xd3,0x30,0xd2, ++ 0x10,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0x4e,0xcc,0x81,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x6e,0xcc,0x81,0x00,0x01,0xff,0x4e,0xcc,0xa7,0x00,0x10, ++ 0x08,0x01,0xff,0x6e,0xcc,0xa7,0x00,0x01,0xff,0x4e,0xcc,0x8c,0x00,0xd2,0x10,0x91, ++ 0x0c,0x10,0x08,0x01,0xff,0x6e,0xcc,0x8c,0x00,0x01,0x00,0x01,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x4f,0xcc,0x84,0x00,0x01,0xff,0x6f,0xcc,0x84,0x00,0x10,0x08,0x01, ++ 0xff,0x4f,0xcc,0x86,0x00,0x01,0xff,0x6f,0xcc,0x86,0x00,0xd3,0x34,0xd2,0x14,0x91, ++ 0x10,0x10,0x08,0x01,0xff,0x4f,0xcc,0x8b,0x00,0x01,0xff,0x6f,0xcc,0x8b,0x00,0x01, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x52,0xcc,0x81,0x00,0x01,0xff,0x72,0xcc,0x81, ++ 0x00,0x10,0x08,0x01,0xff,0x52,0xcc,0xa7,0x00,0x01,0xff,0x72,0xcc,0xa7,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x52,0xcc,0x8c,0x00,0x01,0xff,0x72,0xcc,0x8c, ++ 0x00,0x10,0x08,0x01,0xff,0x53,0xcc,0x81,0x00,0x01,0xff,0x73,0xcc,0x81,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x53,0xcc,0x82,0x00,0x01,0xff,0x73,0xcc,0x82,0x00,0x10, ++ 0x08,0x01,0xff,0x53,0xcc,0xa7,0x00,0x01,0xff,0x73,0xcc,0xa7,0x00,0xd4,0x74,0xd3, ++ 0x34,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x53,0xcc,0x8c,0x00,0x01,0xff,0x73, ++ 0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x54,0xcc,0xa7,0x00,0x01,0xff,0x74,0xcc,0xa7, ++ 0x00,0x91,0x10,0x10,0x08,0x01,0xff,0x54,0xcc,0x8c,0x00,0x01,0xff,0x74,0xcc,0x8c, ++ 0x00,0x01,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0x83,0x00,0x01, ++ 0xff,0x75,0xcc,0x83,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0x84,0x00,0x01,0xff,0x75, ++ 0xcc,0x84,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0x86,0x00,0x01,0xff,0x75, ++ 0xcc,0x86,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0x8a,0x00,0x01,0xff,0x75,0xcc,0x8a, ++ 0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0x8b,0x00,0x01, ++ 0xff,0x75,0xcc,0x8b,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0xa8,0x00,0x01,0xff,0x75, ++ 0xcc,0xa8,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc,0x82,0x00,0x01,0xff,0x77, ++ 0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x59,0xcc,0x82,0x00,0x01,0xff,0x79,0xcc,0x82, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x59,0xcc,0x88,0x00,0x01,0xff,0x5a, ++ 0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x7a,0xcc,0x81,0x00,0x01,0xff,0x5a,0xcc,0x87, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x7a,0xcc,0x87,0x00,0x01,0xff,0x5a,0xcc,0x8c, ++ 0x00,0x10,0x08,0x01,0xff,0x7a,0xcc,0x8c,0x00,0x01,0x00,0xd0,0x4a,0xcf,0x86,0x55, ++ 0x04,0x01,0x00,0xd4,0x2c,0xd3,0x18,0x92,0x14,0x91,0x10,0x10,0x08,0x01,0xff,0x4f, ++ 0xcc,0x9b,0x00,0x01,0xff,0x6f,0xcc,0x9b,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01, ++ 0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0x55,0xcc,0x9b,0x00,0x93, ++ 0x14,0x92,0x10,0x91,0x0c,0x10,0x08,0x01,0xff,0x75,0xcc,0x9b,0x00,0x01,0x00,0x01, ++ 0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0xb4,0xd4,0x24,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0x41,0xcc,0x8c,0x00,0x10, ++ 0x08,0x01,0xff,0x61,0xcc,0x8c,0x00,0x01,0xff,0x49,0xcc,0x8c,0x00,0xd3,0x46,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x69,0xcc,0x8c,0x00,0x01,0xff,0x4f,0xcc,0x8c, ++ 0x00,0x10,0x08,0x01,0xff,0x6f,0xcc,0x8c,0x00,0x01,0xff,0x55,0xcc,0x8c,0x00,0xd1, ++ 0x12,0x10,0x08,0x01,0xff,0x75,0xcc,0x8c,0x00,0x01,0xff,0x55,0xcc,0x88,0xcc,0x84, ++ 0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88,0xcc,0x84,0x00,0x01,0xff,0x55,0xcc,0x88, ++ 0xcc,0x81,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88,0xcc,0x81, ++ 0x00,0x01,0xff,0x55,0xcc,0x88,0xcc,0x8c,0x00,0x10,0x0a,0x01,0xff,0x75,0xcc,0x88, ++ 0xcc,0x8c,0x00,0x01,0xff,0x55,0xcc,0x88,0xcc,0x80,0x00,0xd1,0x0e,0x10,0x0a,0x01, ++ 0xff,0x75,0xcc,0x88,0xcc,0x80,0x00,0x01,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x88, ++ 0xcc,0x84,0x00,0x01,0xff,0x61,0xcc,0x88,0xcc,0x84,0x00,0xd4,0x80,0xd3,0x3a,0xd2, ++ 0x26,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0x87,0xcc,0x84,0x00,0x01,0xff,0x61, ++ 0xcc,0x87,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xc3,0x86,0xcc,0x84,0x00,0x01,0xff, ++ 0xc3,0xa6,0xcc,0x84,0x00,0x51,0x04,0x01,0x00,0x10,0x08,0x01,0xff,0x47,0xcc,0x8c, ++ 0x00,0x01,0xff,0x67,0xcc,0x8c,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x4b, ++ 0xcc,0x8c,0x00,0x01,0xff,0x6b,0xcc,0x8c,0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0xa8, ++ 0x00,0x01,0xff,0x6f,0xcc,0xa8,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0xa8, ++ 0xcc,0x84,0x00,0x01,0xff,0x6f,0xcc,0xa8,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xc6, ++ 0xb7,0xcc,0x8c,0x00,0x01,0xff,0xca,0x92,0xcc,0x8c,0x00,0xd3,0x24,0xd2,0x10,0x91, ++ 0x0c,0x10,0x08,0x01,0xff,0x6a,0xcc,0x8c,0x00,0x01,0x00,0x01,0x00,0x91,0x10,0x10, ++ 0x08,0x01,0xff,0x47,0xcc,0x81,0x00,0x01,0xff,0x67,0xcc,0x81,0x00,0x04,0x00,0xd2, ++ 0x24,0xd1,0x10,0x10,0x08,0x04,0xff,0x4e,0xcc,0x80,0x00,0x04,0xff,0x6e,0xcc,0x80, ++ 0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x8a,0xcc,0x81,0x00,0x01,0xff,0x61,0xcc,0x8a, ++ 0xcc,0x81,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xc3,0x86,0xcc,0x81,0x00,0x01,0xff, ++ 0xc3,0xa6,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xc3,0x98,0xcc,0x81,0x00,0x01,0xff, ++ 0xc3,0xb8,0xcc,0x81,0x00,0xe2,0x07,0x02,0xe1,0xae,0x01,0xe0,0x93,0x01,0xcf,0x86, ++ 0xd5,0xf4,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc, ++ 0x8f,0x00,0x01,0xff,0x61,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x41,0xcc,0x91,0x00, ++ 0x01,0xff,0x61,0xcc,0x91,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x45,0xcc,0x8f,0x00, ++ 0x01,0xff,0x65,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x45,0xcc,0x91,0x00,0x01,0xff, ++ 0x65,0xcc,0x91,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x8f,0x00, ++ 0x01,0xff,0x69,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0x91,0x00,0x01,0xff, ++ 0x69,0xcc,0x91,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4f,0xcc,0x8f,0x00,0x01,0xff, ++ 0x6f,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0x91,0x00,0x01,0xff,0x6f,0xcc, ++ 0x91,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x52,0xcc,0x8f,0x00, ++ 0x01,0xff,0x72,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x52,0xcc,0x91,0x00,0x01,0xff, ++ 0x72,0xcc,0x91,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0x8f,0x00,0x01,0xff, ++ 0x75,0xcc,0x8f,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0x91,0x00,0x01,0xff,0x75,0xcc, ++ 0x91,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x04,0xff,0x53,0xcc,0xa6,0x00,0x04,0xff, ++ 0x73,0xcc,0xa6,0x00,0x10,0x08,0x04,0xff,0x54,0xcc,0xa6,0x00,0x04,0xff,0x74,0xcc, ++ 0xa6,0x00,0x51,0x04,0x04,0x00,0x10,0x08,0x04,0xff,0x48,0xcc,0x8c,0x00,0x04,0xff, ++ 0x68,0xcc,0x8c,0x00,0xd4,0x68,0xd3,0x20,0xd2,0x0c,0x91,0x08,0x10,0x04,0x06,0x00, ++ 0x07,0x00,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x08,0x04,0xff,0x41,0xcc,0x87,0x00, ++ 0x04,0xff,0x61,0xcc,0x87,0x00,0xd2,0x24,0xd1,0x10,0x10,0x08,0x04,0xff,0x45,0xcc, ++ 0xa7,0x00,0x04,0xff,0x65,0xcc,0xa7,0x00,0x10,0x0a,0x04,0xff,0x4f,0xcc,0x88,0xcc, ++ 0x84,0x00,0x04,0xff,0x6f,0xcc,0x88,0xcc,0x84,0x00,0xd1,0x14,0x10,0x0a,0x04,0xff, ++ 0x4f,0xcc,0x83,0xcc,0x84,0x00,0x04,0xff,0x6f,0xcc,0x83,0xcc,0x84,0x00,0x10,0x08, ++ 0x04,0xff,0x4f,0xcc,0x87,0x00,0x04,0xff,0x6f,0xcc,0x87,0x00,0x93,0x30,0xd2,0x24, ++ 0xd1,0x14,0x10,0x0a,0x04,0xff,0x4f,0xcc,0x87,0xcc,0x84,0x00,0x04,0xff,0x6f,0xcc, ++ 0x87,0xcc,0x84,0x00,0x10,0x08,0x04,0xff,0x59,0xcc,0x84,0x00,0x04,0xff,0x79,0xcc, ++ 0x84,0x00,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00,0x08,0x00,0x08,0x00,0xcf,0x86, ++ 0x95,0x14,0x94,0x10,0x93,0x0c,0x92,0x08,0x11,0x04,0x08,0x00,0x09,0x00,0x09,0x00, ++ 0x09,0x00,0x01,0x00,0x01,0x00,0xd0,0x22,0xcf,0x86,0x55,0x04,0x01,0x00,0x94,0x18, ++ 0x53,0x04,0x01,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x04,0x00,0x04,0x00, ++ 0x11,0x04,0x04,0x00,0x07,0x00,0x01,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04,0x01,0x00, ++ 0x53,0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00, ++ 0x04,0x00,0x94,0x18,0x53,0x04,0x01,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x04,0x00, ++ 0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x07,0x00,0x07,0x00,0xe1,0x35,0x01,0xd0, ++ 0x72,0xcf,0x86,0xd5,0x24,0x54,0x04,0x01,0xe6,0xd3,0x10,0x52,0x04,0x01,0xe6,0x91, ++ 0x08,0x10,0x04,0x01,0xe6,0x01,0xe8,0x01,0xdc,0x92,0x0c,0x51,0x04,0x01,0xdc,0x10, ++ 0x04,0x01,0xe8,0x01,0xd8,0x01,0xdc,0xd4,0x2c,0xd3,0x1c,0xd2,0x10,0xd1,0x08,0x10, ++ 0x04,0x01,0xdc,0x01,0xca,0x10,0x04,0x01,0xca,0x01,0xdc,0x51,0x04,0x01,0xdc,0x10, ++ 0x04,0x01,0xdc,0x01,0xca,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0xca,0x01,0xdc,0x01, ++ 0xdc,0x01,0xdc,0xd3,0x08,0x12,0x04,0x01,0xdc,0x01,0x01,0xd2,0x0c,0x91,0x08,0x10, ++ 0x04,0x01,0x01,0x01,0xdc,0x01,0xdc,0x91,0x08,0x10,0x04,0x01,0xdc,0x01,0xe6,0x01, ++ 0xe6,0xcf,0x86,0xd5,0x7f,0xd4,0x47,0xd3,0x2e,0xd2,0x19,0xd1,0x0e,0x10,0x07,0x01, ++ 0xff,0xcc,0x80,0x00,0x01,0xff,0xcc,0x81,0x00,0x10,0x04,0x01,0xe6,0x01,0xff,0xcc, ++ 0x93,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xcc,0x88,0xcc,0x81,0x00,0x01,0xf0,0x10, ++ 0x04,0x04,0xe6,0x04,0xdc,0xd2,0x08,0x11,0x04,0x04,0xdc,0x04,0xe6,0xd1,0x08,0x10, ++ 0x04,0x04,0xe6,0x04,0xdc,0x10,0x04,0x04,0xdc,0x06,0xff,0x00,0xd3,0x18,0xd2,0x0c, ++ 0x51,0x04,0x07,0xe6,0x10,0x04,0x07,0xe6,0x07,0xdc,0x51,0x04,0x07,0xdc,0x10,0x04, ++ 0x07,0xdc,0x07,0xe6,0xd2,0x10,0xd1,0x08,0x10,0x04,0x08,0xe8,0x08,0xdc,0x10,0x04, ++ 0x08,0xdc,0x08,0xe6,0xd1,0x08,0x10,0x04,0x08,0xe9,0x07,0xea,0x10,0x04,0x07,0xea, ++ 0x07,0xe9,0xd4,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x01,0xea,0x10,0x04,0x04,0xe9, ++ 0x06,0xe6,0x06,0xe6,0x06,0xe6,0xd3,0x13,0x52,0x04,0x0a,0x00,0x91,0x0b,0x10,0x07, ++ 0x01,0xff,0xca,0xb9,0x00,0x01,0x00,0x0a,0x00,0xd2,0x0c,0x51,0x04,0x00,0x00,0x10, ++ 0x04,0x01,0x00,0x09,0x00,0x51,0x04,0x09,0x00,0x10,0x06,0x01,0xff,0x3b,0x00,0x10, ++ 0x00,0xd0,0xe1,0xcf,0x86,0xd5,0x7a,0xd4,0x5f,0xd3,0x21,0x52,0x04,0x00,0x00,0xd1, ++ 0x0d,0x10,0x04,0x01,0x00,0x01,0xff,0xc2,0xa8,0xcc,0x81,0x00,0x10,0x09,0x01,0xff, ++ 0xce,0x91,0xcc,0x81,0x00,0x01,0xff,0xc2,0xb7,0x00,0xd2,0x1f,0xd1,0x12,0x10,0x09, ++ 0x01,0xff,0xce,0x95,0xcc,0x81,0x00,0x01,0xff,0xce,0x97,0xcc,0x81,0x00,0x10,0x09, ++ 0x01,0xff,0xce,0x99,0xcc,0x81,0x00,0x00,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xce, ++ 0x9f,0xcc,0x81,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xa5,0xcc,0x81,0x00,0x01, ++ 0xff,0xce,0xa9,0xcc,0x81,0x00,0x93,0x17,0x92,0x13,0x91,0x0f,0x10,0x0b,0x01,0xff, ++ 0xce,0xb9,0xcc,0x88,0xcc,0x81,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4, ++ 0x4a,0xd3,0x10,0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x01, ++ 0x00,0xd2,0x16,0x51,0x04,0x01,0x00,0x10,0x09,0x01,0xff,0xce,0x99,0xcc,0x88,0x00, ++ 0x01,0xff,0xce,0xa5,0xcc,0x88,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc, ++ 0x81,0x00,0x01,0xff,0xce,0xb5,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc, ++ 0x81,0x00,0x01,0xff,0xce,0xb9,0xcc,0x81,0x00,0x93,0x17,0x92,0x13,0x91,0x0f,0x10, ++ 0x0b,0x01,0xff,0xcf,0x85,0xcc,0x88,0xcc,0x81,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0xcf,0x86,0xd5,0x7b,0xd4,0x39,0x53,0x04,0x01,0x00,0xd2,0x16,0x51,0x04, ++ 0x01,0x00,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x88,0x00,0x01,0xff,0xcf,0x85,0xcc, ++ 0x88,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xbf,0xcc,0x81,0x00,0x01,0xff,0xcf, ++ 0x85,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xcf,0x89,0xcc,0x81,0x00,0x0a,0x00,0xd3, ++ 0x26,0xd2,0x11,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xcf,0x92,0xcc, ++ 0x81,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xcf,0x92,0xcc,0x88,0x00,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x04,0x00,0xd2,0x0c,0x51,0x04,0x06,0x00,0x10,0x04,0x01,0x00,0x04, ++ 0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x04,0x00,0x10,0x04,0x01,0x00,0x04,0x00,0xd4, ++ 0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x04,0x00,0x01,0x00,0x01, ++ 0x00,0x01,0x00,0xd3,0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x05,0x00,0x10,0x04,0x06, ++ 0x00,0x07,0x00,0x12,0x04,0x07,0x00,0x08,0x00,0xe3,0x47,0x04,0xe2,0xbe,0x02,0xe1, ++ 0x07,0x01,0xd0,0x8b,0xcf,0x86,0xd5,0x6c,0xd4,0x53,0xd3,0x30,0xd2,0x1f,0xd1,0x12, ++ 0x10,0x09,0x04,0xff,0xd0,0x95,0xcc,0x80,0x00,0x01,0xff,0xd0,0x95,0xcc,0x88,0x00, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xd0,0x93,0xcc,0x81,0x00,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x01,0xff,0xd0,0x86,0xcc,0x88,0x00,0x52,0x04,0x01,0x00,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xd0,0x9a,0xcc,0x81,0x00,0x04,0xff,0xd0,0x98,0xcc,0x80,0x00, ++ 0x10,0x09,0x01,0xff,0xd0,0xa3,0xcc,0x86,0x00,0x01,0x00,0x53,0x04,0x01,0x00,0x92, ++ 0x11,0x91,0x0d,0x10,0x04,0x01,0x00,0x01,0xff,0xd0,0x98,0xcc,0x86,0x00,0x01,0x00, ++ 0x01,0x00,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0x92,0x11,0x91,0x0d,0x10,0x04, ++ 0x01,0x00,0x01,0xff,0xd0,0xb8,0xcc,0x86,0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0xd5, ++ 0x57,0x54,0x04,0x01,0x00,0xd3,0x30,0xd2,0x1f,0xd1,0x12,0x10,0x09,0x04,0xff,0xd0, ++ 0xb5,0xcc,0x80,0x00,0x01,0xff,0xd0,0xb5,0xcc,0x88,0x00,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xd0,0xb3,0xcc,0x81,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff, ++ 0xd1,0x96,0xcc,0x88,0x00,0x52,0x04,0x01,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd0, ++ 0xba,0xcc,0x81,0x00,0x04,0xff,0xd0,0xb8,0xcc,0x80,0x00,0x10,0x09,0x01,0xff,0xd1, ++ 0x83,0xcc,0x86,0x00,0x01,0x00,0x54,0x04,0x01,0x00,0x93,0x1a,0x52,0x04,0x01,0x00, ++ 0x51,0x04,0x01,0x00,0x10,0x09,0x01,0xff,0xd1,0xb4,0xcc,0x8f,0x00,0x01,0xff,0xd1, ++ 0xb5,0xcc,0x8f,0x00,0x01,0x00,0xd0,0x2e,0xcf,0x86,0x95,0x28,0x94,0x24,0xd3,0x18, ++ 0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xe6,0x51,0x04,0x01,0xe6, ++ 0x10,0x04,0x01,0xe6,0x0a,0xe6,0x92,0x08,0x11,0x04,0x04,0x00,0x06,0x00,0x04,0x00, ++ 0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0xbe,0xd4,0x4a,0xd3,0x2a,0xd2,0x1a,0xd1,0x0d, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xd0,0x96,0xcc,0x86,0x00,0x10,0x09,0x01,0xff,0xd0, ++ 0xb6,0xcc,0x86,0x00,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x06,0x00,0x10,0x04, ++ 0x06,0x00,0x01,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x06,0x00,0x10,0x04, ++ 0x06,0x00,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x06,0x00,0x10,0x04,0x06,0x00, ++ 0x09,0x00,0xd3,0x3a,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd0,0x90,0xcc,0x86, ++ 0x00,0x01,0xff,0xd0,0xb0,0xcc,0x86,0x00,0x10,0x09,0x01,0xff,0xd0,0x90,0xcc,0x88, ++ 0x00,0x01,0xff,0xd0,0xb0,0xcc,0x88,0x00,0x51,0x04,0x01,0x00,0x10,0x09,0x01,0xff, ++ 0xd0,0x95,0xcc,0x86,0x00,0x01,0xff,0xd0,0xb5,0xcc,0x86,0x00,0xd2,0x16,0x51,0x04, ++ 0x01,0x00,0x10,0x09,0x01,0xff,0xd3,0x98,0xcc,0x88,0x00,0x01,0xff,0xd3,0x99,0xcc, ++ 0x88,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd0,0x96,0xcc,0x88,0x00,0x01,0xff,0xd0, ++ 0xb6,0xcc,0x88,0x00,0x10,0x09,0x01,0xff,0xd0,0x97,0xcc,0x88,0x00,0x01,0xff,0xd0, ++ 0xb7,0xcc,0x88,0x00,0xd4,0x74,0xd3,0x3a,0xd2,0x16,0x51,0x04,0x01,0x00,0x10,0x09, ++ 0x01,0xff,0xd0,0x98,0xcc,0x84,0x00,0x01,0xff,0xd0,0xb8,0xcc,0x84,0x00,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xd0,0x98,0xcc,0x88,0x00,0x01,0xff,0xd0,0xb8,0xcc,0x88,0x00, ++ 0x10,0x09,0x01,0xff,0xd0,0x9e,0xcc,0x88,0x00,0x01,0xff,0xd0,0xbe,0xcc,0x88,0x00, ++ 0xd2,0x16,0x51,0x04,0x01,0x00,0x10,0x09,0x01,0xff,0xd3,0xa8,0xcc,0x88,0x00,0x01, ++ 0xff,0xd3,0xa9,0xcc,0x88,0x00,0xd1,0x12,0x10,0x09,0x04,0xff,0xd0,0xad,0xcc,0x88, ++ 0x00,0x04,0xff,0xd1,0x8d,0xcc,0x88,0x00,0x10,0x09,0x01,0xff,0xd0,0xa3,0xcc,0x84, ++ 0x00,0x01,0xff,0xd1,0x83,0xcc,0x84,0x00,0xd3,0x3a,0xd2,0x24,0xd1,0x12,0x10,0x09, ++ 0x01,0xff,0xd0,0xa3,0xcc,0x88,0x00,0x01,0xff,0xd1,0x83,0xcc,0x88,0x00,0x10,0x09, ++ 0x01,0xff,0xd0,0xa3,0xcc,0x8b,0x00,0x01,0xff,0xd1,0x83,0xcc,0x8b,0x00,0x91,0x12, ++ 0x10,0x09,0x01,0xff,0xd0,0xa7,0xcc,0x88,0x00,0x01,0xff,0xd1,0x87,0xcc,0x88,0x00, ++ 0x08,0x00,0x92,0x16,0x91,0x12,0x10,0x09,0x01,0xff,0xd0,0xab,0xcc,0x88,0x00,0x01, ++ 0xff,0xd1,0x8b,0xcc,0x88,0x00,0x09,0x00,0x09,0x00,0xd1,0x74,0xd0,0x36,0xcf,0x86, ++ 0xd5,0x10,0x54,0x04,0x06,0x00,0x93,0x08,0x12,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00, ++ 0xd4,0x10,0x93,0x0c,0x52,0x04,0x0a,0x00,0x11,0x04,0x0b,0x00,0x0c,0x00,0x10,0x00, ++ 0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0xcf,0x86,0xd5,0x24,0x54,0x04,0x01,0x00,0xd3,0x10,0x52,0x04,0x01,0x00, ++ 0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x14,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd0,0xba, ++ 0xcf,0x86,0xd5,0x4c,0xd4,0x24,0x53,0x04,0x01,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04, ++ 0x14,0x00,0x01,0x00,0x10,0x04,0x04,0x00,0x00,0x00,0xd1,0x08,0x10,0x04,0x00,0x00, ++ 0x10,0x00,0x10,0x04,0x10,0x00,0x0d,0x00,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04, ++ 0x00,0x00,0x02,0xdc,0x02,0xe6,0x51,0x04,0x02,0xe6,0x10,0x04,0x02,0xdc,0x02,0xe6, ++ 0x92,0x0c,0x51,0x04,0x02,0xe6,0x10,0x04,0x02,0xde,0x02,0xdc,0x02,0xe6,0xd4,0x2c, ++ 0xd3,0x10,0x92,0x0c,0x51,0x04,0x02,0xe6,0x10,0x04,0x08,0xdc,0x02,0xdc,0x02,0xdc, ++ 0xd2,0x0c,0x51,0x04,0x02,0xe6,0x10,0x04,0x02,0xdc,0x02,0xe6,0xd1,0x08,0x10,0x04, ++ 0x02,0xe6,0x02,0xde,0x10,0x04,0x02,0xe4,0x02,0xe6,0xd3,0x20,0xd2,0x10,0xd1,0x08, ++ 0x10,0x04,0x01,0x0a,0x01,0x0b,0x10,0x04,0x01,0x0c,0x01,0x0d,0xd1,0x08,0x10,0x04, ++ 0x01,0x0e,0x01,0x0f,0x10,0x04,0x01,0x10,0x01,0x11,0xd2,0x10,0xd1,0x08,0x10,0x04, ++ 0x01,0x12,0x01,0x13,0x10,0x04,0x09,0x13,0x01,0x14,0xd1,0x08,0x10,0x04,0x01,0x15, ++ 0x01,0x16,0x10,0x04,0x01,0x00,0x01,0x17,0xcf,0x86,0xd5,0x28,0x94,0x24,0x93,0x20, ++ 0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x01,0x18,0x10,0x04,0x01,0x19,0x01,0x00, ++ 0xd1,0x08,0x10,0x04,0x02,0xe6,0x08,0xdc,0x10,0x04,0x08,0x00,0x08,0x12,0x00,0x00, ++ 0x01,0x00,0xd4,0x1c,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04, ++ 0x01,0x00,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x14,0x00,0x93,0x10, ++ 0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xe2,0xfb,0x01,0xe1,0x2b,0x01,0xd0,0xa8,0xcf,0x86,0xd5,0x55,0xd4,0x28,0xd3,0x10, ++ 0x52,0x04,0x07,0x00,0x91,0x08,0x10,0x04,0x0d,0x00,0x10,0x00,0x0a,0x00,0xd2,0x0c, ++ 0x51,0x04,0x0a,0x00,0x10,0x04,0x0a,0x00,0x08,0x00,0x91,0x08,0x10,0x04,0x01,0x00, ++ 0x07,0x00,0x07,0x00,0xd3,0x0c,0x52,0x04,0x07,0xe6,0x11,0x04,0x07,0xe6,0x0a,0xe6, ++ 0xd2,0x10,0xd1,0x08,0x10,0x04,0x0a,0x1e,0x0a,0x1f,0x10,0x04,0x0a,0x20,0x01,0x00, ++ 0xd1,0x09,0x10,0x05,0x0f,0xff,0x00,0x00,0x00,0x10,0x04,0x08,0x00,0x01,0x00,0xd4, ++ 0x3d,0x93,0x39,0xd2,0x1a,0xd1,0x08,0x10,0x04,0x0c,0x00,0x01,0x00,0x10,0x09,0x01, ++ 0xff,0xd8,0xa7,0xd9,0x93,0x00,0x01,0xff,0xd8,0xa7,0xd9,0x94,0x00,0xd1,0x12,0x10, ++ 0x09,0x01,0xff,0xd9,0x88,0xd9,0x94,0x00,0x01,0xff,0xd8,0xa7,0xd9,0x95,0x00,0x10, ++ 0x09,0x01,0xff,0xd9,0x8a,0xd9,0x94,0x00,0x01,0x00,0x01,0x00,0x53,0x04,0x01,0x00, ++ 0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x0a,0x00,0x0a,0x00,0xcf,0x86, ++ 0xd5,0x5c,0xd4,0x20,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04, ++ 0x01,0x00,0x01,0x1b,0xd1,0x08,0x10,0x04,0x01,0x1c,0x01,0x1d,0x10,0x04,0x01,0x1e, ++ 0x01,0x1f,0xd3,0x20,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x20,0x01,0x21,0x10,0x04, ++ 0x01,0x22,0x04,0xe6,0xd1,0x08,0x10,0x04,0x04,0xe6,0x04,0xdc,0x10,0x04,0x07,0xdc, ++ 0x07,0xe6,0xd2,0x0c,0x91,0x08,0x10,0x04,0x07,0xe6,0x08,0xe6,0x08,0xe6,0xd1,0x08, ++ 0x10,0x04,0x08,0xdc,0x08,0xe6,0x10,0x04,0x08,0xe6,0x0c,0xdc,0xd4,0x10,0x53,0x04, ++ 0x01,0x00,0x52,0x04,0x01,0x00,0x11,0x04,0x01,0x00,0x06,0x00,0x93,0x10,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x01,0x23,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd0,0x22, ++ 0xcf,0x86,0x55,0x04,0x01,0x00,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x08, ++ 0x11,0x04,0x04,0x00,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x04,0x00, ++ 0xcf,0x86,0xd5,0x5b,0xd4,0x2e,0xd3,0x1e,0x92,0x1a,0xd1,0x0d,0x10,0x09,0x01,0xff, ++ 0xdb,0x95,0xd9,0x94,0x00,0x01,0x00,0x10,0x09,0x01,0xff,0xdb,0x81,0xd9,0x94,0x00, ++ 0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00, ++ 0x04,0x00,0xd3,0x19,0xd2,0x11,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff, ++ 0xdb,0x92,0xd9,0x94,0x00,0x11,0x04,0x01,0x00,0x01,0xe6,0x52,0x04,0x01,0xe6,0xd1, ++ 0x08,0x10,0x04,0x01,0xe6,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xe6,0xd4,0x38,0xd3, ++ 0x1c,0xd2,0x0c,0x51,0x04,0x01,0xe6,0x10,0x04,0x01,0xe6,0x01,0xdc,0xd1,0x08,0x10, ++ 0x04,0x01,0xe6,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xe6,0xd2,0x10,0xd1,0x08,0x10, ++ 0x04,0x01,0xe6,0x01,0x00,0x10,0x04,0x01,0xdc,0x01,0xe6,0x91,0x08,0x10,0x04,0x01, ++ 0xe6,0x01,0xdc,0x07,0x00,0x53,0x04,0x01,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x04, ++ 0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x07,0x00,0xd1,0xc8,0xd0,0x76,0xcf, ++ 0x86,0xd5,0x28,0xd4,0x14,0x53,0x04,0x04,0x00,0x52,0x04,0x04,0x00,0x51,0x04,0x04, ++ 0x00,0x10,0x04,0x00,0x00,0x04,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x04, ++ 0x00,0x04,0x24,0x04,0x00,0x04,0x00,0x04,0x00,0xd4,0x14,0x53,0x04,0x04,0x00,0x52, ++ 0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x07,0x00,0x07,0x00,0xd3,0x1c,0xd2, ++ 0x0c,0x91,0x08,0x10,0x04,0x04,0xe6,0x04,0xdc,0x04,0xe6,0xd1,0x08,0x10,0x04,0x04, ++ 0xdc,0x04,0xe6,0x10,0x04,0x04,0xe6,0x04,0xdc,0xd2,0x0c,0x51,0x04,0x04,0xdc,0x10, ++ 0x04,0x04,0xe6,0x04,0xdc,0xd1,0x08,0x10,0x04,0x04,0xdc,0x04,0xe6,0x10,0x04,0x04, ++ 0xdc,0x04,0xe6,0xcf,0x86,0xd5,0x3c,0x94,0x38,0xd3,0x1c,0xd2,0x0c,0x51,0x04,0x04, ++ 0xe6,0x10,0x04,0x04,0xdc,0x04,0xe6,0xd1,0x08,0x10,0x04,0x04,0xdc,0x04,0xe6,0x10, ++ 0x04,0x04,0xdc,0x04,0xe6,0xd2,0x10,0xd1,0x08,0x10,0x04,0x04,0xdc,0x04,0xe6,0x10, ++ 0x04,0x04,0xe6,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x07,0x00,0x07,0x00,0x08, ++ 0x00,0x94,0x10,0x53,0x04,0x08,0x00,0x52,0x04,0x08,0x00,0x11,0x04,0x08,0x00,0x0a, ++ 0x00,0x0a,0x00,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x04,0x00,0x54,0x04,0x04,0x00,0x93, ++ 0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0xcf,0x86,0x55,0x04,0x09,0x00,0xd4,0x14,0x53,0x04,0x09,0x00,0x92,0x0c,0x51, ++ 0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x09,0xe6,0x09,0xe6,0xd3,0x10,0x92,0x0c,0x51, ++ 0x04,0x09,0xe6,0x10,0x04,0x09,0xdc,0x09,0xe6,0x09,0x00,0xd2,0x0c,0x51,0x04,0x09, ++ 0x00,0x10,0x04,0x09,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x14,0xdc,0x14, ++ 0x00,0xe4,0xf8,0x57,0xe3,0x45,0x3f,0xe2,0xf4,0x3e,0xe1,0xc7,0x2c,0xe0,0x21,0x10, ++ 0xcf,0x86,0xc5,0xe4,0x80,0x08,0xe3,0xcb,0x03,0xe2,0x61,0x01,0xd1,0x94,0xd0,0x5a, ++ 0xcf,0x86,0xd5,0x20,0x54,0x04,0x0b,0x00,0xd3,0x0c,0x52,0x04,0x0b,0x00,0x11,0x04, ++ 0x0b,0x00,0x0b,0xe6,0x92,0x0c,0x51,0x04,0x0b,0xe6,0x10,0x04,0x0b,0x00,0x0b,0xe6, ++ 0x0b,0xe6,0xd4,0x24,0xd3,0x10,0x52,0x04,0x0b,0xe6,0x91,0x08,0x10,0x04,0x0b,0x00, ++ 0x0b,0xe6,0x0b,0xe6,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0b,0x00,0x0b,0xe6,0x0b,0xe6, ++ 0x11,0x04,0x0b,0xe6,0x00,0x00,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00,0x51,0x04, ++ 0x0b,0x00,0x10,0x04,0x0b,0x00,0x00,0x00,0xcf,0x86,0xd5,0x20,0x54,0x04,0x0c,0x00, ++ 0x53,0x04,0x0c,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0c,0x00,0x0c,0xdc,0x0c,0xdc, ++ 0x51,0x04,0x00,0x00,0x10,0x04,0x0c,0x00,0x00,0x00,0x94,0x14,0x53,0x04,0x13,0x00, ++ 0x92,0x0c,0x51,0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xd0,0x4a,0xcf,0x86,0x55,0x04,0x00,0x00,0xd4,0x20,0xd3,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0d,0x00,0x10,0x00,0x0d,0x00,0x0d,0x00,0x52,0x04,0x0d,0x00,0x91,0x08, ++ 0x10,0x04,0x0d,0x00,0x10,0x00,0x10,0x00,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x10,0x00, ++ 0x10,0x04,0x10,0x00,0x11,0x00,0x91,0x08,0x10,0x04,0x11,0x00,0x00,0x00,0x12,0x00, ++ 0x52,0x04,0x12,0x00,0x11,0x04,0x12,0x00,0x00,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04, ++ 0x00,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x14,0xdc, ++ 0x12,0xe6,0x12,0xe6,0xd4,0x30,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x12,0xe6,0x10,0x04, ++ 0x12,0x00,0x11,0xdc,0x51,0x04,0x0d,0xe6,0x10,0x04,0x0d,0xdc,0x0d,0xe6,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x0d,0xe6,0x0d,0xdc,0x0d,0xe6,0x91,0x08,0x10,0x04,0x0d,0xe6, ++ 0x0d,0xdc,0x0d,0xdc,0xd3,0x1c,0xd2,0x10,0xd1,0x08,0x10,0x04,0x0d,0x1b,0x0d,0x1c, ++ 0x10,0x04,0x0d,0x1d,0x0d,0xe6,0x51,0x04,0x0d,0xe6,0x10,0x04,0x0d,0xdc,0x0d,0xe6, ++ 0xd2,0x10,0xd1,0x08,0x10,0x04,0x0d,0xe6,0x0d,0xdc,0x10,0x04,0x0d,0xdc,0x0d,0xe6, ++ 0x51,0x04,0x0d,0xe6,0x10,0x04,0x0d,0xe6,0x10,0xe6,0xe1,0x3a,0x01,0xd0,0x77,0xcf, ++ 0x86,0xd5,0x20,0x94,0x1c,0x93,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0b,0x00,0x01, ++ 0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x07,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01, ++ 0x00,0xd4,0x1b,0x53,0x04,0x01,0x00,0x92,0x13,0x91,0x0f,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xe0,0xa4,0xa8,0xe0,0xa4,0xbc,0x00,0x01,0x00,0x01,0x00,0xd3,0x26,0xd2,0x13, ++ 0x91,0x0f,0x10,0x04,0x01,0x00,0x01,0xff,0xe0,0xa4,0xb0,0xe0,0xa4,0xbc,0x00,0x01, ++ 0x00,0x91,0x0f,0x10,0x0b,0x01,0xff,0xe0,0xa4,0xb3,0xe0,0xa4,0xbc,0x00,0x01,0x00, ++ 0x01,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x0c,0x00,0x91,0x08,0x10,0x04,0x01,0x07, ++ 0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0x8c,0xd4,0x18,0x53,0x04,0x01,0x00,0x52,0x04, ++ 0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x01,0x09,0x10,0x04,0x0b,0x00,0x0c,0x00, ++ 0xd3,0x1c,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x01,0xe6,0x10,0x04,0x01,0xdc, ++ 0x01,0xe6,0x91,0x08,0x10,0x04,0x01,0xe6,0x0b,0x00,0x0c,0x00,0xd2,0x2c,0xd1,0x16, ++ 0x10,0x0b,0x01,0xff,0xe0,0xa4,0x95,0xe0,0xa4,0xbc,0x00,0x01,0xff,0xe0,0xa4,0x96, ++ 0xe0,0xa4,0xbc,0x00,0x10,0x0b,0x01,0xff,0xe0,0xa4,0x97,0xe0,0xa4,0xbc,0x00,0x01, ++ 0xff,0xe0,0xa4,0x9c,0xe0,0xa4,0xbc,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xe0,0xa4, ++ 0xa1,0xe0,0xa4,0xbc,0x00,0x01,0xff,0xe0,0xa4,0xa2,0xe0,0xa4,0xbc,0x00,0x10,0x0b, ++ 0x01,0xff,0xe0,0xa4,0xab,0xe0,0xa4,0xbc,0x00,0x01,0xff,0xe0,0xa4,0xaf,0xe0,0xa4, ++ 0xbc,0x00,0x54,0x04,0x01,0x00,0xd3,0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x01,0x00, ++ 0x0a,0x00,0x10,0x04,0x0a,0x00,0x0c,0x00,0x0c,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04, ++ 0x10,0x00,0x0b,0x00,0x10,0x04,0x0b,0x00,0x09,0x00,0x91,0x08,0x10,0x04,0x09,0x00, ++ 0x08,0x00,0x09,0x00,0xd0,0x86,0xcf,0x86,0xd5,0x44,0xd4,0x2c,0xd3,0x18,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x10,0x00,0x01,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00, ++ 0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00, ++ 0x10,0x04,0x00,0x00,0x01,0x00,0x93,0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04, ++ 0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00, ++ 0xd3,0x18,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00, ++ 0x91,0x08,0x10,0x04,0x01,0x07,0x07,0x00,0x01,0x00,0xcf,0x86,0xd5,0x7b,0xd4,0x42, ++ 0xd3,0x14,0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x01,0x00,0xd2,0x17,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x01,0xff,0xe0,0xa7,0x87,0xe0,0xa6,0xbe,0x00,0xd1,0x0f,0x10,0x0b,0x01, ++ 0xff,0xe0,0xa7,0x87,0xe0,0xa7,0x97,0x00,0x01,0x09,0x10,0x04,0x08,0x00,0x00,0x00, ++ 0xd3,0x10,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0x52,0x04,0x00,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xe0,0xa6,0xa1,0xe0,0xa6,0xbc, ++ 0x00,0x01,0xff,0xe0,0xa6,0xa2,0xe0,0xa6,0xbc,0x00,0x10,0x04,0x00,0x00,0x01,0xff, ++ 0xe0,0xa6,0xaf,0xe0,0xa6,0xbc,0x00,0xd4,0x10,0x93,0x0c,0x52,0x04,0x01,0x00,0x11, ++ 0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x01,0x00,0x0b,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x14,0xe6,0x00, ++ 0x00,0xe2,0x48,0x02,0xe1,0x4f,0x01,0xd0,0xa4,0xcf,0x86,0xd5,0x4c,0xd4,0x34,0xd3, ++ 0x1c,0xd2,0x10,0xd1,0x08,0x10,0x04,0x00,0x00,0x07,0x00,0x10,0x04,0x01,0x00,0x07, ++ 0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01, ++ 0x00,0x93,0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x00, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01,0x00,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd3,0x2e,0xd2,0x17,0xd1, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xe0,0xa8,0xb2, ++ 0xe0,0xa8,0xbc,0x00,0xd1,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x10,0x0b,0x01,0xff, ++ 0xe0,0xa8,0xb8,0xe0,0xa8,0xbc,0x00,0x00,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x00, ++ 0x00,0x91,0x08,0x10,0x04,0x01,0x07,0x00,0x00,0x01,0x00,0xcf,0x86,0xd5,0x80,0xd4, ++ 0x34,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x51, ++ 0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01, ++ 0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x01, ++ 0x09,0x00,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0a,0x00,0x00, ++ 0x00,0x00,0x00,0xd2,0x25,0xd1,0x0f,0x10,0x04,0x00,0x00,0x01,0xff,0xe0,0xa8,0x96, ++ 0xe0,0xa8,0xbc,0x00,0x10,0x0b,0x01,0xff,0xe0,0xa8,0x97,0xe0,0xa8,0xbc,0x00,0x01, ++ 0xff,0xe0,0xa8,0x9c,0xe0,0xa8,0xbc,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00, ++ 0x10,0x0b,0x01,0xff,0xe0,0xa8,0xab,0xe0,0xa8,0xbc,0x00,0x00,0x00,0xd4,0x10,0x93, ++ 0x0c,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x93,0x14,0x52, ++ 0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x0a,0x00,0x10,0x04,0x14,0x00,0x00, ++ 0x00,0x00,0x00,0xd0,0x82,0xcf,0x86,0xd5,0x40,0xd4,0x2c,0xd3,0x18,0xd2,0x0c,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01, ++ 0x00,0x01,0x00,0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x07,0x00,0x01,0x00,0x10, ++ 0x04,0x00,0x00,0x01,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x00, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01,0x00,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd3,0x18,0xd2,0x0c,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01, ++ 0x00,0x01,0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x01, ++ 0x07,0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0x3c,0xd4,0x28,0xd3,0x10,0x52,0x04,0x01, ++ 0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x01,0x09,0x00, ++ 0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0xd4,0x18,0x93,0x14,0xd2,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x07, ++ 0x00,0x07,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd3,0x10,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x0d,0x00,0x07,0x00,0x00,0x00,0x00,0x00,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x11,0x00,0x13,0x00,0x13,0x00,0xe1,0x24,0x01,0xd0,0x86,0xcf,0x86, ++ 0xd5,0x44,0xd4,0x2c,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00, ++ 0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x93,0x14, ++ 0x92,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04, ++ 0x01,0x00,0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x07,0x00,0x01,0x00, ++ 0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x01,0x07,0x01,0x00, ++ 0x01,0x00,0xcf,0x86,0xd5,0x73,0xd4,0x45,0xd3,0x14,0x52,0x04,0x01,0x00,0xd1,0x08, ++ 0x10,0x04,0x0a,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0xd2,0x1e,0xd1,0x0f, ++ 0x10,0x0b,0x01,0xff,0xe0,0xad,0x87,0xe0,0xad,0x96,0x00,0x00,0x00,0x10,0x04,0x00, ++ 0x00,0x01,0xff,0xe0,0xad,0x87,0xe0,0xac,0xbe,0x00,0x91,0x0f,0x10,0x0b,0x01,0xff, ++ 0xe0,0xad,0x87,0xe0,0xad,0x97,0x00,0x01,0x09,0x00,0x00,0xd3,0x0c,0x52,0x04,0x00, ++ 0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x52,0x04,0x00,0x00,0xd1,0x16,0x10,0x0b,0x01, ++ 0xff,0xe0,0xac,0xa1,0xe0,0xac,0xbc,0x00,0x01,0xff,0xe0,0xac,0xa2,0xe0,0xac,0xbc, ++ 0x00,0x10,0x04,0x00,0x00,0x01,0x00,0xd4,0x14,0x93,0x10,0xd2,0x08,0x11,0x04,0x01, ++ 0x00,0x0a,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x93,0x10,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x07,0x00,0x0c,0x00,0x0c,0x00,0x00,0x00,0xd0,0xb1,0xcf, ++ 0x86,0xd5,0x63,0xd4,0x28,0xd3,0x14,0xd2,0x08,0x11,0x04,0x00,0x00,0x01,0x00,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0xd3,0x1f,0xd2,0x0c,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x91,0x0f,0x10,0x0b,0x01,0xff,0xe0, ++ 0xae,0x92,0xe0,0xaf,0x97,0x00,0x01,0x00,0x00,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04, ++ 0x00,0x00,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x01,0x00,0xd4,0x2c,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0xd2,0x0c, ++ 0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00, ++ 0xd3,0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x08,0x00,0x01,0x00, ++ 0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0xcf,0x86, ++ 0xd5,0x61,0xd4,0x45,0xd3,0x14,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0xd2,0x1e,0xd1,0x08,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x10,0x0b,0x01,0xff,0xe0,0xaf,0x86,0xe0,0xae,0xbe,0x00,0x01,0xff,0xe0, ++ 0xaf,0x87,0xe0,0xae,0xbe,0x00,0x91,0x0f,0x10,0x0b,0x01,0xff,0xe0,0xaf,0x86,0xe0, ++ 0xaf,0x97,0x00,0x01,0x09,0x00,0x00,0x93,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0a, ++ 0x00,0x00,0x00,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0x00, ++ 0x00,0xd4,0x14,0x93,0x10,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x08, ++ 0x00,0x01,0x00,0x01,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x07,0x00,0x07,0x00,0x92,0x0c,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00,0x00, ++ 0x00,0x00,0x00,0xe3,0x1c,0x04,0xe2,0x1a,0x02,0xd1,0xf3,0xd0,0x76,0xcf,0x86,0xd5, ++ 0x3c,0xd4,0x28,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x10,0x00,0x01,0x00,0x01, ++ 0x00,0x91,0x08,0x10,0x04,0x14,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0x91, ++ 0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01, ++ 0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd3, ++ 0x10,0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04,0x10,0x00,0x01,0x00,0x01,0x00,0xd2, ++ 0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x0a,0x00,0x01, ++ 0x00,0xcf,0x86,0xd5,0x53,0xd4,0x2f,0xd3,0x10,0x52,0x04,0x01,0x00,0x91,0x08,0x10, ++ 0x04,0x01,0x00,0x00,0x00,0x01,0x00,0xd2,0x13,0x91,0x0f,0x10,0x0b,0x01,0xff,0xe0, ++ 0xb1,0x86,0xe0,0xb1,0x96,0x00,0x00,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00, ++ 0x01,0x09,0x00,0x00,0xd3,0x14,0x52,0x04,0x00,0x00,0xd1,0x08,0x10,0x04,0x00,0x00, ++ 0x01,0x54,0x10,0x04,0x01,0x5b,0x00,0x00,0x92,0x0c,0x51,0x04,0x0a,0x00,0x10,0x04, ++ 0x11,0x00,0x00,0x00,0x00,0x00,0xd4,0x14,0x93,0x10,0xd2,0x08,0x11,0x04,0x01,0x00, ++ 0x0a,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x93,0x10,0x52,0x04,0x00,0x00, ++ 0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x15,0x00,0x0a,0x00,0xd0,0x76,0xcf,0x86, ++ 0xd5,0x3c,0xd4,0x28,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x12,0x00,0x10,0x00, ++ 0x01,0x00,0x91,0x08,0x10,0x04,0x14,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00, ++ 0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x14,0x53,0x04, ++ 0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00, ++ 0xd3,0x10,0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00, ++ 0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x07,0x07,0x07,0x00, ++ 0x01,0x00,0xcf,0x86,0xd5,0x82,0xd4,0x5e,0xd3,0x2a,0xd2,0x13,0x91,0x0f,0x10,0x0b, ++ 0x01,0xff,0xe0,0xb2,0xbf,0xe0,0xb3,0x95,0x00,0x01,0x00,0x01,0x00,0xd1,0x08,0x10, ++ 0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xe0,0xb3,0x86,0xe0,0xb3, ++ 0x95,0x00,0xd2,0x28,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe0,0xb3,0x86,0xe0,0xb3,0x96, ++ 0x00,0x00,0x00,0x10,0x0b,0x01,0xff,0xe0,0xb3,0x86,0xe0,0xb3,0x82,0x00,0x01,0xff, ++ 0xe0,0xb3,0x86,0xe0,0xb3,0x82,0xe0,0xb3,0x95,0x00,0x91,0x08,0x10,0x04,0x01,0x00, ++ 0x01,0x09,0x00,0x00,0xd3,0x14,0x52,0x04,0x00,0x00,0xd1,0x08,0x10,0x04,0x00,0x00, ++ 0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00, ++ 0x10,0x04,0x01,0x00,0x00,0x00,0xd4,0x14,0x93,0x10,0xd2,0x08,0x11,0x04,0x01,0x00, ++ 0x09,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x93,0x14,0x92,0x10,0xd1,0x08, ++ 0x10,0x04,0x00,0x00,0x09,0x00,0x10,0x04,0x09,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xe1,0x06,0x01,0xd0,0x6e,0xcf,0x86,0xd5,0x3c,0xd4,0x28,0xd3,0x18,0xd2,0x0c,0x91, ++ 0x08,0x10,0x04,0x13,0x00,0x10,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x01, ++ 0x00,0x01,0x00,0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01, ++ 0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01, ++ 0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x01, ++ 0x00,0x0c,0x00,0x01,0x00,0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x0c,0x00,0x13,0x09,0x91,0x08,0x10,0x04,0x13,0x09,0x0a,0x00,0x01, ++ 0x00,0xcf,0x86,0xd5,0x65,0xd4,0x45,0xd3,0x10,0x52,0x04,0x01,0x00,0x91,0x08,0x10, ++ 0x04,0x0a,0x00,0x00,0x00,0x01,0x00,0xd2,0x1e,0xd1,0x08,0x10,0x04,0x01,0x00,0x00, ++ 0x00,0x10,0x0b,0x01,0xff,0xe0,0xb5,0x86,0xe0,0xb4,0xbe,0x00,0x01,0xff,0xe0,0xb5, ++ 0x87,0xe0,0xb4,0xbe,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe0,0xb5,0x86,0xe0,0xb5, ++ 0x97,0x00,0x01,0x09,0x10,0x04,0x0c,0x00,0x12,0x00,0xd3,0x10,0x52,0x04,0x00,0x00, ++ 0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x01,0x00,0x52,0x04,0x12,0x00,0x51,0x04, ++ 0x12,0x00,0x10,0x04,0x12,0x00,0x11,0x00,0xd4,0x14,0x93,0x10,0xd2,0x08,0x11,0x04, ++ 0x01,0x00,0x0a,0x00,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd3,0x0c,0x52,0x04, ++ 0x0a,0x00,0x11,0x04,0x0a,0x00,0x12,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x12,0x00, ++ 0x0a,0x00,0x0a,0x00,0x0a,0x00,0xd0,0x5a,0xcf,0x86,0xd5,0x34,0xd4,0x18,0x93,0x14, ++ 0xd2,0x08,0x11,0x04,0x00,0x00,0x04,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x04,0x00, ++ 0x04,0x00,0x04,0x00,0xd3,0x10,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04, ++ 0x04,0x00,0x00,0x00,0x92,0x08,0x11,0x04,0x00,0x00,0x04,0x00,0x04,0x00,0x54,0x04, ++ 0x04,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x04,0x00,0x10,0x04,0x00,0x00,0x04,0x00, ++ 0x04,0x00,0x52,0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x04,0x00,0x00,0x00, ++ 0xcf,0x86,0xd5,0x77,0xd4,0x28,0xd3,0x10,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00, ++ 0x10,0x04,0x04,0x00,0x00,0x00,0xd2,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x04,0x09, ++ 0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x04,0x00,0xd3,0x14,0x52,0x04, ++ 0x04,0x00,0xd1,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x10,0x04,0x04,0x00,0x00,0x00, ++ 0xd2,0x13,0x51,0x04,0x04,0x00,0x10,0x0b,0x04,0xff,0xe0,0xb7,0x99,0xe0,0xb7,0x8a, ++ 0x00,0x04,0x00,0xd1,0x19,0x10,0x0b,0x04,0xff,0xe0,0xb7,0x99,0xe0,0xb7,0x8f,0x00, ++ 0x04,0xff,0xe0,0xb7,0x99,0xe0,0xb7,0x8f,0xe0,0xb7,0x8a,0x00,0x10,0x0b,0x04,0xff, ++ 0xe0,0xb7,0x99,0xe0,0xb7,0x9f,0x00,0x04,0x00,0xd4,0x10,0x93,0x0c,0x52,0x04,0x00, ++ 0x00,0x11,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x93,0x14,0xd2,0x08,0x11,0x04,0x00, ++ 0x00,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xe2, ++ 0x31,0x01,0xd1,0x58,0xd0,0x3a,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x67,0x10,0x04, ++ 0x01,0x09,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x01,0x00,0xcf,0x86, ++ 0x95,0x18,0xd4,0x0c,0x53,0x04,0x01,0x00,0x12,0x04,0x01,0x6b,0x01,0x00,0x53,0x04, ++ 0x01,0x00,0x12,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0xd0,0x9e,0xcf,0x86,0xd5,0x54, ++ 0xd4,0x3c,0xd3,0x20,0xd2,0x10,0xd1,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x10,0x04, ++ 0x01,0x00,0x00,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x15,0x00, ++ 0x01,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x15,0x00,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x91,0x08,0x10,0x04,0x15,0x00,0x01,0x00,0x15,0x00,0xd3,0x08,0x12,0x04, ++ 0x15,0x00,0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x15,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0xd4,0x30,0xd3,0x1c,0xd2,0x0c,0x91,0x08,0x10,0x04,0x15,0x00,0x01,0x00, ++ 0x01,0x00,0xd1,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0xd2,0x08,0x11,0x04,0x15,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x15,0x00,0x01,0x00, ++ 0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x76,0x10,0x04,0x15,0x09, ++ 0x01,0x00,0x11,0x04,0x01,0x00,0x00,0x00,0xcf,0x86,0x95,0x34,0xd4,0x20,0xd3,0x14, ++ 0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x52,0x04,0x01,0x7a,0x11,0x04,0x01,0x00,0x00,0x00,0x53,0x04,0x01,0x00, ++ 0xd2,0x08,0x11,0x04,0x01,0x00,0x00,0x00,0x11,0x04,0x01,0x00,0x0d,0x00,0x00,0x00, ++ 0xe1,0x2b,0x01,0xd0,0x3e,0xcf,0x86,0xd5,0x14,0x54,0x04,0x02,0x00,0x53,0x04,0x02, ++ 0x00,0x92,0x08,0x11,0x04,0x02,0xdc,0x02,0x00,0x02,0x00,0x54,0x04,0x02,0x00,0xd3, ++ 0x14,0x52,0x04,0x02,0x00,0xd1,0x08,0x10,0x04,0x02,0x00,0x02,0xdc,0x10,0x04,0x02, ++ 0x00,0x02,0xdc,0x92,0x0c,0x91,0x08,0x10,0x04,0x02,0x00,0x02,0xd8,0x02,0x00,0x02, ++ 0x00,0xcf,0x86,0xd5,0x73,0xd4,0x36,0xd3,0x17,0x92,0x13,0x51,0x04,0x02,0x00,0x10, ++ 0x04,0x02,0x00,0x02,0xff,0xe0,0xbd,0x82,0xe0,0xbe,0xb7,0x00,0x02,0x00,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x00,0x00,0x02,0x00,0x02,0x00,0x91,0x0f,0x10,0x04,0x02,0x00, ++ 0x02,0xff,0xe0,0xbd,0x8c,0xe0,0xbe,0xb7,0x00,0x02,0x00,0xd3,0x26,0xd2,0x13,0x51, ++ 0x04,0x02,0x00,0x10,0x0b,0x02,0xff,0xe0,0xbd,0x91,0xe0,0xbe,0xb7,0x00,0x02,0x00, ++ 0x51,0x04,0x02,0x00,0x10,0x04,0x02,0x00,0x02,0xff,0xe0,0xbd,0x96,0xe0,0xbe,0xb7, ++ 0x00,0x52,0x04,0x02,0x00,0x91,0x0f,0x10,0x0b,0x02,0xff,0xe0,0xbd,0x9b,0xe0,0xbe, ++ 0xb7,0x00,0x02,0x00,0x02,0x00,0xd4,0x27,0x53,0x04,0x02,0x00,0xd2,0x17,0xd1,0x0f, ++ 0x10,0x04,0x02,0x00,0x02,0xff,0xe0,0xbd,0x80,0xe0,0xbe,0xb5,0x00,0x10,0x04,0x04, ++ 0x00,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a,0x00,0x00,0x00,0x00,0x00,0xd3,0x35,0xd2, ++ 0x17,0xd1,0x08,0x10,0x04,0x00,0x00,0x02,0x81,0x10,0x04,0x02,0x82,0x02,0xff,0xe0, ++ 0xbd,0xb1,0xe0,0xbd,0xb2,0x00,0xd1,0x0f,0x10,0x04,0x02,0x84,0x02,0xff,0xe0,0xbd, ++ 0xb1,0xe0,0xbd,0xb4,0x00,0x10,0x0b,0x02,0xff,0xe0,0xbe,0xb2,0xe0,0xbe,0x80,0x00, ++ 0x02,0x00,0xd2,0x13,0x91,0x0f,0x10,0x0b,0x02,0xff,0xe0,0xbe,0xb3,0xe0,0xbe,0x80, ++ 0x00,0x02,0x00,0x02,0x82,0x11,0x04,0x02,0x82,0x02,0x00,0xd0,0xd3,0xcf,0x86,0xd5, ++ 0x65,0xd4,0x27,0xd3,0x1f,0xd2,0x13,0x91,0x0f,0x10,0x04,0x02,0x82,0x02,0xff,0xe0, ++ 0xbd,0xb1,0xe0,0xbe,0x80,0x00,0x02,0xe6,0x91,0x08,0x10,0x04,0x02,0x09,0x02,0x00, ++ 0x02,0xe6,0x12,0x04,0x02,0x00,0x0c,0x00,0xd3,0x1f,0xd2,0x13,0x51,0x04,0x02,0x00, ++ 0x10,0x04,0x02,0x00,0x02,0xff,0xe0,0xbe,0x92,0xe0,0xbe,0xb7,0x00,0x51,0x04,0x02, ++ 0x00,0x10,0x04,0x04,0x00,0x02,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x02, ++ 0x00,0x02,0x00,0x91,0x0f,0x10,0x04,0x02,0x00,0x02,0xff,0xe0,0xbe,0x9c,0xe0,0xbe, ++ 0xb7,0x00,0x02,0x00,0xd4,0x3d,0xd3,0x26,0xd2,0x13,0x51,0x04,0x02,0x00,0x10,0x0b, ++ 0x02,0xff,0xe0,0xbe,0xa1,0xe0,0xbe,0xb7,0x00,0x02,0x00,0x51,0x04,0x02,0x00,0x10, ++ 0x04,0x02,0x00,0x02,0xff,0xe0,0xbe,0xa6,0xe0,0xbe,0xb7,0x00,0x52,0x04,0x02,0x00, ++ 0x91,0x0f,0x10,0x0b,0x02,0xff,0xe0,0xbe,0xab,0xe0,0xbe,0xb7,0x00,0x02,0x00,0x04, ++ 0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x02,0x00,0x02,0x00,0x02, ++ 0x00,0xd2,0x13,0x91,0x0f,0x10,0x04,0x04,0x00,0x02,0xff,0xe0,0xbe,0x90,0xe0,0xbe, ++ 0xb5,0x00,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0xcf,0x86, ++ 0x95,0x4c,0xd4,0x24,0xd3,0x10,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04, ++ 0x04,0xdc,0x04,0x00,0x52,0x04,0x04,0x00,0xd1,0x08,0x10,0x04,0x04,0x00,0x00,0x00, ++ 0x10,0x04,0x0a,0x00,0x04,0x00,0xd3,0x14,0xd2,0x08,0x11,0x04,0x08,0x00,0x0a,0x00, ++ 0x91,0x08,0x10,0x04,0x0a,0x00,0x0b,0x00,0x0b,0x00,0x92,0x10,0xd1,0x08,0x10,0x04, ++ 0x0b,0x00,0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86, ++ 0xe5,0xf7,0x04,0xe4,0x79,0x03,0xe3,0x7b,0x01,0xe2,0x04,0x01,0xd1,0x7f,0xd0,0x65, ++ 0xcf,0x86,0x55,0x04,0x04,0x00,0xd4,0x33,0xd3,0x1f,0xd2,0x0c,0x51,0x04,0x04,0x00, ++ 0x10,0x04,0x0a,0x00,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x0b,0x04,0xff,0xe1,0x80, ++ 0xa5,0xe1,0x80,0xae,0x00,0x04,0x00,0x92,0x10,0xd1,0x08,0x10,0x04,0x0a,0x00,0x04, ++ 0x00,0x10,0x04,0x04,0x00,0x0a,0x00,0x04,0x00,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x04, ++ 0x00,0x10,0x04,0x04,0x00,0x0a,0x00,0x51,0x04,0x0a,0x00,0x10,0x04,0x04,0x00,0x04, ++ 0x07,0x92,0x10,0xd1,0x08,0x10,0x04,0x04,0x00,0x04,0x09,0x10,0x04,0x0a,0x09,0x0a, ++ 0x00,0x0a,0x00,0xcf,0x86,0x95,0x14,0x54,0x04,0x04,0x00,0x53,0x04,0x04,0x00,0x92, ++ 0x08,0x11,0x04,0x04,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00,0xd0,0x2e,0xcf,0x86,0x95, ++ 0x28,0xd4,0x14,0x53,0x04,0x0a,0x00,0x52,0x04,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a, ++ 0x00,0x0a,0xdc,0x0a,0x00,0x53,0x04,0x0a,0x00,0xd2,0x08,0x11,0x04,0x0a,0x00,0x0b, ++ 0x00,0x11,0x04,0x0b,0x00,0x0a,0x00,0x01,0x00,0xcf,0x86,0xd5,0x24,0x94,0x20,0xd3, ++ 0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x00,0x00,0x0d,0x00,0x52, ++ 0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x0d,0x00,0x00,0x00,0x01,0x00,0x54, ++ 0x04,0x01,0x00,0xd3,0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x06,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x06,0x00,0x08,0x00,0x10,0x04,0x08, ++ 0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x08,0x00,0x0d,0x00,0x0d,0x00,0xd1,0x3e,0xd0, ++ 0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x1d,0x54,0x04,0x01,0x00,0x53,0x04,0x01, ++ 0x00,0xd2,0x08,0x11,0x04,0x01,0x00,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b, ++ 0x00,0x01,0xff,0x00,0x94,0x15,0x93,0x11,0x92,0x0d,0x91,0x09,0x10,0x05,0x01,0xff, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd0,0x1e,0xcf,0x86,0x55, ++ 0x04,0x01,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x0b,0x00,0x0b,0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0x54, ++ 0x04,0x01,0x00,0x53,0x04,0x01,0x00,0x92,0x08,0x11,0x04,0x01,0x00,0x0b,0x00,0x0b, ++ 0x00,0xe2,0x21,0x01,0xd1,0x6c,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x94,0x14,0x93,0x10, ++ 0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0x04,0x00, ++ 0x04,0x00,0x04,0x00,0xcf,0x86,0x95,0x48,0xd4,0x24,0xd3,0x10,0x52,0x04,0x04,0x00, ++ 0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04, ++ 0x04,0x00,0x00,0x00,0x04,0x00,0x11,0x04,0x04,0x00,0x00,0x00,0xd3,0x10,0x52,0x04, ++ 0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x00,0x00,0xd2,0x0c,0x91,0x08, ++ 0x10,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0x11,0x04,0x04,0x00,0x00,0x00,0x04,0x00, ++ 0xd0,0x62,0xcf,0x86,0xd5,0x28,0x94,0x24,0xd3,0x10,0x52,0x04,0x04,0x00,0x51,0x04, ++ 0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x04,0x00, ++ 0x00,0x00,0x04,0x00,0x11,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0xd4,0x14,0x53,0x04, ++ 0x04,0x00,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00, ++ 0xd3,0x14,0xd2,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0x11,0x04, ++ 0x04,0x00,0x00,0x00,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00, ++ 0x00,0x00,0xcf,0x86,0xd5,0x38,0xd4,0x24,0xd3,0x14,0xd2,0x0c,0x91,0x08,0x10,0x04, ++ 0x04,0x00,0x00,0x00,0x04,0x00,0x11,0x04,0x04,0x00,0x00,0x00,0x52,0x04,0x04,0x00, ++ 0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0x93,0x10,0x52,0x04,0x04,0x00, ++ 0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0x94,0x14,0x53,0x04, ++ 0x04,0x00,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00, ++ 0x04,0x00,0xd1,0x9c,0xd0,0x3e,0xcf,0x86,0x95,0x38,0xd4,0x14,0x53,0x04,0x04,0x00, ++ 0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0xd3,0x14, ++ 0xd2,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x04,0x00,0x11,0x04,0x04,0x00, ++ 0x00,0x00,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00, ++ 0x04,0x00,0xcf,0x86,0xd5,0x34,0xd4,0x14,0x93,0x10,0x52,0x04,0x04,0x00,0x51,0x04, ++ 0x04,0x00,0x10,0x04,0x04,0x00,0x08,0x00,0x04,0x00,0x53,0x04,0x04,0x00,0xd2,0x0c, ++ 0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x00,0x00,0xd1,0x08,0x10,0x04,0x00,0x00, ++ 0x0c,0xe6,0x10,0x04,0x0c,0xe6,0x08,0xe6,0xd4,0x14,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x08,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x53,0x04,0x04,0x00, ++ 0x52,0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0xd0,0x1a, ++ 0xcf,0x86,0x95,0x14,0x54,0x04,0x08,0x00,0x53,0x04,0x08,0x00,0x92,0x08,0x11,0x04, ++ 0x08,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0xcf,0x86,0x55,0x04,0x04,0x00,0x54,0x04, ++ 0x04,0x00,0xd3,0x10,0x52,0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x11,0x00, ++ 0x00,0x00,0x52,0x04,0x11,0x00,0x11,0x04,0x11,0x00,0x00,0x00,0xd3,0x30,0xd2,0x2a, ++ 0xd1,0x24,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0b,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00, ++ 0xcf,0x06,0x04,0x00,0xcf,0x06,0x04,0x00,0xcf,0x06,0x04,0x00,0xd2,0x6c,0xd1,0x24, ++ 0xd0,0x06,0xcf,0x06,0x04,0x00,0xcf,0x86,0x55,0x04,0x04,0x00,0x54,0x04,0x04,0x00, ++ 0x93,0x10,0x52,0x04,0x04,0x00,0x51,0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x0b,0x00, ++ 0x0b,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x04,0x00,0x53,0x04,0x04,0x00, ++ 0x52,0x04,0x04,0x00,0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x04,0x00, ++ 0xcf,0x86,0x55,0x04,0x04,0x00,0x54,0x04,0x04,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x04,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd1,0x80,0xd0,0x46,0xcf,0x86,0xd5,0x28, ++ 0xd4,0x14,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0x91,0x08,0x10,0x04,0x06,0x00, ++ 0x00,0x00,0x06,0x00,0x93,0x10,0x52,0x04,0x06,0x00,0x91,0x08,0x10,0x04,0x06,0x09, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x54,0x04,0x06,0x00,0x93,0x14,0x52,0x04,0x06,0x00, ++ 0xd1,0x08,0x10,0x04,0x06,0x09,0x06,0x00,0x10,0x04,0x06,0x00,0x00,0x00,0x00,0x00, ++ 0xcf,0x86,0xd5,0x10,0x54,0x04,0x06,0x00,0x93,0x08,0x12,0x04,0x06,0x00,0x00,0x00, ++ 0x00,0x00,0xd4,0x14,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0x91,0x08,0x10,0x04, ++ 0x06,0x00,0x00,0x00,0x06,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x06,0x00, ++ 0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0xd0,0x1b,0xcf,0x86,0x55,0x04,0x04,0x00, ++ 0x54,0x04,0x04,0x00,0x93,0x0d,0x52,0x04,0x04,0x00,0x11,0x05,0x04,0xff,0x00,0x04, ++ 0x00,0x04,0x00,0xcf,0x86,0xd5,0x24,0x54,0x04,0x04,0x00,0xd3,0x10,0x92,0x0c,0x51, ++ 0x04,0x04,0x00,0x10,0x04,0x04,0x09,0x04,0x00,0x04,0x00,0x52,0x04,0x04,0x00,0x91, ++ 0x08,0x10,0x04,0x04,0x00,0x07,0xe6,0x00,0x00,0xd4,0x10,0x53,0x04,0x04,0x00,0x92, ++ 0x08,0x11,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x07,0x00,0x92,0x08,0x11, ++ 0x04,0x07,0x00,0x00,0x00,0x00,0x00,0xe4,0xb7,0x03,0xe3,0x58,0x01,0xd2,0x8f,0xd1, ++ 0x53,0xd0,0x35,0xcf,0x86,0x95,0x2f,0xd4,0x1f,0x53,0x04,0x04,0x00,0xd2,0x0d,0x51, ++ 0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x04,0xff,0x00,0x51,0x05,0x04,0xff,0x00,0x10, ++ 0x05,0x04,0xff,0x00,0x00,0x00,0x53,0x04,0x04,0x00,0x92,0x08,0x11,0x04,0x04,0x00, ++ 0x00,0x00,0x00,0x00,0x04,0x00,0xcf,0x86,0x55,0x04,0x04,0x00,0x54,0x04,0x04,0x00, ++ 0x53,0x04,0x04,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0xd0,0x22,0xcf,0x86,0x55,0x04,0x04,0x00,0x94,0x18,0x53,0x04,0x04,0x00, ++ 0x92,0x10,0xd1,0x08,0x10,0x04,0x04,0x00,0x04,0xe4,0x10,0x04,0x0a,0x00,0x00,0x00, ++ 0x00,0x00,0x0b,0x00,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04,0x0b,0x00,0x93,0x0c, ++ 0x52,0x04,0x0b,0x00,0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xd1,0x80,0xd0,0x42, ++ 0xcf,0x86,0xd5,0x1c,0x54,0x04,0x07,0x00,0x53,0x04,0x07,0x00,0x52,0x04,0x07,0x00, ++ 0xd1,0x08,0x10,0x04,0x07,0x00,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0xd4,0x0c, ++ 0x53,0x04,0x07,0x00,0x12,0x04,0x07,0x00,0x00,0x00,0x53,0x04,0x07,0x00,0x92,0x10, ++ 0xd1,0x08,0x10,0x04,0x07,0x00,0x07,0xde,0x10,0x04,0x07,0xe6,0x07,0xdc,0x00,0x00, ++ 0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x07,0x00, ++ 0x00,0x00,0x00,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0xd4,0x10,0x53,0x04,0x07,0x00, ++ 0x52,0x04,0x07,0x00,0x11,0x04,0x07,0x00,0x00,0x00,0x93,0x10,0x52,0x04,0x07,0x00, ++ 0x91,0x08,0x10,0x04,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd0,0x1a,0xcf,0x86, ++ 0x55,0x04,0x08,0x00,0x94,0x10,0x53,0x04,0x08,0x00,0x92,0x08,0x11,0x04,0x08,0x00, ++ 0x0b,0x00,0x00,0x00,0x08,0x00,0xcf,0x86,0x95,0x28,0xd4,0x10,0x53,0x04,0x08,0x00, ++ 0x92,0x08,0x11,0x04,0x08,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x08,0x00,0xd2,0x0c, ++ 0x51,0x04,0x08,0x00,0x10,0x04,0x0b,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x08,0x00, ++ 0x07,0x00,0xd2,0xe4,0xd1,0x80,0xd0,0x2e,0xcf,0x86,0x95,0x28,0x54,0x04,0x08,0x00, ++ 0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x08,0xe6, ++ 0xd2,0x0c,0x91,0x08,0x10,0x04,0x08,0xdc,0x08,0x00,0x08,0x00,0x11,0x04,0x00,0x00, ++ 0x08,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00, ++ 0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x00,0x00,0xd4,0x14, ++ 0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0b,0x09,0x0b,0x00,0x0b,0x00,0x0b,0x00, ++ 0x0b,0x00,0xd3,0x10,0x52,0x04,0x0b,0x00,0x91,0x08,0x10,0x04,0x0b,0x00,0x0b,0xe6, ++ 0x0b,0xe6,0x52,0x04,0x0b,0xe6,0xd1,0x08,0x10,0x04,0x0b,0xe6,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x0b,0xdc,0xd0,0x5e,0xcf,0x86,0xd5,0x20,0xd4,0x10,0x53,0x04,0x0b,0x00, ++ 0x92,0x08,0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x0b,0x00,0x92,0x08, ++ 0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xd4,0x10,0x53,0x04,0x0b,0x00,0x52,0x04, ++ 0x0b,0x00,0x11,0x04,0x0b,0x00,0x00,0x00,0xd3,0x10,0x52,0x04,0x10,0xe6,0x91,0x08, ++ 0x10,0x04,0x10,0xe6,0x10,0xdc,0x10,0xdc,0xd2,0x0c,0x51,0x04,0x10,0xdc,0x10,0x04, ++ 0x10,0xdc,0x10,0xe6,0xd1,0x08,0x10,0x04,0x10,0xe6,0x10,0xdc,0x10,0x04,0x10,0x00, ++ 0x00,0x00,0xcf,0x06,0x00,0x00,0xe1,0x1e,0x01,0xd0,0xaa,0xcf,0x86,0xd5,0x6e,0xd4, ++ 0x53,0xd3,0x17,0x52,0x04,0x09,0x00,0x51,0x04,0x09,0x00,0x10,0x0b,0x09,0xff,0xe1, ++ 0xac,0x85,0xe1,0xac,0xb5,0x00,0x09,0x00,0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x09,0xff, ++ 0xe1,0xac,0x87,0xe1,0xac,0xb5,0x00,0x09,0x00,0x10,0x0b,0x09,0xff,0xe1,0xac,0x89, ++ 0xe1,0xac,0xb5,0x00,0x09,0x00,0xd1,0x0f,0x10,0x0b,0x09,0xff,0xe1,0xac,0x8b,0xe1, ++ 0xac,0xb5,0x00,0x09,0x00,0x10,0x0b,0x09,0xff,0xe1,0xac,0x8d,0xe1,0xac,0xb5,0x00, ++ 0x09,0x00,0x93,0x17,0x92,0x13,0x51,0x04,0x09,0x00,0x10,0x0b,0x09,0xff,0xe1,0xac, ++ 0x91,0xe1,0xac,0xb5,0x00,0x09,0x00,0x09,0x00,0x09,0x00,0x54,0x04,0x09,0x00,0xd3, ++ 0x10,0x52,0x04,0x09,0x00,0x91,0x08,0x10,0x04,0x09,0x07,0x09,0x00,0x09,0x00,0xd2, ++ 0x13,0x51,0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x09,0xff,0xe1,0xac,0xba,0xe1,0xac, ++ 0xb5,0x00,0x91,0x0f,0x10,0x04,0x09,0x00,0x09,0xff,0xe1,0xac,0xbc,0xe1,0xac,0xb5, ++ 0x00,0x09,0x00,0xcf,0x86,0xd5,0x3d,0x94,0x39,0xd3,0x31,0xd2,0x25,0xd1,0x16,0x10, ++ 0x0b,0x09,0xff,0xe1,0xac,0xbe,0xe1,0xac,0xb5,0x00,0x09,0xff,0xe1,0xac,0xbf,0xe1, ++ 0xac,0xb5,0x00,0x10,0x04,0x09,0x00,0x09,0xff,0xe1,0xad,0x82,0xe1,0xac,0xb5,0x00, ++ 0x91,0x08,0x10,0x04,0x09,0x09,0x09,0x00,0x09,0x00,0x12,0x04,0x09,0x00,0x00,0x00, ++ 0x09,0x00,0xd4,0x1c,0x53,0x04,0x09,0x00,0xd2,0x0c,0x51,0x04,0x09,0x00,0x10,0x04, ++ 0x09,0x00,0x09,0xe6,0x91,0x08,0x10,0x04,0x09,0xdc,0x09,0xe6,0x09,0xe6,0xd3,0x08, ++ 0x12,0x04,0x09,0xe6,0x09,0x00,0x52,0x04,0x09,0x00,0x91,0x08,0x10,0x04,0x09,0x00, ++ 0x00,0x00,0x00,0x00,0xd0,0x2e,0xcf,0x86,0x55,0x04,0x0a,0x00,0xd4,0x18,0x53,0x04, ++ 0x0a,0x00,0xd2,0x0c,0x51,0x04,0x0a,0x00,0x10,0x04,0x0a,0x09,0x0d,0x09,0x11,0x04, ++ 0x0d,0x00,0x0a,0x00,0x53,0x04,0x0a,0x00,0x92,0x08,0x11,0x04,0x0a,0x00,0x0d,0x00, ++ 0x0d,0x00,0xcf,0x86,0x55,0x04,0x0c,0x00,0xd4,0x14,0x93,0x10,0x52,0x04,0x0c,0x00, ++ 0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x07,0x0c,0x00,0x0c,0x00,0xd3,0x0c,0x92,0x08, ++ 0x11,0x04,0x0c,0x00,0x0c,0x09,0x00,0x00,0x12,0x04,0x00,0x00,0x0c,0x00,0xe3,0xb2, ++ 0x01,0xe2,0x09,0x01,0xd1,0x4c,0xd0,0x2a,0xcf,0x86,0x55,0x04,0x0a,0x00,0x54,0x04, ++ 0x0a,0x00,0xd3,0x10,0x52,0x04,0x0a,0x00,0x51,0x04,0x0a,0x00,0x10,0x04,0x0a,0x00, ++ 0x0a,0x07,0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0a,0x00,0x0a,0x00, ++ 0xcf,0x86,0x95,0x1c,0x94,0x18,0x53,0x04,0x0a,0x00,0xd2,0x08,0x11,0x04,0x0a,0x00, ++ 0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00, ++ 0xd0,0x3a,0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x12,0x00,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x14,0x00,0x54,0x04,0x14,0x00, ++ 0x53,0x04,0x14,0x00,0xd2,0x0c,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00, ++ 0x91,0x08,0x10,0x04,0x00,0x00,0x14,0x00,0x14,0x00,0xcf,0x86,0xd5,0x2c,0xd4,0x08, ++ 0x13,0x04,0x0d,0x00,0x00,0x00,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x0b,0xe6,0x10,0x04, ++ 0x0b,0xe6,0x0b,0x00,0x91,0x08,0x10,0x04,0x0b,0x01,0x0b,0xdc,0x0b,0xdc,0x92,0x08, ++ 0x11,0x04,0x0b,0xdc,0x0b,0xe6,0x0b,0xdc,0xd4,0x28,0xd3,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0x01,0x0b,0x01,0xd2,0x0c,0x91,0x08,0x10,0x04, ++ 0x0b,0x01,0x0b,0x00,0x0b,0x00,0x91,0x08,0x10,0x04,0x0b,0x00,0x0b,0xdc,0x0b,0x00, ++ 0xd3,0x1c,0xd2,0x0c,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x0d,0x00,0xd1,0x08, ++ 0x10,0x04,0x0d,0xe6,0x0d,0x00,0x10,0x04,0x0d,0x00,0x13,0x00,0x92,0x0c,0x51,0x04, ++ 0x10,0xe6,0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0xd1,0x1c,0xd0,0x06,0xcf,0x06, ++ 0x07,0x00,0xcf,0x86,0x55,0x04,0x07,0x00,0x94,0x0c,0x53,0x04,0x07,0x00,0x12,0x04, ++ 0x07,0x00,0x08,0x00,0x08,0x00,0xd0,0x06,0xcf,0x06,0x08,0x00,0xcf,0x86,0xd5,0x40, ++ 0xd4,0x2c,0xd3,0x10,0x92,0x0c,0x51,0x04,0x08,0xe6,0x10,0x04,0x08,0xdc,0x08,0xe6, ++ 0x09,0xe6,0xd2,0x0c,0x51,0x04,0x09,0xe6,0x10,0x04,0x09,0xdc,0x0a,0xe6,0xd1,0x08, ++ 0x10,0x04,0x0a,0xe6,0x0a,0xea,0x10,0x04,0x0a,0xd6,0x0a,0xdc,0x93,0x10,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x0a,0xca,0x0a,0xe6,0x0a,0xe6,0x0a,0xe6,0x0a,0xe6,0xd4,0x14, ++ 0x93,0x10,0x52,0x04,0x0a,0xe6,0x51,0x04,0x0a,0xe6,0x10,0x04,0x0a,0xe6,0x10,0xe6, ++ 0x10,0xe6,0xd3,0x10,0x52,0x04,0x10,0xe6,0x51,0x04,0x10,0xe6,0x10,0x04,0x13,0xe8, ++ 0x13,0xe4,0xd2,0x10,0xd1,0x08,0x10,0x04,0x13,0xe4,0x13,0xdc,0x10,0x04,0x00,0x00, ++ 0x12,0xe6,0xd1,0x08,0x10,0x04,0x0c,0xe9,0x0b,0xdc,0x10,0x04,0x09,0xe6,0x09,0xdc, ++ 0xe2,0x80,0x08,0xe1,0x48,0x04,0xe0,0x1c,0x02,0xcf,0x86,0xe5,0x11,0x01,0xd4,0x84, ++ 0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0xa5,0x00,0x01,0xff, ++ 0x61,0xcc,0xa5,0x00,0x10,0x08,0x01,0xff,0x42,0xcc,0x87,0x00,0x01,0xff,0x62,0xcc, ++ 0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x42,0xcc,0xa3,0x00,0x01,0xff,0x62,0xcc, ++ 0xa3,0x00,0x10,0x08,0x01,0xff,0x42,0xcc,0xb1,0x00,0x01,0xff,0x62,0xcc,0xb1,0x00, ++ 0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x43,0xcc,0xa7,0xcc,0x81,0x00,0x01,0xff, ++ 0x63,0xcc,0xa7,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x44,0xcc,0x87,0x00,0x01,0xff, ++ 0x64,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x44,0xcc,0xa3,0x00,0x01,0xff, ++ 0x64,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x44,0xcc,0xb1,0x00,0x01,0xff,0x64,0xcc, ++ 0xb1,0x00,0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x44,0xcc,0xa7,0x00, ++ 0x01,0xff,0x64,0xcc,0xa7,0x00,0x10,0x08,0x01,0xff,0x44,0xcc,0xad,0x00,0x01,0xff, ++ 0x64,0xcc,0xad,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x45,0xcc,0x84,0xcc,0x80,0x00, ++ 0x01,0xff,0x65,0xcc,0x84,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x45,0xcc,0x84,0xcc, ++ 0x81,0x00,0x01,0xff,0x65,0xcc,0x84,0xcc,0x81,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0x45,0xcc,0xad,0x00,0x01,0xff,0x65,0xcc,0xad,0x00,0x10,0x08,0x01,0xff, ++ 0x45,0xcc,0xb0,0x00,0x01,0xff,0x65,0xcc,0xb0,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff, ++ 0x45,0xcc,0xa7,0xcc,0x86,0x00,0x01,0xff,0x65,0xcc,0xa7,0xcc,0x86,0x00,0x10,0x08, ++ 0x01,0xff,0x46,0xcc,0x87,0x00,0x01,0xff,0x66,0xcc,0x87,0x00,0xd4,0x84,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x47,0xcc,0x84,0x00,0x01,0xff,0x67,0xcc, ++ 0x84,0x00,0x10,0x08,0x01,0xff,0x48,0xcc,0x87,0x00,0x01,0xff,0x68,0xcc,0x87,0x00, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x48,0xcc,0xa3,0x00,0x01,0xff,0x68,0xcc,0xa3,0x00, ++ 0x10,0x08,0x01,0xff,0x48,0xcc,0x88,0x00,0x01,0xff,0x68,0xcc,0x88,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0x48,0xcc,0xa7,0x00,0x01,0xff,0x68,0xcc,0xa7,0x00, ++ 0x10,0x08,0x01,0xff,0x48,0xcc,0xae,0x00,0x01,0xff,0x68,0xcc,0xae,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0x49,0xcc,0xb0,0x00,0x01,0xff,0x69,0xcc,0xb0,0x00,0x10,0x0a, ++ 0x01,0xff,0x49,0xcc,0x88,0xcc,0x81,0x00,0x01,0xff,0x69,0xcc,0x88,0xcc,0x81,0x00, ++ 0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x4b,0xcc,0x81,0x00,0x01,0xff, ++ 0x6b,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x4b,0xcc,0xa3,0x00,0x01,0xff,0x6b,0xcc, ++ 0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4b,0xcc,0xb1,0x00,0x01,0xff,0x6b,0xcc, ++ 0xb1,0x00,0x10,0x08,0x01,0xff,0x4c,0xcc,0xa3,0x00,0x01,0xff,0x6c,0xcc,0xa3,0x00, ++ 0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4c,0xcc,0xa3,0xcc,0x84,0x00,0x01,0xff, ++ 0x6c,0xcc,0xa3,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x4c,0xcc,0xb1,0x00,0x01,0xff, ++ 0x6c,0xcc,0xb1,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4c,0xcc,0xad,0x00,0x01,0xff, ++ 0x6c,0xcc,0xad,0x00,0x10,0x08,0x01,0xff,0x4d,0xcc,0x81,0x00,0x01,0xff,0x6d,0xcc, ++ 0x81,0x00,0xcf,0x86,0xe5,0x15,0x01,0xd4,0x88,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x4d,0xcc,0x87,0x00,0x01,0xff,0x6d,0xcc,0x87,0x00,0x10,0x08,0x01, ++ 0xff,0x4d,0xcc,0xa3,0x00,0x01,0xff,0x6d,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x4e,0xcc,0x87,0x00,0x01,0xff,0x6e,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x4e, ++ 0xcc,0xa3,0x00,0x01,0xff,0x6e,0xcc,0xa3,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x4e,0xcc,0xb1,0x00,0x01,0xff,0x6e,0xcc,0xb1,0x00,0x10,0x08,0x01,0xff,0x4e, ++ 0xcc,0xad,0x00,0x01,0xff,0x6e,0xcc,0xad,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f, ++ 0xcc,0x83,0xcc,0x81,0x00,0x01,0xff,0x6f,0xcc,0x83,0xcc,0x81,0x00,0x10,0x0a,0x01, ++ 0xff,0x4f,0xcc,0x83,0xcc,0x88,0x00,0x01,0xff,0x6f,0xcc,0x83,0xcc,0x88,0x00,0xd3, ++ 0x48,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x84,0xcc,0x80,0x00,0x01, ++ 0xff,0x6f,0xcc,0x84,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x84,0xcc,0x81, ++ 0x00,0x01,0xff,0x6f,0xcc,0x84,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x50, ++ 0xcc,0x81,0x00,0x01,0xff,0x70,0xcc,0x81,0x00,0x10,0x08,0x01,0xff,0x50,0xcc,0x87, ++ 0x00,0x01,0xff,0x70,0xcc,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x52, ++ 0xcc,0x87,0x00,0x01,0xff,0x72,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x52,0xcc,0xa3, ++ 0x00,0x01,0xff,0x72,0xcc,0xa3,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x52,0xcc,0xa3, ++ 0xcc,0x84,0x00,0x01,0xff,0x72,0xcc,0xa3,0xcc,0x84,0x00,0x10,0x08,0x01,0xff,0x52, ++ 0xcc,0xb1,0x00,0x01,0xff,0x72,0xcc,0xb1,0x00,0xd4,0x8c,0xd3,0x48,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0x53,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x87,0x00,0x10, ++ 0x08,0x01,0xff,0x53,0xcc,0xa3,0x00,0x01,0xff,0x73,0xcc,0xa3,0x00,0xd1,0x14,0x10, ++ 0x0a,0x01,0xff,0x53,0xcc,0x81,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x81,0xcc,0x87, ++ 0x00,0x10,0x0a,0x01,0xff,0x53,0xcc,0x8c,0xcc,0x87,0x00,0x01,0xff,0x73,0xcc,0x8c, ++ 0xcc,0x87,0x00,0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff,0x53,0xcc,0xa3,0xcc,0x87, ++ 0x00,0x01,0xff,0x73,0xcc,0xa3,0xcc,0x87,0x00,0x10,0x08,0x01,0xff,0x54,0xcc,0x87, ++ 0x00,0x01,0xff,0x74,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x54,0xcc,0xa3, ++ 0x00,0x01,0xff,0x74,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x54,0xcc,0xb1,0x00,0x01, ++ 0xff,0x74,0xcc,0xb1,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x54, ++ 0xcc,0xad,0x00,0x01,0xff,0x74,0xcc,0xad,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0xa4, ++ 0x00,0x01,0xff,0x75,0xcc,0xa4,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x55,0xcc,0xb0, ++ 0x00,0x01,0xff,0x75,0xcc,0xb0,0x00,0x10,0x08,0x01,0xff,0x55,0xcc,0xad,0x00,0x01, ++ 0xff,0x75,0xcc,0xad,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x55,0xcc,0x83, ++ 0xcc,0x81,0x00,0x01,0xff,0x75,0xcc,0x83,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x55, ++ 0xcc,0x84,0xcc,0x88,0x00,0x01,0xff,0x75,0xcc,0x84,0xcc,0x88,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0x56,0xcc,0x83,0x00,0x01,0xff,0x76,0xcc,0x83,0x00,0x10,0x08,0x01, ++ 0xff,0x56,0xcc,0xa3,0x00,0x01,0xff,0x76,0xcc,0xa3,0x00,0xe0,0x10,0x02,0xcf,0x86, ++ 0xd5,0xe1,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc, ++ 0x80,0x00,0x01,0xff,0x77,0xcc,0x80,0x00,0x10,0x08,0x01,0xff,0x57,0xcc,0x81,0x00, ++ 0x01,0xff,0x77,0xcc,0x81,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc,0x88,0x00, ++ 0x01,0xff,0x77,0xcc,0x88,0x00,0x10,0x08,0x01,0xff,0x57,0xcc,0x87,0x00,0x01,0xff, ++ 0x77,0xcc,0x87,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x57,0xcc,0xa3,0x00, ++ 0x01,0xff,0x77,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x58,0xcc,0x87,0x00,0x01,0xff, ++ 0x78,0xcc,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x58,0xcc,0x88,0x00,0x01,0xff, ++ 0x78,0xcc,0x88,0x00,0x10,0x08,0x01,0xff,0x59,0xcc,0x87,0x00,0x01,0xff,0x79,0xcc, ++ 0x87,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x5a,0xcc,0x82,0x00, ++ 0x01,0xff,0x7a,0xcc,0x82,0x00,0x10,0x08,0x01,0xff,0x5a,0xcc,0xa3,0x00,0x01,0xff, ++ 0x7a,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x5a,0xcc,0xb1,0x00,0x01,0xff, ++ 0x7a,0xcc,0xb1,0x00,0x10,0x08,0x01,0xff,0x68,0xcc,0xb1,0x00,0x01,0xff,0x74,0xcc, ++ 0x88,0x00,0x92,0x1d,0xd1,0x10,0x10,0x08,0x01,0xff,0x77,0xcc,0x8a,0x00,0x01,0xff, ++ 0x79,0xcc,0x8a,0x00,0x10,0x04,0x01,0x00,0x02,0xff,0xc5,0xbf,0xcc,0x87,0x00,0x0a, ++ 0x00,0xd4,0x98,0xd3,0x48,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x41,0xcc,0xa3, ++ 0x00,0x01,0xff,0x61,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x41,0xcc,0x89,0x00,0x01, ++ 0xff,0x61,0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0x82,0xcc,0x81, ++ 0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x82, ++ 0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x80,0x00,0xd2,0x28,0xd1,0x14,0x10, ++ 0x0a,0x01,0xff,0x41,0xcc,0x82,0xcc,0x89,0x00,0x01,0xff,0x61,0xcc,0x82,0xcc,0x89, ++ 0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x61,0xcc,0x82, ++ 0xcc,0x83,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0xa3,0xcc,0x82,0x00,0x01, ++ 0xff,0x61,0xcc,0xa3,0xcc,0x82,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x81, ++ 0x00,0x01,0xff,0x61,0xcc,0x86,0xcc,0x81,0x00,0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10, ++ 0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x80,0x00,0x01,0xff,0x61,0xcc,0x86,0xcc,0x80, ++ 0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x89,0x00,0x01,0xff,0x61,0xcc,0x86, ++ 0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x41,0xcc,0x86,0xcc,0x83,0x00,0x01, ++ 0xff,0x61,0xcc,0x86,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x41,0xcc,0xa3,0xcc,0x86, ++ 0x00,0x01,0xff,0x61,0xcc,0xa3,0xcc,0x86,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0x45,0xcc,0xa3,0x00,0x01,0xff,0x65,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x45, ++ 0xcc,0x89,0x00,0x01,0xff,0x65,0xcc,0x89,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x45, ++ 0xcc,0x83,0x00,0x01,0xff,0x65,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x45,0xcc,0x82, ++ 0xcc,0x81,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x81,0x00,0xcf,0x86,0xe5,0x31,0x01, ++ 0xd4,0x90,0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x45,0xcc,0x82,0xcc, ++ 0x80,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0x45,0xcc, ++ 0x82,0xcc,0x89,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x89,0x00,0xd1,0x14,0x10,0x0a, ++ 0x01,0xff,0x45,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x65,0xcc,0x82,0xcc,0x83,0x00, ++ 0x10,0x0a,0x01,0xff,0x45,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff,0x65,0xcc,0xa3,0xcc, ++ 0x82,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0x49,0xcc,0x89,0x00,0x01,0xff, ++ 0x69,0xcc,0x89,0x00,0x10,0x08,0x01,0xff,0x49,0xcc,0xa3,0x00,0x01,0xff,0x69,0xcc, ++ 0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0x4f,0xcc,0xa3,0x00,0x01,0xff,0x6f,0xcc, ++ 0xa3,0x00,0x10,0x08,0x01,0xff,0x4f,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x89,0x00, ++ 0xd3,0x50,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x82,0xcc,0x81,0x00, ++ 0x01,0xff,0x6f,0xcc,0x82,0xcc,0x81,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x82,0xcc, ++ 0x80,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x80,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff, ++ 0x4f,0xcc,0x82,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x89,0x00,0x10,0x0a, ++ 0x01,0xff,0x4f,0xcc,0x82,0xcc,0x83,0x00,0x01,0xff,0x6f,0xcc,0x82,0xcc,0x83,0x00, ++ 0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0xa3,0xcc,0x82,0x00,0x01,0xff, ++ 0x6f,0xcc,0xa3,0xcc,0x82,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x9b,0xcc,0x81,0x00, ++ 0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x81,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc, ++ 0x9b,0xcc,0x80,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff, ++ 0x4f,0xcc,0x9b,0xcc,0x89,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x89,0x00,0xd4,0x98, ++ 0xd3,0x48,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x9b,0xcc,0x83,0x00, ++ 0x01,0xff,0x6f,0xcc,0x9b,0xcc,0x83,0x00,0x10,0x0a,0x01,0xff,0x4f,0xcc,0x9b,0xcc, ++ 0xa3,0x00,0x01,0xff,0x6f,0xcc,0x9b,0xcc,0xa3,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0x55,0xcc,0xa3,0x00,0x01,0xff,0x75,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff,0x55,0xcc, ++ 0x89,0x00,0x01,0xff,0x75,0xcc,0x89,0x00,0xd2,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff, ++ 0x55,0xcc,0x9b,0xcc,0x81,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x81,0x00,0x10,0x0a, ++ 0x01,0xff,0x55,0xcc,0x9b,0xcc,0x80,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0x80,0x00, ++ 0xd1,0x14,0x10,0x0a,0x01,0xff,0x55,0xcc,0x9b,0xcc,0x89,0x00,0x01,0xff,0x75,0xcc, ++ 0x9b,0xcc,0x89,0x00,0x10,0x0a,0x01,0xff,0x55,0xcc,0x9b,0xcc,0x83,0x00,0x01,0xff, ++ 0x75,0xcc,0x9b,0xcc,0x83,0x00,0xd3,0x44,0xd2,0x24,0xd1,0x14,0x10,0x0a,0x01,0xff, ++ 0x55,0xcc,0x9b,0xcc,0xa3,0x00,0x01,0xff,0x75,0xcc,0x9b,0xcc,0xa3,0x00,0x10,0x08, ++ 0x01,0xff,0x59,0xcc,0x80,0x00,0x01,0xff,0x79,0xcc,0x80,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0x59,0xcc,0xa3,0x00,0x01,0xff,0x79,0xcc,0xa3,0x00,0x10,0x08,0x01,0xff, ++ 0x59,0xcc,0x89,0x00,0x01,0xff,0x79,0xcc,0x89,0x00,0x92,0x14,0x91,0x10,0x10,0x08, ++ 0x01,0xff,0x59,0xcc,0x83,0x00,0x01,0xff,0x79,0xcc,0x83,0x00,0x0a,0x00,0x0a,0x00, ++ 0xe1,0xc0,0x04,0xe0,0x80,0x02,0xcf,0x86,0xe5,0x2d,0x01,0xd4,0xa8,0xd3,0x54,0xd2, ++ 0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x93,0x00,0x01,0xff,0xce,0xb1, ++ 0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff, ++ 0xce,0xb1,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc, ++ 0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01, ++ 0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcd,0x82, ++ 0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x91,0xcc,0x93,0x00,0x01,0xff, ++ 0xce,0x91,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0x91,0xcc,0x93,0xcc,0x80,0x00, ++ 0x01,0xff,0xce,0x91,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce, ++ 0x91,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0x91,0xcc,0x94,0xcc,0x81,0x00,0x10, ++ 0x0b,0x01,0xff,0xce,0x91,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0x91,0xcc,0x94, ++ 0xcd,0x82,0x00,0xd3,0x42,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb5,0xcc, ++ 0x93,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb5,0xcc, ++ 0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94,0xcc,0x80,0x00,0x91,0x16,0x10, ++ 0x0b,0x01,0xff,0xce,0xb5,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb5,0xcc,0x94, ++ 0xcc,0x81,0x00,0x00,0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x95,0xcc, ++ 0x93,0x00,0x01,0xff,0xce,0x95,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0x95,0xcc, ++ 0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0x95,0xcc,0x94,0xcc,0x80,0x00,0x91,0x16,0x10, ++ 0x0b,0x01,0xff,0xce,0x95,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0x95,0xcc,0x94, ++ 0xcc,0x81,0x00,0x00,0x00,0xd4,0xa8,0xd3,0x54,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01, ++ 0xff,0xce,0xb7,0xcc,0x93,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0x00,0x10,0x0b,0x01, ++ 0xff,0xce,0xb7,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80, ++ 0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff, ++ 0xce,0xb7,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcd, ++ 0x82,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x82,0x00,0xd2,0x28,0xd1,0x12,0x10, ++ 0x09,0x01,0xff,0xce,0x97,0xcc,0x93,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0x00,0x10, ++ 0x0b,0x01,0xff,0xce,0x97,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0x97,0xcc,0x94, ++ 0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0x97,0xcc,0x93,0xcc,0x81,0x00, ++ 0x01,0xff,0xce,0x97,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xce,0x97,0xcc, ++ 0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcd,0x82,0x00,0xd3,0x54,0xd2, ++ 0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x93,0x00,0x01,0xff,0xce,0xb9, ++ 0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff, ++ 0xce,0xb9,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb9,0xcc, ++ 0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01, ++ 0xff,0xce,0xb9,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xb9,0xcc,0x94,0xcd,0x82, ++ 0x00,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x99,0xcc,0x93,0x00,0x01,0xff, ++ 0xce,0x99,0xcc,0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0x99,0xcc,0x93,0xcc,0x80,0x00, ++ 0x01,0xff,0xce,0x99,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce, ++ 0x99,0xcc,0x93,0xcc,0x81,0x00,0x01,0xff,0xce,0x99,0xcc,0x94,0xcc,0x81,0x00,0x10, ++ 0x0b,0x01,0xff,0xce,0x99,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0x99,0xcc,0x94, ++ 0xcd,0x82,0x00,0xcf,0x86,0xe5,0x13,0x01,0xd4,0x84,0xd3,0x42,0xd2,0x28,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xce,0xbf,0xcc,0x93,0x00,0x01,0xff,0xce,0xbf,0xcc,0x94,0x00, ++ 0x10,0x0b,0x01,0xff,0xce,0xbf,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0xbf,0xcc, ++ 0x94,0xcc,0x80,0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xce,0xbf,0xcc,0x93,0xcc,0x81, ++ 0x00,0x01,0xff,0xce,0xbf,0xcc,0x94,0xcc,0x81,0x00,0x00,0x00,0xd2,0x28,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xce,0x9f,0xcc,0x93,0x00,0x01,0xff,0xce,0x9f,0xcc,0x94,0x00, ++ 0x10,0x0b,0x01,0xff,0xce,0x9f,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce,0x9f,0xcc, ++ 0x94,0xcc,0x80,0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xce,0x9f,0xcc,0x93,0xcc,0x81, ++ 0x00,0x01,0xff,0xce,0x9f,0xcc,0x94,0xcc,0x81,0x00,0x00,0x00,0xd3,0x54,0xd2,0x28, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x93,0x00,0x01,0xff,0xcf,0x85,0xcc, ++ 0x94,0x00,0x10,0x0b,0x01,0xff,0xcf,0x85,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xcf, ++ 0x85,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x85,0xcc,0x93, ++ 0xcc,0x81,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff, ++ 0xcf,0x85,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xcf,0x85,0xcc,0x94,0xcd,0x82,0x00, ++ 0xd2,0x1c,0xd1,0x0d,0x10,0x04,0x00,0x00,0x01,0xff,0xce,0xa5,0xcc,0x94,0x00,0x10, ++ 0x04,0x00,0x00,0x01,0xff,0xce,0xa5,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x0f,0x10,0x04, ++ 0x00,0x00,0x01,0xff,0xce,0xa5,0xcc,0x94,0xcc,0x81,0x00,0x10,0x04,0x00,0x00,0x01, ++ 0xff,0xce,0xa5,0xcc,0x94,0xcd,0x82,0x00,0xd4,0xa8,0xd3,0x54,0xd2,0x28,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xcf,0x89,0xcc,0x93,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0x00, ++ 0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xcf,0x89,0xcc, ++ 0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x81, ++ 0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff,0xcf,0x89, ++ 0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd,0x82,0x00,0xd2,0x28, ++ 0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xa9,0xcc,0x93,0x00,0x01,0xff,0xce,0xa9,0xcc, ++ 0x94,0x00,0x10,0x0b,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcc,0x80,0x00,0x01,0xff,0xce, ++ 0xa9,0xcc,0x94,0xcc,0x80,0x00,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xa9,0xcc,0x93, ++ 0xcc,0x81,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcc,0x81,0x00,0x10,0x0b,0x01,0xff, ++ 0xce,0xa9,0xcc,0x93,0xcd,0x82,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcd,0x82,0x00, ++ 0xd3,0x48,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x80,0x00,0x01, ++ 0xff,0xce,0xb1,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb5,0xcc,0x80,0x00,0x01, ++ 0xff,0xce,0xb5,0xcc,0x81,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb7,0xcc,0x80, ++ 0x00,0x01,0xff,0xce,0xb7,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce,0xb9,0xcc,0x80, ++ 0x00,0x01,0xff,0xce,0xb9,0xcc,0x81,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff, ++ 0xce,0xbf,0xcc,0x80,0x00,0x01,0xff,0xce,0xbf,0xcc,0x81,0x00,0x10,0x09,0x01,0xff, ++ 0xcf,0x85,0xcc,0x80,0x00,0x01,0xff,0xcf,0x85,0xcc,0x81,0x00,0x91,0x12,0x10,0x09, ++ 0x01,0xff,0xcf,0x89,0xcc,0x80,0x00,0x01,0xff,0xcf,0x89,0xcc,0x81,0x00,0x00,0x00, ++ 0xe0,0xe1,0x02,0xcf,0x86,0xe5,0x91,0x01,0xd4,0xc8,0xd3,0x64,0xd2,0x30,0xd1,0x16, ++ 0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xce,0xb1,0xcc, ++ 0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x80,0xcd,0x85, ++ 0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d, ++ 0x01,0xff,0xce,0xb1,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xce,0xb1,0xcc, ++ 0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xb1,0xcc,0x93,0xcd,0x82, ++ 0xcd,0x85,0x00,0x01,0xff,0xce,0xb1,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x30, ++ 0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0x91,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xce, ++ 0x91,0xcc,0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0x91,0xcc,0x93,0xcc,0x80, ++ 0xcd,0x85,0x00,0x01,0xff,0xce,0x91,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a, ++ 0x10,0x0d,0x01,0xff,0xce,0x91,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xce, ++ 0x91,0xcc,0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0x91,0xcc,0x93, ++ 0xcd,0x82,0xcd,0x85,0x00,0x01,0xff,0xce,0x91,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00, ++ 0xd3,0x64,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcd,0x85, ++ 0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xb7, ++ 0xcc,0x93,0xcc,0x80,0xcd,0x85,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x80,0xcd, ++ 0x85,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xce,0xb7,0xcc,0x93,0xcc,0x81,0xcd,0x85, ++ 0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff, ++ 0xce,0xb7,0xcc,0x93,0xcd,0x82,0xcd,0x85,0x00,0x01,0xff,0xce,0xb7,0xcc,0x94,0xcd, ++ 0x82,0xcd,0x85,0x00,0xd2,0x30,0xd1,0x16,0x10,0x0b,0x01,0xff,0xce,0x97,0xcc,0x93, ++ 0xcd,0x85,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff, ++ 0xce,0x97,0xcc,0x93,0xcc,0x80,0xcd,0x85,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcc, ++ 0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff,0xce,0x97,0xcc,0x93,0xcc,0x81, ++ 0xcd,0x85,0x00,0x01,0xff,0xce,0x97,0xcc,0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d, ++ 0x01,0xff,0xce,0x97,0xcc,0x93,0xcd,0x82,0xcd,0x85,0x00,0x01,0xff,0xce,0x97,0xcc, ++ 0x94,0xcd,0x82,0xcd,0x85,0x00,0xd4,0xc8,0xd3,0x64,0xd2,0x30,0xd1,0x16,0x10,0x0b, ++ 0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd, ++ 0x85,0x00,0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcc,0x80,0xcd,0x85,0x00,0x01, ++ 0xff,0xcf,0x89,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d,0x01,0xff, ++ 0xcf,0x89,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcc, ++ 0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xcf,0x89,0xcc,0x93,0xcd,0x82,0xcd,0x85, ++ 0x00,0x01,0xff,0xcf,0x89,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x30,0xd1,0x16, ++ 0x10,0x0b,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcd,0x85,0x00,0x01,0xff,0xce,0xa9,0xcc, ++ 0x94,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcc,0x80,0xcd,0x85, ++ 0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcc,0x80,0xcd,0x85,0x00,0xd1,0x1a,0x10,0x0d, ++ 0x01,0xff,0xce,0xa9,0xcc,0x93,0xcc,0x81,0xcd,0x85,0x00,0x01,0xff,0xce,0xa9,0xcc, ++ 0x94,0xcc,0x81,0xcd,0x85,0x00,0x10,0x0d,0x01,0xff,0xce,0xa9,0xcc,0x93,0xcd,0x82, ++ 0xcd,0x85,0x00,0x01,0xff,0xce,0xa9,0xcc,0x94,0xcd,0x82,0xcd,0x85,0x00,0xd3,0x49, ++ 0xd2,0x26,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0xb1,0xcc,0x86,0x00,0x01,0xff,0xce, ++ 0xb1,0xcc,0x84,0x00,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x80,0xcd,0x85,0x00,0x01, ++ 0xff,0xce,0xb1,0xcd,0x85,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xce,0xb1,0xcc,0x81, ++ 0xcd,0x85,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xb1,0xcd,0x82,0x00,0x01,0xff, ++ 0xce,0xb1,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce, ++ 0x91,0xcc,0x86,0x00,0x01,0xff,0xce,0x91,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xce, ++ 0x91,0xcc,0x80,0x00,0x01,0xff,0xce,0x91,0xcc,0x81,0x00,0xd1,0x0d,0x10,0x09,0x01, ++ 0xff,0xce,0x91,0xcd,0x85,0x00,0x01,0x00,0x10,0x07,0x01,0xff,0xce,0xb9,0x00,0x01, ++ 0x00,0xcf,0x86,0xe5,0x16,0x01,0xd4,0x8f,0xd3,0x44,0xd2,0x21,0xd1,0x0d,0x10,0x04, ++ 0x01,0x00,0x01,0xff,0xc2,0xa8,0xcd,0x82,0x00,0x10,0x0b,0x01,0xff,0xce,0xb7,0xcc, ++ 0x80,0xcd,0x85,0x00,0x01,0xff,0xce,0xb7,0xcd,0x85,0x00,0xd1,0x0f,0x10,0x0b,0x01, ++ 0xff,0xce,0xb7,0xcc,0x81,0xcd,0x85,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xb7, ++ 0xcd,0x82,0x00,0x01,0xff,0xce,0xb7,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x24,0xd1,0x12, ++ 0x10,0x09,0x01,0xff,0xce,0x95,0xcc,0x80,0x00,0x01,0xff,0xce,0x95,0xcc,0x81,0x00, ++ 0x10,0x09,0x01,0xff,0xce,0x97,0xcc,0x80,0x00,0x01,0xff,0xce,0x97,0xcc,0x81,0x00, ++ 0xd1,0x13,0x10,0x09,0x01,0xff,0xce,0x97,0xcd,0x85,0x00,0x01,0xff,0xe1,0xbe,0xbf, ++ 0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0xe1,0xbe,0xbf,0xcc,0x81,0x00,0x01,0xff,0xe1, ++ 0xbe,0xbf,0xcd,0x82,0x00,0xd3,0x40,0xd2,0x28,0xd1,0x12,0x10,0x09,0x01,0xff,0xce, ++ 0xb9,0xcc,0x86,0x00,0x01,0xff,0xce,0xb9,0xcc,0x84,0x00,0x10,0x0b,0x01,0xff,0xce, ++ 0xb9,0xcc,0x88,0xcc,0x80,0x00,0x01,0xff,0xce,0xb9,0xcc,0x88,0xcc,0x81,0x00,0x51, ++ 0x04,0x00,0x00,0x10,0x09,0x01,0xff,0xce,0xb9,0xcd,0x82,0x00,0x01,0xff,0xce,0xb9, ++ 0xcc,0x88,0xcd,0x82,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce,0x99,0xcc, ++ 0x86,0x00,0x01,0xff,0xce,0x99,0xcc,0x84,0x00,0x10,0x09,0x01,0xff,0xce,0x99,0xcc, ++ 0x80,0x00,0x01,0xff,0xce,0x99,0xcc,0x81,0x00,0xd1,0x0e,0x10,0x04,0x00,0x00,0x01, ++ 0xff,0xe1,0xbf,0xbe,0xcc,0x80,0x00,0x10,0x0a,0x01,0xff,0xe1,0xbf,0xbe,0xcc,0x81, ++ 0x00,0x01,0xff,0xe1,0xbf,0xbe,0xcd,0x82,0x00,0xd4,0x93,0xd3,0x4e,0xd2,0x28,0xd1, ++ 0x12,0x10,0x09,0x01,0xff,0xcf,0x85,0xcc,0x86,0x00,0x01,0xff,0xcf,0x85,0xcc,0x84, ++ 0x00,0x10,0x0b,0x01,0xff,0xcf,0x85,0xcc,0x88,0xcc,0x80,0x00,0x01,0xff,0xcf,0x85, ++ 0xcc,0x88,0xcc,0x81,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xcf,0x81,0xcc,0x93,0x00, ++ 0x01,0xff,0xcf,0x81,0xcc,0x94,0x00,0x10,0x09,0x01,0xff,0xcf,0x85,0xcd,0x82,0x00, ++ 0x01,0xff,0xcf,0x85,0xcc,0x88,0xcd,0x82,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01, ++ 0xff,0xce,0xa5,0xcc,0x86,0x00,0x01,0xff,0xce,0xa5,0xcc,0x84,0x00,0x10,0x09,0x01, ++ 0xff,0xce,0xa5,0xcc,0x80,0x00,0x01,0xff,0xce,0xa5,0xcc,0x81,0x00,0xd1,0x12,0x10, ++ 0x09,0x01,0xff,0xce,0xa1,0xcc,0x94,0x00,0x01,0xff,0xc2,0xa8,0xcc,0x80,0x00,0x10, ++ 0x09,0x01,0xff,0xc2,0xa8,0xcc,0x81,0x00,0x01,0xff,0x60,0x00,0xd3,0x3b,0xd2,0x18, ++ 0x51,0x04,0x00,0x00,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x80,0xcd,0x85,0x00,0x01, ++ 0xff,0xcf,0x89,0xcd,0x85,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xcf,0x89,0xcc,0x81, ++ 0xcd,0x85,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xcf,0x89,0xcd,0x82,0x00,0x01,0xff, ++ 0xcf,0x89,0xcd,0x82,0xcd,0x85,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xce, ++ 0x9f,0xcc,0x80,0x00,0x01,0xff,0xce,0x9f,0xcc,0x81,0x00,0x10,0x09,0x01,0xff,0xce, ++ 0xa9,0xcc,0x80,0x00,0x01,0xff,0xce,0xa9,0xcc,0x81,0x00,0xd1,0x10,0x10,0x09,0x01, ++ 0xff,0xce,0xa9,0xcd,0x85,0x00,0x01,0xff,0xc2,0xb4,0x00,0x10,0x04,0x01,0x00,0x00, ++ 0x00,0xe0,0x7e,0x0c,0xcf,0x86,0xe5,0xbb,0x08,0xe4,0x14,0x06,0xe3,0xf7,0x02,0xe2, ++ 0xbd,0x01,0xd1,0xd0,0xd0,0x4f,0xcf,0x86,0xd5,0x2e,0x94,0x2a,0xd3,0x18,0x92,0x14, ++ 0x91,0x10,0x10,0x08,0x01,0xff,0xe2,0x80,0x82,0x00,0x01,0xff,0xe2,0x80,0x83,0x00, ++ 0x01,0x00,0x01,0x00,0x92,0x0d,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff, ++ 0x00,0x01,0xff,0x00,0x01,0x00,0x94,0x1b,0x53,0x04,0x01,0x00,0xd2,0x09,0x11,0x04, ++ 0x01,0x00,0x01,0xff,0x00,0x51,0x05,0x01,0xff,0x00,0x10,0x05,0x01,0xff,0x00,0x04, ++ 0x00,0x01,0x00,0xcf,0x86,0xd5,0x48,0xd4,0x1c,0xd3,0x10,0x52,0x04,0x01,0x00,0x51, ++ 0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x06,0x00,0x52,0x04,0x04,0x00,0x11,0x04,0x04, ++ 0x00,0x06,0x00,0xd3,0x1c,0xd2,0x0c,0x51,0x04,0x06,0x00,0x10,0x04,0x06,0x00,0x07, ++ 0x00,0xd1,0x08,0x10,0x04,0x07,0x00,0x08,0x00,0x10,0x04,0x08,0x00,0x06,0x00,0x52, ++ 0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x06,0x00,0xd4,0x23,0xd3, ++ 0x14,0x52,0x05,0x06,0xff,0x00,0x91,0x0a,0x10,0x05,0x0a,0xff,0x00,0x00,0xff,0x00, ++ 0x0f,0xff,0x00,0x92,0x0a,0x11,0x05,0x0f,0xff,0x00,0x01,0xff,0x00,0x01,0xff,0x00, ++ 0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x06,0x00,0x00,0x00,0x01,0x00, ++ 0x01,0x00,0xd0,0x7e,0xcf,0x86,0xd5,0x34,0xd4,0x14,0x53,0x04,0x01,0x00,0x52,0x04, ++ 0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0xd3,0x10,0x52,0x04, ++ 0x08,0x00,0x91,0x08,0x10,0x04,0x08,0x00,0x0c,0x00,0x0c,0x00,0x52,0x04,0x0c,0x00, ++ 0x91,0x08,0x10,0x04,0x0c,0x00,0x00,0x00,0x00,0x00,0xd4,0x1c,0x53,0x04,0x01,0x00, ++ 0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x02,0x00,0x91,0x08,0x10,0x04, ++ 0x03,0x00,0x04,0x00,0x04,0x00,0xd3,0x10,0xd2,0x08,0x11,0x04,0x06,0x00,0x08,0x00, ++ 0x11,0x04,0x08,0x00,0x0b,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x0b,0x00,0x0c,0x00, ++ 0x10,0x04,0x0e,0x00,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x11,0x00,0x13,0x00, ++ 0xcf,0x86,0xd5,0x28,0x54,0x04,0x00,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04,0x01,0xe6, ++ 0x01,0x01,0x01,0xe6,0xd2,0x0c,0x51,0x04,0x01,0x01,0x10,0x04,0x01,0x01,0x01,0xe6, ++ 0x91,0x08,0x10,0x04,0x01,0xe6,0x01,0x00,0x01,0x00,0xd4,0x30,0xd3,0x1c,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x01,0x00,0x01,0xe6,0x04,0x00,0xd1,0x08,0x10,0x04,0x06,0x00, ++ 0x06,0x01,0x10,0x04,0x06,0x01,0x06,0xe6,0x92,0x10,0xd1,0x08,0x10,0x04,0x06,0xdc, ++ 0x06,0xe6,0x10,0x04,0x06,0x01,0x08,0x01,0x09,0xdc,0x93,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0a,0xe6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd1,0x81,0xd0,0x4f, ++ 0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x29,0xd3,0x13,0x52,0x04,0x01,0x00,0x51,0x04, ++ 0x01,0x00,0x10,0x07,0x01,0xff,0xce,0xa9,0x00,0x01,0x00,0x92,0x12,0x51,0x04,0x01, ++ 0x00,0x10,0x06,0x01,0xff,0x4b,0x00,0x01,0xff,0x41,0xcc,0x8a,0x00,0x01,0x00,0x53, ++ 0x04,0x01,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x01,0x00,0x04,0x00,0x10,0x04,0x04, ++ 0x00,0x07,0x00,0x91,0x08,0x10,0x04,0x08,0x00,0x06,0x00,0x06,0x00,0xcf,0x86,0x95, ++ 0x2c,0xd4,0x18,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0xd1,0x08,0x10,0x04,0x08, ++ 0x00,0x09,0x00,0x10,0x04,0x09,0x00,0x0a,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x0b, ++ 0x00,0x10,0x04,0x0b,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd0,0x68,0xcf, ++ 0x86,0xd5,0x48,0xd4,0x28,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x04,0x00,0x91,0x08,0x10,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x0a,0x00,0x0b,0x00,0x11,0x00,0x00,0x00,0x53,0x04,0x01,0x00,0x92, ++ 0x18,0x51,0x04,0x01,0x00,0x10,0x0a,0x01,0xff,0xe2,0x86,0x90,0xcc,0xb8,0x00,0x01, ++ 0xff,0xe2,0x86,0x92,0xcc,0xb8,0x00,0x01,0x00,0x94,0x1a,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x0a,0x01,0xff,0xe2,0x86,0x94,0xcc,0xb8, ++ 0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0x2e,0x94,0x2a,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0xd1,0x0e,0x10,0x04,0x01,0x00,0x01,0xff,0xe2,0x87,0x90,0xcc,0xb8, ++ 0x00,0x10,0x0a,0x01,0xff,0xe2,0x87,0x94,0xcc,0xb8,0x00,0x01,0xff,0xe2,0x87,0x92, ++ 0xcc,0xb8,0x00,0x01,0x00,0xd4,0x14,0x53,0x04,0x01,0x00,0x92,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x01,0x00,0x04,0x00,0x04,0x00,0x93,0x08,0x12,0x04,0x04,0x00,0x06, ++ 0x00,0x06,0x00,0xe2,0x38,0x02,0xe1,0x3f,0x01,0xd0,0x68,0xcf,0x86,0xd5,0x3e,0x94, ++ 0x3a,0xd3,0x16,0x52,0x04,0x01,0x00,0x91,0x0e,0x10,0x0a,0x01,0xff,0xe2,0x88,0x83, ++ 0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0xd2,0x12,0x91,0x0e,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xe2,0x88,0x88,0xcc,0xb8,0x00,0x01,0x00,0x91,0x0e,0x10,0x0a,0x01,0xff,0xe2, ++ 0x88,0x8b,0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x94,0x24,0x93,0x20,0x52, ++ 0x04,0x01,0x00,0xd1,0x0e,0x10,0x0a,0x01,0xff,0xe2,0x88,0xa3,0xcc,0xb8,0x00,0x01, ++ 0x00,0x10,0x0a,0x01,0xff,0xe2,0x88,0xa5,0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0x01, ++ 0x00,0xcf,0x86,0xd5,0x48,0x94,0x44,0xd3,0x2e,0xd2,0x12,0x91,0x0e,0x10,0x04,0x01, ++ 0x00,0x01,0xff,0xe2,0x88,0xbc,0xcc,0xb8,0x00,0x01,0x00,0xd1,0x0e,0x10,0x0a,0x01, ++ 0xff,0xe2,0x89,0x83,0xcc,0xb8,0x00,0x01,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xe2, ++ 0x89,0x85,0xcc,0xb8,0x00,0x92,0x12,0x91,0x0e,0x10,0x04,0x01,0x00,0x01,0xff,0xe2, ++ 0x89,0x88,0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x40,0xd3,0x1e,0x92, ++ 0x1a,0xd1,0x0c,0x10,0x08,0x01,0xff,0x3d,0xcc,0xb8,0x00,0x01,0x00,0x10,0x0a,0x01, ++ 0xff,0xe2,0x89,0xa1,0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0xd1, ++ 0x0e,0x10,0x04,0x01,0x00,0x01,0xff,0xe2,0x89,0x8d,0xcc,0xb8,0x00,0x10,0x08,0x01, ++ 0xff,0x3c,0xcc,0xb8,0x00,0x01,0xff,0x3e,0xcc,0xb8,0x00,0xd3,0x30,0xd2,0x18,0x91, ++ 0x14,0x10,0x0a,0x01,0xff,0xe2,0x89,0xa4,0xcc,0xb8,0x00,0x01,0xff,0xe2,0x89,0xa5, ++ 0xcc,0xb8,0x00,0x01,0x00,0x91,0x14,0x10,0x0a,0x01,0xff,0xe2,0x89,0xb2,0xcc,0xb8, ++ 0x00,0x01,0xff,0xe2,0x89,0xb3,0xcc,0xb8,0x00,0x01,0x00,0x92,0x18,0x91,0x14,0x10, ++ 0x0a,0x01,0xff,0xe2,0x89,0xb6,0xcc,0xb8,0x00,0x01,0xff,0xe2,0x89,0xb7,0xcc,0xb8, ++ 0x00,0x01,0x00,0x01,0x00,0xd0,0x86,0xcf,0x86,0xd5,0x50,0x94,0x4c,0xd3,0x30,0xd2, ++ 0x18,0x91,0x14,0x10,0x0a,0x01,0xff,0xe2,0x89,0xba,0xcc,0xb8,0x00,0x01,0xff,0xe2, ++ 0x89,0xbb,0xcc,0xb8,0x00,0x01,0x00,0x91,0x14,0x10,0x0a,0x01,0xff,0xe2,0x8a,0x82, ++ 0xcc,0xb8,0x00,0x01,0xff,0xe2,0x8a,0x83,0xcc,0xb8,0x00,0x01,0x00,0x92,0x18,0x91, ++ 0x14,0x10,0x0a,0x01,0xff,0xe2,0x8a,0x86,0xcc,0xb8,0x00,0x01,0xff,0xe2,0x8a,0x87, ++ 0xcc,0xb8,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x94,0x30,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0xd1,0x14,0x10,0x0a,0x01,0xff,0xe2,0x8a,0xa2,0xcc,0xb8,0x00,0x01, ++ 0xff,0xe2,0x8a,0xa8,0xcc,0xb8,0x00,0x10,0x0a,0x01,0xff,0xe2,0x8a,0xa9,0xcc,0xb8, ++ 0x00,0x01,0xff,0xe2,0x8a,0xab,0xcc,0xb8,0x00,0x01,0x00,0xcf,0x86,0x55,0x04,0x01, ++ 0x00,0xd4,0x5c,0xd3,0x2c,0x92,0x28,0xd1,0x14,0x10,0x0a,0x01,0xff,0xe2,0x89,0xbc, ++ 0xcc,0xb8,0x00,0x01,0xff,0xe2,0x89,0xbd,0xcc,0xb8,0x00,0x10,0x0a,0x01,0xff,0xe2, ++ 0x8a,0x91,0xcc,0xb8,0x00,0x01,0xff,0xe2,0x8a,0x92,0xcc,0xb8,0x00,0x01,0x00,0xd2, ++ 0x18,0x51,0x04,0x01,0x00,0x10,0x0a,0x01,0xff,0xe2,0x8a,0xb2,0xcc,0xb8,0x00,0x01, ++ 0xff,0xe2,0x8a,0xb3,0xcc,0xb8,0x00,0x91,0x14,0x10,0x0a,0x01,0xff,0xe2,0x8a,0xb4, ++ 0xcc,0xb8,0x00,0x01,0xff,0xe2,0x8a,0xb5,0xcc,0xb8,0x00,0x01,0x00,0x93,0x0c,0x92, ++ 0x08,0x11,0x04,0x01,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0xd1,0x64,0xd0,0x3e,0xcf, ++ 0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01,0x00,0x04, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x94,0x20,0x53,0x04,0x01,0x00,0x92, ++ 0x18,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x80,0x88,0x00,0x10,0x08,0x01, ++ 0xff,0xe3,0x80,0x89,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0x55,0x04,0x01, ++ 0x00,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x04,0x00,0x91,0x08,0x10,0x04,0x06,0x00,0x04,0x00,0x04,0x00,0xd0, ++ 0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x04,0x00,0x53,0x04,0x04,0x00,0x92,0x0c,0x51, ++ 0x04,0x04,0x00,0x10,0x04,0x04,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0xcf,0x86,0xd5, ++ 0x2c,0xd4,0x14,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0x51,0x04,0x06,0x00,0x10, ++ 0x04,0x06,0x00,0x07,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x07,0x00,0x08, ++ 0x00,0x08,0x00,0x08,0x00,0x12,0x04,0x08,0x00,0x09,0x00,0xd4,0x14,0x53,0x04,0x09, ++ 0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x0b,0x00,0x0c,0x00,0x0c,0x00,0x0c,0x00,0xd3, ++ 0x08,0x12,0x04,0x0c,0x00,0x10,0x00,0xd2,0x0c,0x51,0x04,0x10,0x00,0x10,0x04,0x10, ++ 0x00,0x12,0x00,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x13,0x00,0xd3,0xa6,0xd2, ++ 0x74,0xd1,0x40,0xd0,0x22,0xcf,0x86,0x55,0x04,0x01,0x00,0x94,0x18,0x93,0x14,0x52, ++ 0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x04,0x00,0x10,0x04,0x04,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0x95,0x18,0x94,0x14,0x53,0x04,0x01,0x00,0x92, ++ 0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01, ++ 0x00,0xd0,0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x14,0x53, ++ 0x04,0x01,0x00,0x92,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x06,0x00,0x06, ++ 0x00,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0x51,0x04,0x06,0x00,0x10,0x04,0x06, ++ 0x00,0x07,0x00,0xd1,0x06,0xcf,0x06,0x01,0x00,0xd0,0x1a,0xcf,0x86,0x95,0x14,0x54, ++ 0x04,0x01,0x00,0x93,0x0c,0x52,0x04,0x01,0x00,0x11,0x04,0x01,0x00,0x06,0x00,0x06, ++ 0x00,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0x54,0x04,0x01,0x00,0x13,0x04,0x04, ++ 0x00,0x06,0x00,0xd2,0xdc,0xd1,0x48,0xd0,0x26,0xcf,0x86,0x95,0x20,0x54,0x04,0x01, ++ 0x00,0xd3,0x0c,0x52,0x04,0x01,0x00,0x11,0x04,0x07,0x00,0x06,0x00,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x08,0x00,0x04,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0x55, ++ 0x04,0x01,0x00,0x54,0x04,0x01,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04,0x04,0x00,0x06, ++ 0x00,0x06,0x00,0x52,0x04,0x06,0x00,0x11,0x04,0x06,0x00,0x08,0x00,0xd0,0x5e,0xcf, ++ 0x86,0xd5,0x2c,0xd4,0x10,0x53,0x04,0x06,0x00,0x92,0x08,0x11,0x04,0x06,0x00,0x07, ++ 0x00,0x07,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04,0x07,0x00,0x08,0x00,0x08,0x00,0x52, ++ 0x04,0x08,0x00,0x91,0x08,0x10,0x04,0x08,0x00,0x0a,0x00,0x0b,0x00,0xd4,0x10,0x93, ++ 0x0c,0x92,0x08,0x11,0x04,0x07,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0xd3,0x10,0x92, ++ 0x0c,0x51,0x04,0x08,0x00,0x10,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0x52,0x04,0x0a, ++ 0x00,0x91,0x08,0x10,0x04,0x0a,0x00,0x0b,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x1c,0x94, ++ 0x18,0xd3,0x08,0x12,0x04,0x0a,0x00,0x0b,0x00,0x52,0x04,0x0b,0x00,0x51,0x04,0x0b, ++ 0x00,0x10,0x04,0x0c,0x00,0x0b,0x00,0x0b,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x51, ++ 0x04,0x0b,0x00,0x10,0x04,0x0c,0x00,0x0b,0x00,0x0c,0x00,0x0b,0x00,0x0b,0x00,0xd1, ++ 0xa8,0xd0,0x42,0xcf,0x86,0xd5,0x28,0x94,0x24,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10, ++ 0x04,0x10,0x00,0x01,0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x0c,0x00,0x01, ++ 0x00,0x92,0x08,0x11,0x04,0x01,0x00,0x0c,0x00,0x01,0x00,0x01,0x00,0x94,0x14,0x53, ++ 0x04,0x01,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c,0x00,0x01,0x00,0x01,0x00,0x01, ++ 0x00,0x01,0x00,0xcf,0x86,0xd5,0x40,0xd4,0x18,0x53,0x04,0x01,0x00,0x52,0x04,0x01, ++ 0x00,0xd1,0x08,0x10,0x04,0x0c,0x00,0x01,0x00,0x10,0x04,0x0c,0x00,0x01,0x00,0xd3, ++ 0x18,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x0c,0x00,0x51,0x04,0x0c, ++ 0x00,0x10,0x04,0x01,0x00,0x0b,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x0c,0x00,0xd4,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x06,0x00,0x93,0x0c,0x52,0x04,0x06,0x00,0x11, ++ 0x04,0x06,0x00,0x01,0x00,0x01,0x00,0xd0,0x3e,0xcf,0x86,0xd5,0x18,0x54,0x04,0x01, ++ 0x00,0x93,0x10,0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x0c,0x00,0x0c, ++ 0x00,0x01,0x00,0x54,0x04,0x01,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c, ++ 0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10, ++ 0x04,0x01,0x00,0x0c,0x00,0xcf,0x86,0xd5,0x2c,0x94,0x28,0xd3,0x10,0x52,0x04,0x08, ++ 0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x09,0x00,0xd2,0x0c,0x51,0x04,0x09, ++ 0x00,0x10,0x04,0x09,0x00,0x0d,0x00,0x91,0x08,0x10,0x04,0x0a,0x00,0x0d,0x00,0x0c, ++ 0x00,0x06,0x00,0x94,0x0c,0x53,0x04,0x06,0x00,0x12,0x04,0x06,0x00,0x0a,0x00,0x06, ++ 0x00,0xe4,0x39,0x01,0xd3,0x0c,0xd2,0x06,0xcf,0x06,0x04,0x00,0xcf,0x06,0x06,0x00, ++ 0xd2,0x30,0xd1,0x06,0xcf,0x06,0x06,0x00,0xd0,0x06,0xcf,0x06,0x06,0x00,0xcf,0x86, ++ 0x95,0x1e,0x54,0x04,0x06,0x00,0x53,0x04,0x06,0x00,0x52,0x04,0x06,0x00,0x91,0x0e, ++ 0x10,0x0a,0x06,0xff,0xe2,0xab,0x9d,0xcc,0xb8,0x00,0x06,0x00,0x06,0x00,0x06,0x00, ++ 0xd1,0x80,0xd0,0x3a,0xcf,0x86,0xd5,0x28,0xd4,0x10,0x53,0x04,0x07,0x00,0x52,0x04, ++ 0x07,0x00,0x11,0x04,0x07,0x00,0x08,0x00,0xd3,0x08,0x12,0x04,0x08,0x00,0x09,0x00, ++ 0x92,0x0c,0x51,0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0x94,0x0c, ++ 0x93,0x08,0x12,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00,0xcf,0x86,0xd5,0x30, ++ 0xd4,0x14,0x53,0x04,0x0a,0x00,0x52,0x04,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a,0x00, ++ 0x10,0x00,0x10,0x00,0xd3,0x10,0x52,0x04,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a,0x00, ++ 0x0b,0x00,0x0b,0x00,0x92,0x08,0x11,0x04,0x0b,0x00,0x10,0x00,0x10,0x00,0x54,0x04, ++ 0x10,0x00,0x93,0x0c,0x52,0x04,0x10,0x00,0x11,0x04,0x00,0x00,0x10,0x00,0x10,0x00, ++ 0xd0,0x32,0xcf,0x86,0xd5,0x14,0x54,0x04,0x10,0x00,0x93,0x0c,0x52,0x04,0x10,0x00, ++ 0x11,0x04,0x10,0x00,0x00,0x00,0x10,0x00,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00, ++ 0xd2,0x08,0x11,0x04,0x10,0x00,0x14,0x00,0x91,0x08,0x10,0x04,0x14,0x00,0x10,0x00, ++ 0x10,0x00,0xcf,0x86,0xd5,0x28,0xd4,0x14,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x10,0x00,0x15,0x00,0x10,0x00,0x10,0x00,0x93,0x10,0x92,0x0c,0x51,0x04, ++ 0x10,0x00,0x10,0x04,0x13,0x00,0x14,0x00,0x14,0x00,0x14,0x00,0xd4,0x0c,0x53,0x04, ++ 0x14,0x00,0x12,0x04,0x14,0x00,0x11,0x00,0x53,0x04,0x14,0x00,0x52,0x04,0x14,0x00, ++ 0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x15,0x00,0xe3,0xb9,0x01,0xd2,0xac,0xd1, ++ 0x68,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x08,0x00,0x94,0x14,0x53,0x04,0x08,0x00,0x52, ++ 0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00,0x00,0x08,0x00,0xcf, ++ 0x86,0xd5,0x18,0x54,0x04,0x08,0x00,0x53,0x04,0x08,0x00,0x52,0x04,0x08,0x00,0x51, ++ 0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00,0x00,0xd4,0x14,0x53,0x04,0x09,0x00,0x52, ++ 0x04,0x09,0x00,0x91,0x08,0x10,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0xd3,0x10,0x92, ++ 0x0c,0x91,0x08,0x10,0x04,0x0b,0x00,0x0a,0x00,0x0a,0x00,0x09,0x00,0x52,0x04,0x0a, ++ 0x00,0x11,0x04,0x0a,0x00,0x0b,0x00,0xd0,0x06,0xcf,0x06,0x08,0x00,0xcf,0x86,0x55, ++ 0x04,0x08,0x00,0xd4,0x1c,0x53,0x04,0x08,0x00,0xd2,0x0c,0x51,0x04,0x08,0x00,0x10, ++ 0x04,0x08,0x00,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x0b,0xe6,0xd3, ++ 0x0c,0x92,0x08,0x11,0x04,0x0b,0xe6,0x0d,0x00,0x00,0x00,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0xd1,0x6c,0xd0,0x2a,0xcf,0x86,0x55, ++ 0x04,0x08,0x00,0x94,0x20,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10, ++ 0x04,0x00,0x00,0x0d,0x00,0x52,0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x0d, ++ 0x00,0x00,0x00,0x08,0x00,0xcf,0x86,0x55,0x04,0x08,0x00,0xd4,0x1c,0xd3,0x0c,0x52, ++ 0x04,0x08,0x00,0x11,0x04,0x08,0x00,0x0d,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00, ++ 0x00,0x10,0x04,0x00,0x00,0x08,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10, ++ 0x04,0x00,0x00,0x0c,0x09,0xd0,0x5a,0xcf,0x86,0xd5,0x18,0x54,0x04,0x08,0x00,0x93, ++ 0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00,0x00,0x00, ++ 0x00,0xd4,0x20,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08, ++ 0x00,0x00,0x00,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00, ++ 0x00,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00, ++ 0x00,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00,0x00,0xcf, ++ 0x86,0x95,0x40,0xd4,0x20,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10, ++ 0x04,0x08,0x00,0x00,0x00,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08, ++ 0x00,0x00,0x00,0xd3,0x10,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08, ++ 0x00,0x00,0x00,0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x00, ++ 0x00,0x0a,0xe6,0xd2,0x9c,0xd1,0x68,0xd0,0x32,0xcf,0x86,0xd5,0x14,0x54,0x04,0x08, ++ 0x00,0x53,0x04,0x08,0x00,0x52,0x04,0x0a,0x00,0x11,0x04,0x08,0x00,0x0a,0x00,0x54, ++ 0x04,0x0a,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0a,0x00,0x0b,0x00,0x0d, ++ 0x00,0x0d,0x00,0x12,0x04,0x0d,0x00,0x10,0x00,0xcf,0x86,0x95,0x30,0x94,0x2c,0xd3, ++ 0x18,0xd2,0x0c,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x12,0x00,0x91,0x08,0x10, ++ 0x04,0x12,0x00,0x13,0x00,0x13,0x00,0xd2,0x08,0x11,0x04,0x13,0x00,0x14,0x00,0x51, ++ 0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x15,0x00,0x00,0x00,0x00,0x00,0xd0,0x1e,0xcf, ++ 0x86,0x95,0x18,0x54,0x04,0x04,0x00,0x53,0x04,0x04,0x00,0x92,0x0c,0x51,0x04,0x04, ++ 0x00,0x10,0x04,0x00,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0xcf,0x86,0x55,0x04,0x04, ++ 0x00,0x54,0x04,0x04,0x00,0x93,0x08,0x12,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0xd1, ++ 0x06,0xcf,0x06,0x04,0x00,0xd0,0x06,0xcf,0x06,0x04,0x00,0xcf,0x86,0xd5,0x14,0x54, ++ 0x04,0x04,0x00,0x93,0x0c,0x52,0x04,0x04,0x00,0x11,0x04,0x04,0x00,0x00,0x00,0x00, ++ 0x00,0x54,0x04,0x00,0x00,0x53,0x04,0x04,0x00,0x12,0x04,0x04,0x00,0x00,0x00,0xcf, ++ 0x86,0xe5,0xa6,0x05,0xe4,0x9f,0x05,0xe3,0x96,0x04,0xe2,0xe4,0x03,0xe1,0xc0,0x01, ++ 0xd0,0x3e,0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x1c,0x53,0x04,0x01,0x00,0xd2,0x0c, ++ 0x51,0x04,0x01,0x00,0x10,0x04,0x01,0xda,0x01,0xe4,0x91,0x08,0x10,0x04,0x01,0xe8, ++ 0x01,0xde,0x01,0xe0,0x53,0x04,0x01,0x00,0xd2,0x0c,0x51,0x04,0x04,0x00,0x10,0x04, ++ 0x04,0x00,0x06,0x00,0x51,0x04,0x06,0x00,0x10,0x04,0x04,0x00,0x01,0x00,0xcf,0x86, ++ 0xd5,0xaa,0xd4,0x32,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81, ++ 0x8b,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0x8d,0xe3,0x82, ++ 0x99,0x00,0x01,0x00,0xd3,0x3c,0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81, ++ 0x8f,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0x91,0xe3,0x82, ++ 0x99,0x00,0x01,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81,0x93,0xe3,0x82,0x99, ++ 0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0x95,0xe3,0x82,0x99,0x00,0x01,0x00, ++ 0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81,0x97,0xe3,0x82,0x99,0x00,0x01, ++ 0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0x99,0xe3,0x82,0x99,0x00,0x01,0x00,0xd1,0x0f, ++ 0x10,0x0b,0x01,0xff,0xe3,0x81,0x9b,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b,0x01, ++ 0xff,0xe3,0x81,0x9d,0xe3,0x82,0x99,0x00,0x01,0x00,0xd4,0x53,0xd3,0x3c,0xd2,0x1e, ++ 0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81,0x9f,0xe3,0x82,0x99,0x00,0x01,0x00,0x10, ++ 0x0b,0x01,0xff,0xe3,0x81,0xa1,0xe3,0x82,0x99,0x00,0x01,0x00,0xd1,0x0f,0x10,0x04, ++ 0x01,0x00,0x01,0xff,0xe3,0x81,0xa4,0xe3,0x82,0x99,0x00,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xe3,0x81,0xa6,0xe3,0x82,0x99,0x00,0x92,0x13,0x91,0x0f,0x10,0x04,0x01,0x00, ++ 0x01,0xff,0xe3,0x81,0xa8,0xe3,0x82,0x99,0x00,0x01,0x00,0x01,0x00,0xd3,0x4a,0xd2, ++ 0x25,0xd1,0x16,0x10,0x0b,0x01,0xff,0xe3,0x81,0xaf,0xe3,0x82,0x99,0x00,0x01,0xff, ++ 0xe3,0x81,0xaf,0xe3,0x82,0x9a,0x00,0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x81,0xb2, ++ 0xe3,0x82,0x99,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x81,0xb2,0xe3,0x82,0x9a, ++ 0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0xb5,0xe3,0x82,0x99,0x00,0x01,0xff, ++ 0xe3,0x81,0xb5,0xe3,0x82,0x9a,0x00,0xd2,0x1e,0xd1,0x0f,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xe3,0x81,0xb8,0xe3,0x82,0x99,0x00,0x10,0x0b,0x01,0xff,0xe3,0x81,0xb8,0xe3, ++ 0x82,0x9a,0x00,0x01,0x00,0x91,0x16,0x10,0x0b,0x01,0xff,0xe3,0x81,0xbb,0xe3,0x82, ++ 0x99,0x00,0x01,0xff,0xe3,0x81,0xbb,0xe3,0x82,0x9a,0x00,0x01,0x00,0xd0,0xee,0xcf, ++ 0x86,0xd5,0x42,0x54,0x04,0x01,0x00,0xd3,0x1b,0x52,0x04,0x01,0x00,0xd1,0x0f,0x10, ++ 0x0b,0x01,0xff,0xe3,0x81,0x86,0xe3,0x82,0x99,0x00,0x06,0x00,0x10,0x04,0x06,0x00, ++ 0x00,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x00,0x00,0x01,0x08,0x10,0x04,0x01,0x08, ++ 0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x82,0x9d,0xe3,0x82,0x99, ++ 0x00,0x06,0x00,0xd4,0x32,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x06,0x00,0x01, ++ 0x00,0x01,0x00,0x01,0x00,0x52,0x04,0x01,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3, ++ 0x82,0xab,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x82,0xad,0xe3, ++ 0x82,0x99,0x00,0x01,0x00,0xd3,0x3c,0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3, ++ 0x82,0xaf,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x82,0xb1,0xe3, ++ 0x82,0x99,0x00,0x01,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x82,0xb3,0xe3,0x82, ++ 0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x82,0xb5,0xe3,0x82,0x99,0x00,0x01, ++ 0x00,0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x82,0xb7,0xe3,0x82,0x99,0x00, ++ 0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x82,0xb9,0xe3,0x82,0x99,0x00,0x01,0x00,0xd1, ++ 0x0f,0x10,0x0b,0x01,0xff,0xe3,0x82,0xbb,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x0b, ++ 0x01,0xff,0xe3,0x82,0xbd,0xe3,0x82,0x99,0x00,0x01,0x00,0xcf,0x86,0xd5,0xd5,0xd4, ++ 0x53,0xd3,0x3c,0xd2,0x1e,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3,0x82,0xbf,0xe3,0x82, ++ 0x99,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x83,0x81,0xe3,0x82,0x99,0x00,0x01, ++ 0x00,0xd1,0x0f,0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x83,0x84,0xe3,0x82,0x99,0x00, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x83,0x86,0xe3,0x82,0x99,0x00,0x92,0x13,0x91, ++ 0x0f,0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x83,0x88,0xe3,0x82,0x99,0x00,0x01,0x00, ++ 0x01,0x00,0xd3,0x4a,0xd2,0x25,0xd1,0x16,0x10,0x0b,0x01,0xff,0xe3,0x83,0x8f,0xe3, ++ 0x82,0x99,0x00,0x01,0xff,0xe3,0x83,0x8f,0xe3,0x82,0x9a,0x00,0x10,0x04,0x01,0x00, ++ 0x01,0xff,0xe3,0x83,0x92,0xe3,0x82,0x99,0x00,0xd1,0x0f,0x10,0x0b,0x01,0xff,0xe3, ++ 0x83,0x92,0xe3,0x82,0x9a,0x00,0x01,0x00,0x10,0x0b,0x01,0xff,0xe3,0x83,0x95,0xe3, ++ 0x82,0x99,0x00,0x01,0xff,0xe3,0x83,0x95,0xe3,0x82,0x9a,0x00,0xd2,0x1e,0xd1,0x0f, ++ 0x10,0x04,0x01,0x00,0x01,0xff,0xe3,0x83,0x98,0xe3,0x82,0x99,0x00,0x10,0x0b,0x01, ++ 0xff,0xe3,0x83,0x98,0xe3,0x82,0x9a,0x00,0x01,0x00,0x91,0x16,0x10,0x0b,0x01,0xff, ++ 0xe3,0x83,0x9b,0xe3,0x82,0x99,0x00,0x01,0xff,0xe3,0x83,0x9b,0xe3,0x82,0x9a,0x00, ++ 0x01,0x00,0x54,0x04,0x01,0x00,0xd3,0x22,0x52,0x04,0x01,0x00,0xd1,0x0f,0x10,0x0b, ++ 0x01,0xff,0xe3,0x82,0xa6,0xe3,0x82,0x99,0x00,0x01,0x00,0x10,0x04,0x01,0x00,0x01, ++ 0xff,0xe3,0x83,0xaf,0xe3,0x82,0x99,0x00,0xd2,0x25,0xd1,0x16,0x10,0x0b,0x01,0xff, ++ 0xe3,0x83,0xb0,0xe3,0x82,0x99,0x00,0x01,0xff,0xe3,0x83,0xb1,0xe3,0x82,0x99,0x00, ++ 0x10,0x0b,0x01,0xff,0xe3,0x83,0xb2,0xe3,0x82,0x99,0x00,0x01,0x00,0x51,0x04,0x01, ++ 0x00,0x10,0x0b,0x01,0xff,0xe3,0x83,0xbd,0xe3,0x82,0x99,0x00,0x06,0x00,0xd1,0x65, ++ 0xd0,0x46,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x52,0x04,0x00,0x00,0x91,0x08, ++ 0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd4,0x18,0x53,0x04, ++ 0x01,0x00,0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x0a,0x00,0x10,0x04, ++ 0x13,0x00,0x14,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00, ++ 0x01,0x00,0x01,0x00,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0x94,0x15,0x93,0x11, ++ 0x52,0x04,0x01,0x00,0x91,0x09,0x10,0x05,0x01,0xff,0x00,0x01,0x00,0x01,0x00,0x01, ++ 0x00,0x01,0x00,0xd0,0x32,0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x54, ++ 0x04,0x04,0x00,0x53,0x04,0x04,0x00,0x92,0x0c,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x08,0x14,0x04,0x08,0x00,0x0a,0x00,0x94, ++ 0x0c,0x93,0x08,0x12,0x04,0x0a,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0xd2,0xa4,0xd1, ++ 0x5c,0xd0,0x22,0xcf,0x86,0x95,0x1c,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0x52, ++ 0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x07,0x00,0x10,0x04,0x07,0x00,0x00, ++ 0x00,0x01,0x00,0xcf,0x86,0xd5,0x20,0xd4,0x0c,0x93,0x08,0x12,0x04,0x01,0x00,0x0b, ++ 0x00,0x0b,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x07,0x00,0x06,0x00,0x06, ++ 0x00,0x06,0x00,0x06,0x00,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00,0x52,0x04,0x01, ++ 0x00,0x51,0x04,0x07,0x00,0x10,0x04,0x08,0x00,0x01,0x00,0xd0,0x1e,0xcf,0x86,0x55, ++ 0x04,0x01,0x00,0x54,0x04,0x01,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x01, ++ 0x00,0x06,0x00,0x06,0x00,0x06,0x00,0x06,0x00,0xcf,0x86,0xd5,0x10,0x94,0x0c,0x53, ++ 0x04,0x01,0x00,0x12,0x04,0x01,0x00,0x07,0x00,0x01,0x00,0x54,0x04,0x01,0x00,0x53, ++ 0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x16, ++ 0x00,0xd1,0x30,0xd0,0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0x54, ++ 0x04,0x01,0x00,0xd3,0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x07,0x00,0x92,0x0c,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00,0x01,0x00,0x01, ++ 0x00,0xd0,0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x14,0x54,0x04,0x01,0x00,0x53, ++ 0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x11,0x04,0x01,0x00,0x07,0x00,0x54,0x04,0x01, ++ 0x00,0x53,0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x07,0x00,0xcf,0x06,0x04,0x00,0xcf,0x06,0x04,0x00,0xd1,0x48,0xd0,0x40,0xcf, ++ 0x86,0xd5,0x06,0xcf,0x06,0x04,0x00,0xd4,0x06,0xcf,0x06,0x04,0x00,0xd3,0x2c,0xd2, ++ 0x06,0xcf,0x06,0x04,0x00,0xd1,0x06,0xcf,0x06,0x04,0x00,0xd0,0x1a,0xcf,0x86,0x55, ++ 0x04,0x04,0x00,0x54,0x04,0x04,0x00,0x93,0x0c,0x52,0x04,0x04,0x00,0x11,0x04,0x04, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x07,0x00,0xcf,0x06,0x01,0x00,0xcf,0x86,0xcf, ++ 0x06,0x01,0x00,0xcf,0x86,0xcf,0x06,0x01,0x00,0xe2,0x71,0x05,0xd1,0x8c,0xd0,0x08, ++ 0xcf,0x86,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x01,0x00,0xd4,0x06, ++ 0xcf,0x06,0x01,0x00,0xd3,0x06,0xcf,0x06,0x01,0x00,0xd2,0x06,0xcf,0x06,0x01,0x00, ++ 0xd1,0x06,0xcf,0x06,0x01,0x00,0xd0,0x22,0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x10, ++ 0x93,0x0c,0x52,0x04,0x01,0x00,0x11,0x04,0x01,0x00,0x08,0x00,0x08,0x00,0x53,0x04, ++ 0x08,0x00,0x12,0x04,0x08,0x00,0x0a,0x00,0xcf,0x86,0xd5,0x28,0xd4,0x18,0xd3,0x08, ++ 0x12,0x04,0x0a,0x00,0x0b,0x00,0x52,0x04,0x0b,0x00,0x91,0x08,0x10,0x04,0x0d,0x00, ++ 0x11,0x00,0x11,0x00,0x93,0x0c,0x52,0x04,0x11,0x00,0x11,0x04,0x11,0x00,0x13,0x00, ++ 0x13,0x00,0x94,0x14,0x53,0x04,0x13,0x00,0x92,0x0c,0x51,0x04,0x13,0x00,0x10,0x04, ++ 0x13,0x00,0x14,0x00,0x14,0x00,0x00,0x00,0xe0,0xdb,0x04,0xcf,0x86,0xe5,0xdf,0x01, ++ 0xd4,0x06,0xcf,0x06,0x04,0x00,0xd3,0x74,0xd2,0x6e,0xd1,0x06,0xcf,0x06,0x04,0x00, ++ 0xd0,0x3e,0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x04,0x00,0x52,0x04,0x04,0x00, ++ 0x91,0x08,0x10,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0xd4,0x10,0x93,0x0c, ++ 0x92,0x08,0x11,0x04,0x04,0x00,0x06,0x00,0x04,0x00,0x04,0x00,0x93,0x10,0x52,0x04, ++ 0x04,0x00,0x91,0x08,0x10,0x04,0x06,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0xcf,0x86, ++ 0x95,0x24,0x94,0x20,0x93,0x1c,0xd2,0x0c,0x91,0x08,0x10,0x04,0x04,0x00,0x06,0x00, ++ 0x04,0x00,0xd1,0x08,0x10,0x04,0x04,0x00,0x06,0x00,0x10,0x04,0x04,0x00,0x00,0x00, ++ 0x00,0x00,0x0b,0x00,0x0b,0x00,0xcf,0x06,0x0a,0x00,0xd2,0x84,0xd1,0x4c,0xd0,0x16, ++ 0xcf,0x86,0x55,0x04,0x0a,0x00,0x94,0x0c,0x53,0x04,0x0a,0x00,0x12,0x04,0x0a,0x00, ++ 0x00,0x00,0x00,0x00,0xcf,0x86,0x55,0x04,0x0a,0x00,0xd4,0x1c,0xd3,0x0c,0x92,0x08, ++ 0x11,0x04,0x0c,0x00,0x0a,0x00,0x0a,0x00,0x52,0x04,0x0a,0x00,0x51,0x04,0x0a,0x00, ++ 0x10,0x04,0x0a,0x00,0x0a,0xe6,0xd3,0x08,0x12,0x04,0x0a,0x00,0x0d,0xe6,0x52,0x04, ++ 0x0d,0xe6,0x11,0x04,0x0a,0xe6,0x0a,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04, ++ 0x0a,0x00,0x53,0x04,0x0a,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04, ++ 0x11,0xe6,0x0d,0xe6,0x0b,0x00,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04,0x0b,0x00, ++ 0x93,0x0c,0x92,0x08,0x11,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0x00,0x00,0x00,0xd1,0x40, ++ 0xd0,0x3a,0xcf,0x86,0xd5,0x24,0x54,0x04,0x08,0x00,0xd3,0x10,0x52,0x04,0x08,0x00, ++ 0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x09,0x00,0x92,0x0c,0x51,0x04,0x09,0x00, ++ 0x10,0x04,0x09,0x00,0x0a,0x00,0x0a,0x00,0x94,0x10,0x93,0x0c,0x92,0x08,0x11,0x04, ++ 0x09,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00,0x0a,0x00,0xcf,0x06,0x0a,0x00,0xd0,0x5e, ++ 0xcf,0x86,0xd5,0x28,0xd4,0x18,0x53,0x04,0x0a,0x00,0x52,0x04,0x0a,0x00,0xd1,0x08, ++ 0x10,0x04,0x0a,0x00,0x0c,0x00,0x10,0x04,0x0c,0x00,0x11,0x00,0x93,0x0c,0x92,0x08, ++ 0x11,0x04,0x0c,0x00,0x0d,0x00,0x10,0x00,0x10,0x00,0xd4,0x1c,0x53,0x04,0x0c,0x00, ++ 0xd2,0x0c,0x51,0x04,0x0c,0x00,0x10,0x04,0x0d,0x00,0x10,0x00,0x51,0x04,0x10,0x00, ++ 0x10,0x04,0x12,0x00,0x14,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04,0x10,0x00,0x11,0x00, ++ 0x11,0x00,0x92,0x08,0x11,0x04,0x14,0x00,0x15,0x00,0x15,0x00,0xcf,0x86,0xd5,0x1c, ++ 0x94,0x18,0x93,0x14,0xd2,0x08,0x11,0x04,0x00,0x00,0x15,0x00,0x51,0x04,0x15,0x00, ++ 0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x54,0x04,0x00,0x00,0xd3,0x10, ++ 0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x92,0x0c, ++ 0x51,0x04,0x0d,0x00,0x10,0x04,0x0c,0x00,0x0a,0x00,0x0a,0x00,0xe4,0xf2,0x02,0xe3, ++ 0x65,0x01,0xd2,0x98,0xd1,0x48,0xd0,0x36,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10, ++ 0x52,0x04,0x08,0x00,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x09,0x08,0x00,0x08,0x00, ++ 0x08,0x00,0xd4,0x0c,0x53,0x04,0x08,0x00,0x12,0x04,0x08,0x00,0x00,0x00,0x53,0x04, ++ 0x0b,0x00,0x92,0x08,0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0x55,0x04, ++ 0x09,0x00,0x54,0x04,0x09,0x00,0x13,0x04,0x09,0x00,0x00,0x00,0xd0,0x06,0xcf,0x06, ++ 0x0a,0x00,0xcf,0x86,0xd5,0x2c,0xd4,0x1c,0xd3,0x10,0x52,0x04,0x0a,0x00,0x91,0x08, ++ 0x10,0x04,0x0a,0x09,0x12,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00, ++ 0x0a,0x00,0x53,0x04,0x0a,0x00,0x92,0x08,0x11,0x04,0x0a,0x00,0x00,0x00,0x00,0x00, ++ 0x54,0x04,0x0b,0xe6,0xd3,0x0c,0x92,0x08,0x11,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0x00, ++ 0x52,0x04,0x0b,0x00,0x11,0x04,0x11,0x00,0x14,0x00,0xd1,0x60,0xd0,0x22,0xcf,0x86, ++ 0x55,0x04,0x0a,0x00,0x94,0x18,0x53,0x04,0x0a,0x00,0xd2,0x0c,0x51,0x04,0x0a,0x00, ++ 0x10,0x04,0x0a,0x00,0x0a,0xdc,0x11,0x04,0x0a,0xdc,0x0a,0x00,0x0a,0x00,0xcf,0x86, ++ 0xd5,0x24,0x54,0x04,0x0a,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x0a,0x00,0x10,0x04, ++ 0x0a,0x00,0x0a,0x09,0x00,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x0a,0x00,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00, ++ 0x91,0x08,0x10,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xd0,0x1e,0xcf,0x86,0x55,0x04, ++ 0x0b,0x00,0x54,0x04,0x0b,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x0b,0x00,0x10,0x04, ++ 0x0b,0x00,0x0b,0x07,0x0b,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x34,0xd4,0x20,0xd3,0x10, ++ 0x92,0x0c,0x91,0x08,0x10,0x04,0x0b,0x09,0x0b,0x00,0x0b,0x00,0x0b,0x00,0x52,0x04, ++ 0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x00,0x00,0x0b,0x00,0x53,0x04,0x0b,0x00, ++ 0xd2,0x08,0x11,0x04,0x0b,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x0b,0x00,0x54,0x04, ++ 0x10,0x00,0x53,0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04, ++ 0x10,0x00,0x00,0x00,0xd2,0xd0,0xd1,0x50,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x0a,0x00, ++ 0x54,0x04,0x0a,0x00,0x93,0x10,0x52,0x04,0x0a,0x00,0x51,0x04,0x0a,0x00,0x10,0x04, ++ 0x0a,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x20,0xd4,0x10,0x53,0x04,0x0a,0x00, ++ 0x52,0x04,0x0a,0x00,0x11,0x04,0x0a,0x00,0x00,0x00,0x53,0x04,0x0a,0x00,0x92,0x08, ++ 0x11,0x04,0x0a,0x00,0x00,0x00,0x0a,0x00,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00, ++ 0x12,0x04,0x0b,0x00,0x10,0x00,0xd0,0x3a,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04, ++ 0x0b,0x00,0xd3,0x1c,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0xe6, ++ 0xd1,0x08,0x10,0x04,0x0b,0xdc,0x0b,0x00,0x10,0x04,0x0b,0x00,0x0b,0xe6,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x0b,0xe6,0x0b,0x00,0x0b,0x00,0x11,0x04,0x0b,0x00,0x0b,0xe6, ++ 0xcf,0x86,0xd5,0x2c,0xd4,0x18,0x93,0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x0b,0x00, ++ 0x0b,0xe6,0x10,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x00,0x00, ++ 0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0b,0x00,0x0b,0x00,0x54,0x04, ++ 0x0d,0x00,0x93,0x10,0x52,0x04,0x0d,0x00,0x51,0x04,0x0d,0x00,0x10,0x04,0x0d,0x09, ++ 0x00,0x00,0x00,0x00,0xd1,0x8c,0xd0,0x72,0xcf,0x86,0xd5,0x4c,0xd4,0x30,0xd3,0x18, ++ 0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0c,0x00,0x0c,0x00,0x51,0x04,0x0c,0x00, ++ 0x10,0x04,0x0c,0x00,0x00,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0c,0x00, ++ 0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00,0x93,0x18,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x00,0x00,0x0c,0x00,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04, ++ 0x0c,0x00,0x00,0x00,0x00,0x00,0x94,0x20,0xd3,0x10,0x52,0x04,0x0c,0x00,0x51,0x04, ++ 0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00,0x52,0x04,0x0c,0x00,0x51,0x04,0x0c,0x00, ++ 0x10,0x04,0x0c,0x00,0x00,0x00,0x10,0x00,0xcf,0x86,0x55,0x04,0x10,0x00,0x94,0x10, ++ 0x93,0x0c,0x52,0x04,0x11,0x00,0x11,0x04,0x10,0x00,0x15,0x00,0x00,0x00,0x11,0x00, ++ 0xd0,0x06,0xcf,0x06,0x11,0x00,0xcf,0x86,0x55,0x04,0x0b,0x00,0xd4,0x14,0x53,0x04, ++ 0x0b,0x00,0x52,0x04,0x0b,0x00,0x91,0x08,0x10,0x04,0x0b,0x00,0x0b,0x09,0x00,0x00, ++ 0x53,0x04,0x0b,0x00,0x92,0x08,0x11,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0xcf,0x06, ++ 0x02,0xff,0xff,0xcf,0x86,0xcf,0x06,0x02,0xff,0xff,0xd1,0x76,0xd0,0x09,0xcf,0x86, ++ 0xcf,0x06,0x02,0xff,0xff,0xcf,0x86,0x85,0xd4,0x07,0xcf,0x06,0x02,0xff,0xff,0xd3, ++ 0x07,0xcf,0x06,0x02,0xff,0xff,0xd2,0x07,0xcf,0x06,0x02,0xff,0xff,0xd1,0x07,0xcf, ++ 0x06,0x02,0xff,0xff,0xd0,0x18,0xcf,0x86,0x55,0x05,0x02,0xff,0xff,0x94,0x0d,0x93, ++ 0x09,0x12,0x05,0x02,0xff,0xff,0x00,0x00,0x00,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x24, ++ 0x94,0x20,0xd3,0x10,0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00, ++ 0x00,0x00,0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0b,0x00,0x0b,0x00, ++ 0x0b,0x00,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00,0x12,0x04,0x0b,0x00,0x00,0x00, ++ 0xd0,0x08,0xcf,0x86,0xcf,0x06,0x01,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x01,0x00, ++ 0xe4,0x9c,0x10,0xe3,0x16,0x08,0xd2,0x06,0xcf,0x06,0x01,0x00,0xe1,0x08,0x04,0xe0, ++ 0x04,0x02,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe8,0xb1,0x88,0x00,0x01,0xff,0xe6,0x9b,0xb4,0x00,0x10,0x08,0x01, ++ 0xff,0xe8,0xbb,0x8a,0x00,0x01,0xff,0xe8,0xb3,0x88,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe6,0xbb,0x91,0x00,0x01,0xff,0xe4,0xb8,0xb2,0x00,0x10,0x08,0x01,0xff,0xe5, ++ 0x8f,0xa5,0x00,0x01,0xff,0xe9,0xbe,0x9c,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe9,0xbe,0x9c,0x00,0x01,0xff,0xe5,0xa5,0x91,0x00,0x10,0x08,0x01,0xff,0xe9, ++ 0x87,0x91,0x00,0x01,0xff,0xe5,0x96,0x87,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5, ++ 0xa5,0x88,0x00,0x01,0xff,0xe6,0x87,0xb6,0x00,0x10,0x08,0x01,0xff,0xe7,0x99,0xa9, ++ 0x00,0x01,0xff,0xe7,0xbe,0x85,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe8,0x98,0xbf,0x00,0x01,0xff,0xe8,0x9e,0xba,0x00,0x10,0x08,0x01,0xff,0xe8, ++ 0xa3,0xb8,0x00,0x01,0xff,0xe9,0x82,0x8f,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6, ++ 0xa8,0x82,0x00,0x01,0xff,0xe6,0xb4,0x9b,0x00,0x10,0x08,0x01,0xff,0xe7,0x83,0x99, ++ 0x00,0x01,0xff,0xe7,0x8f,0x9e,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8, ++ 0x90,0xbd,0x00,0x01,0xff,0xe9,0x85,0xaa,0x00,0x10,0x08,0x01,0xff,0xe9,0xa7,0xb1, ++ 0x00,0x01,0xff,0xe4,0xba,0x82,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0x8d,0xb5, ++ 0x00,0x01,0xff,0xe6,0xac,0x84,0x00,0x10,0x08,0x01,0xff,0xe7,0x88,0x9b,0x00,0x01, ++ 0xff,0xe8,0x98,0xad,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe9,0xb8,0x9e,0x00,0x01,0xff,0xe5,0xb5,0x90,0x00,0x10,0x08,0x01,0xff,0xe6, ++ 0xbf,0xab,0x00,0x01,0xff,0xe8,0x97,0x8d,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8, ++ 0xa5,0xa4,0x00,0x01,0xff,0xe6,0x8b,0x89,0x00,0x10,0x08,0x01,0xff,0xe8,0x87,0x98, ++ 0x00,0x01,0xff,0xe8,0xa0,0x9f,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5, ++ 0xbb,0x8a,0x00,0x01,0xff,0xe6,0x9c,0x97,0x00,0x10,0x08,0x01,0xff,0xe6,0xb5,0xaa, ++ 0x00,0x01,0xff,0xe7,0x8b,0xbc,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0x83,0x8e, ++ 0x00,0x01,0xff,0xe4,0xbe,0x86,0x00,0x10,0x08,0x01,0xff,0xe5,0x86,0xb7,0x00,0x01, ++ 0xff,0xe5,0x8b,0x9e,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6, ++ 0x93,0x84,0x00,0x01,0xff,0xe6,0xab,0x93,0x00,0x10,0x08,0x01,0xff,0xe7,0x88,0x90, ++ 0x00,0x01,0xff,0xe7,0x9b,0xa7,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0x80,0x81, ++ 0x00,0x01,0xff,0xe8,0x98,0x86,0x00,0x10,0x08,0x01,0xff,0xe8,0x99,0x9c,0x00,0x01, ++ 0xff,0xe8,0xb7,0xaf,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0x9c,0xb2, ++ 0x00,0x01,0xff,0xe9,0xad,0xaf,0x00,0x10,0x08,0x01,0xff,0xe9,0xb7,0xba,0x00,0x01, ++ 0xff,0xe7,0xa2,0x8c,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe7,0xa5,0xbf,0x00,0x01, ++ 0xff,0xe7,0xb6,0xa0,0x00,0x10,0x08,0x01,0xff,0xe8,0x8f,0x89,0x00,0x01,0xff,0xe9, ++ 0x8c,0x84,0x00,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe9,0xb9,0xbf,0x00,0x01,0xff,0xe8,0xab,0x96,0x00,0x10,0x08, ++ 0x01,0xff,0xe5,0xa3,0x9f,0x00,0x01,0xff,0xe5,0xbc,0x84,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe7,0xb1,0xa0,0x00,0x01,0xff,0xe8,0x81,0xbe,0x00,0x10,0x08,0x01,0xff, ++ 0xe7,0x89,0xa2,0x00,0x01,0xff,0xe7,0xa3,0x8a,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe8,0xb3,0x82,0x00,0x01,0xff,0xe9,0x9b,0xb7,0x00,0x10,0x08,0x01,0xff, ++ 0xe5,0xa3,0x98,0x00,0x01,0xff,0xe5,0xb1,0xa2,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe6,0xa8,0x93,0x00,0x01,0xff,0xe6,0xb7,0x9a,0x00,0x10,0x08,0x01,0xff,0xe6,0xbc, ++ 0x8f,0x00,0x01,0xff,0xe7,0xb4,0xaf,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe7,0xb8,0xb7,0x00,0x01,0xff,0xe9,0x99,0x8b,0x00,0x10,0x08,0x01,0xff, ++ 0xe5,0x8b,0x92,0x00,0x01,0xff,0xe8,0x82,0x8b,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe5,0x87,0x9c,0x00,0x01,0xff,0xe5,0x87,0x8c,0x00,0x10,0x08,0x01,0xff,0xe7,0xa8, ++ 0x9c,0x00,0x01,0xff,0xe7,0xb6,0xbe,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe8,0x8f,0xb1,0x00,0x01,0xff,0xe9,0x99,0xb5,0x00,0x10,0x08,0x01,0xff,0xe8,0xae, ++ 0x80,0x00,0x01,0xff,0xe6,0x8b,0x8f,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0xa8, ++ 0x82,0x00,0x01,0xff,0xe8,0xab,0xbe,0x00,0x10,0x08,0x01,0xff,0xe4,0xb8,0xb9,0x00, ++ 0x01,0xff,0xe5,0xaf,0xa7,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe6,0x80,0x92,0x00,0x01,0xff,0xe7,0x8e,0x87,0x00,0x10,0x08,0x01,0xff, ++ 0xe7,0x95,0xb0,0x00,0x01,0xff,0xe5,0x8c,0x97,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe7,0xa3,0xbb,0x00,0x01,0xff,0xe4,0xbe,0xbf,0x00,0x10,0x08,0x01,0xff,0xe5,0xbe, ++ 0xa9,0x00,0x01,0xff,0xe4,0xb8,0x8d,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe6,0xb3,0x8c,0x00,0x01,0xff,0xe6,0x95,0xb8,0x00,0x10,0x08,0x01,0xff,0xe7,0xb4, ++ 0xa2,0x00,0x01,0xff,0xe5,0x8f,0x83,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0xa1, ++ 0x9e,0x00,0x01,0xff,0xe7,0x9c,0x81,0x00,0x10,0x08,0x01,0xff,0xe8,0x91,0x89,0x00, ++ 0x01,0xff,0xe8,0xaa,0xaa,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe6,0xae,0xba,0x00,0x01,0xff,0xe8,0xbe,0xb0,0x00,0x10,0x08,0x01,0xff,0xe6,0xb2, ++ 0x88,0x00,0x01,0xff,0xe6,0x8b,0xbe,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0x8b, ++ 0xa5,0x00,0x01,0xff,0xe6,0x8e,0xa0,0x00,0x10,0x08,0x01,0xff,0xe7,0x95,0xa5,0x00, ++ 0x01,0xff,0xe4,0xba,0xae,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0x85, ++ 0xa9,0x00,0x01,0xff,0xe5,0x87,0x89,0x00,0x10,0x08,0x01,0xff,0xe6,0xa2,0x81,0x00, ++ 0x01,0xff,0xe7,0xb3,0xa7,0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0x89,0xaf,0x00, ++ 0x01,0xff,0xe8,0xab,0x92,0x00,0x10,0x08,0x01,0xff,0xe9,0x87,0x8f,0x00,0x01,0xff, ++ 0xe5,0x8b,0xb5,0x00,0xe0,0x04,0x02,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe5,0x91,0x82,0x00,0x01,0xff,0xe5,0xa5, ++ 0xb3,0x00,0x10,0x08,0x01,0xff,0xe5,0xbb,0xac,0x00,0x01,0xff,0xe6,0x97,0x85,0x00, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0xbf,0xbe,0x00,0x01,0xff,0xe7,0xa4,0xaa,0x00, ++ 0x10,0x08,0x01,0xff,0xe9,0x96,0xad,0x00,0x01,0xff,0xe9,0xa9,0xaa,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0xba,0x97,0x00,0x01,0xff,0xe9,0xbb,0x8e,0x00, ++ 0x10,0x08,0x01,0xff,0xe5,0x8a,0x9b,0x00,0x01,0xff,0xe6,0x9b,0x86,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe6,0xad,0xb7,0x00,0x01,0xff,0xe8,0xbd,0xa2,0x00,0x10,0x08, ++ 0x01,0xff,0xe5,0xb9,0xb4,0x00,0x01,0xff,0xe6,0x86,0x90,0x00,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0x88,0x80,0x00,0x01,0xff,0xe6,0x92,0x9a,0x00, ++ 0x10,0x08,0x01,0xff,0xe6,0xbc,0xa3,0x00,0x01,0xff,0xe7,0x85,0x89,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe7,0x92,0x89,0x00,0x01,0xff,0xe7,0xa7,0x8a,0x00,0x10,0x08, ++ 0x01,0xff,0xe7,0xb7,0xb4,0x00,0x01,0xff,0xe8,0x81,0xaf,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe8,0xbc,0xa6,0x00,0x01,0xff,0xe8,0x93,0xae,0x00,0x10,0x08, ++ 0x01,0xff,0xe9,0x80,0xa3,0x00,0x01,0xff,0xe9,0x8d,0x8a,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe5,0x88,0x97,0x00,0x01,0xff,0xe5,0x8a,0xa3,0x00,0x10,0x08,0x01,0xff, ++ 0xe5,0x92,0xbd,0x00,0x01,0xff,0xe7,0x83,0x88,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0xe8,0xa3,0x82,0x00,0x01,0xff,0xe8,0xaa,0xaa,0x00, ++ 0x10,0x08,0x01,0xff,0xe5,0xbb,0x89,0x00,0x01,0xff,0xe5,0xbf,0xb5,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe6,0x8d,0xbb,0x00,0x01,0xff,0xe6,0xae,0xae,0x00,0x10,0x08, ++ 0x01,0xff,0xe7,0xb0,0xbe,0x00,0x01,0xff,0xe7,0x8d,0xb5,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe4,0xbb,0xa4,0x00,0x01,0xff,0xe5,0x9b,0xb9,0x00,0x10,0x08, ++ 0x01,0xff,0xe5,0xaf,0xa7,0x00,0x01,0xff,0xe5,0xb6,0xba,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe6,0x80,0x9c,0x00,0x01,0xff,0xe7,0x8e,0xb2,0x00,0x10,0x08,0x01,0xff, ++ 0xe7,0x91,0xa9,0x00,0x01,0xff,0xe7,0xbe,0x9a,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe8,0x81,0x86,0x00,0x01,0xff,0xe9,0x88,0xb4,0x00,0x10,0x08, ++ 0x01,0xff,0xe9,0x9b,0xb6,0x00,0x01,0xff,0xe9,0x9d,0x88,0x00,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe9,0xa0,0x98,0x00,0x01,0xff,0xe4,0xbe,0x8b,0x00,0x10,0x08,0x01,0xff, ++ 0xe7,0xa6,0xae,0x00,0x01,0xff,0xe9,0x86,0xb4,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe9,0x9a,0xb8,0x00,0x01,0xff,0xe6,0x83,0xa1,0x00,0x10,0x08,0x01,0xff, ++ 0xe4,0xba,0x86,0x00,0x01,0xff,0xe5,0x83,0x9a,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe5,0xaf,0xae,0x00,0x01,0xff,0xe5,0xb0,0xbf,0x00,0x10,0x08,0x01,0xff,0xe6,0x96, ++ 0x99,0x00,0x01,0xff,0xe6,0xa8,0x82,0x00,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe7,0x87,0x8e,0x00,0x01,0xff,0xe7, ++ 0x99,0x82,0x00,0x10,0x08,0x01,0xff,0xe8,0x93,0xbc,0x00,0x01,0xff,0xe9,0x81,0xbc, ++ 0x00,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0xbe,0x8d,0x00,0x01,0xff,0xe6,0x9a,0x88, ++ 0x00,0x10,0x08,0x01,0xff,0xe9,0x98,0xae,0x00,0x01,0xff,0xe5,0x8a,0x89,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0x9d,0xbb,0x00,0x01,0xff,0xe6,0x9f,0xb3, ++ 0x00,0x10,0x08,0x01,0xff,0xe6,0xb5,0x81,0x00,0x01,0xff,0xe6,0xba,0x9c,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe7,0x90,0x89,0x00,0x01,0xff,0xe7,0x95,0x99,0x00,0x10, ++ 0x08,0x01,0xff,0xe7,0xa1,0xab,0x00,0x01,0xff,0xe7,0xb4,0x90,0x00,0xd3,0x40,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe9,0xa1,0x9e,0x00,0x01,0xff,0xe5,0x85,0xad, ++ 0x00,0x10,0x08,0x01,0xff,0xe6,0x88,0xae,0x00,0x01,0xff,0xe9,0x99,0xb8,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe5,0x80,0xab,0x00,0x01,0xff,0xe5,0xb4,0x99,0x00,0x10, ++ 0x08,0x01,0xff,0xe6,0xb7,0xaa,0x00,0x01,0xff,0xe8,0xbc,0xaa,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe5,0xbe,0x8b,0x00,0x01,0xff,0xe6,0x85,0x84,0x00,0x10, ++ 0x08,0x01,0xff,0xe6,0xa0,0x97,0x00,0x01,0xff,0xe7,0x8e,0x87,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe9,0x9a,0x86,0x00,0x01,0xff,0xe5,0x88,0xa9,0x00,0x10,0x08,0x01, ++ 0xff,0xe5,0x90,0x8f,0x00,0x01,0xff,0xe5,0xb1,0xa5,0x00,0xd4,0x80,0xd3,0x40,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x01,0xff,0xe6,0x98,0x93,0x00,0x01,0xff,0xe6,0x9d,0x8e, ++ 0x00,0x10,0x08,0x01,0xff,0xe6,0xa2,0xa8,0x00,0x01,0xff,0xe6,0xb3,0xa5,0x00,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe7,0x90,0x86,0x00,0x01,0xff,0xe7,0x97,0xa2,0x00,0x10, ++ 0x08,0x01,0xff,0xe7,0xbd,0xb9,0x00,0x01,0xff,0xe8,0xa3,0x8f,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe8,0xa3,0xa1,0x00,0x01,0xff,0xe9,0x87,0x8c,0x00,0x10, ++ 0x08,0x01,0xff,0xe9,0x9b,0xa2,0x00,0x01,0xff,0xe5,0x8c,0xbf,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe6,0xba,0xba,0x00,0x01,0xff,0xe5,0x90,0x9d,0x00,0x10,0x08,0x01, ++ 0xff,0xe7,0x87,0x90,0x00,0x01,0xff,0xe7,0x92,0x98,0x00,0xd3,0x40,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x01,0xff,0xe8,0x97,0xba,0x00,0x01,0xff,0xe9,0x9a,0xa3,0x00,0x10, ++ 0x08,0x01,0xff,0xe9,0xb1,0x97,0x00,0x01,0xff,0xe9,0xba,0x9f,0x00,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe6,0x9e,0x97,0x00,0x01,0xff,0xe6,0xb7,0x8b,0x00,0x10,0x08,0x01, ++ 0xff,0xe8,0x87,0xa8,0x00,0x01,0xff,0xe7,0xab,0x8b,0x00,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x01,0xff,0xe7,0xac,0xa0,0x00,0x01,0xff,0xe7,0xb2,0x92,0x00,0x10,0x08,0x01, ++ 0xff,0xe7,0x8b,0x80,0x00,0x01,0xff,0xe7,0x82,0x99,0x00,0xd1,0x10,0x10,0x08,0x01, ++ 0xff,0xe8,0xad,0x98,0x00,0x01,0xff,0xe4,0xbb,0x80,0x00,0x10,0x08,0x01,0xff,0xe8, ++ 0x8c,0xb6,0x00,0x01,0xff,0xe5,0x88,0xba,0x00,0xe2,0xad,0x06,0xe1,0xc4,0x03,0xe0, ++ 0xcb,0x01,0xcf,0x86,0xd5,0xe4,0xd4,0x74,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x01,0xff,0xe5,0x88,0x87,0x00,0x01,0xff,0xe5,0xba,0xa6,0x00,0x10,0x08,0x01,0xff, ++ 0xe6,0x8b,0x93,0x00,0x01,0xff,0xe7,0xb3,0x96,0x00,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe5,0xae,0x85,0x00,0x01,0xff,0xe6,0xb4,0x9e,0x00,0x10,0x08,0x01,0xff,0xe6,0x9a, ++ 0xb4,0x00,0x01,0xff,0xe8,0xbc,0xbb,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x01,0xff, ++ 0xe8,0xa1,0x8c,0x00,0x01,0xff,0xe9,0x99,0x8d,0x00,0x10,0x08,0x01,0xff,0xe8,0xa6, ++ 0x8b,0x00,0x01,0xff,0xe5,0xbb,0x93,0x00,0x91,0x10,0x10,0x08,0x01,0xff,0xe5,0x85, ++ 0x80,0x00,0x01,0xff,0xe5,0x97,0x80,0x00,0x01,0x00,0xd3,0x34,0xd2,0x18,0xd1,0x0c, ++ 0x10,0x08,0x01,0xff,0xe5,0xa1,0x9a,0x00,0x01,0x00,0x10,0x08,0x01,0xff,0xe6,0x99, ++ 0xb4,0x00,0x01,0x00,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0xe5,0x87,0x9e,0x00, ++ 0x10,0x08,0x01,0xff,0xe7,0x8c,0xaa,0x00,0x01,0xff,0xe7,0x9b,0x8a,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x01,0xff,0xe7,0xa4,0xbc,0x00,0x01,0xff,0xe7,0xa5,0x9e,0x00, ++ 0x10,0x08,0x01,0xff,0xe7,0xa5,0xa5,0x00,0x01,0xff,0xe7,0xa6,0x8f,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe9,0x9d,0x96,0x00,0x01,0xff,0xe7,0xb2,0xbe,0x00,0x10,0x08, ++ 0x01,0xff,0xe7,0xbe,0xbd,0x00,0x01,0x00,0xd4,0x64,0xd3,0x30,0xd2,0x18,0xd1,0x0c, ++ 0x10,0x08,0x01,0xff,0xe8,0x98,0x92,0x00,0x01,0x00,0x10,0x08,0x01,0xff,0xe8,0xab, ++ 0xb8,0x00,0x01,0x00,0xd1,0x0c,0x10,0x04,0x01,0x00,0x01,0xff,0xe9,0x80,0xb8,0x00, ++ 0x10,0x08,0x01,0xff,0xe9,0x83,0xbd,0x00,0x01,0x00,0xd2,0x14,0x51,0x04,0x01,0x00, ++ 0x10,0x08,0x01,0xff,0xe9,0xa3,0xaf,0x00,0x01,0xff,0xe9,0xa3,0xbc,0x00,0xd1,0x10, ++ 0x10,0x08,0x01,0xff,0xe9,0xa4,0xa8,0x00,0x01,0xff,0xe9,0xb6,0xb4,0x00,0x10,0x08, ++ 0x0d,0xff,0xe9,0x83,0x9e,0x00,0x0d,0xff,0xe9,0x9a,0xb7,0x00,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x06,0xff,0xe4,0xbe,0xae,0x00,0x06,0xff,0xe5,0x83,0xa7,0x00, ++ 0x10,0x08,0x06,0xff,0xe5,0x85,0x8d,0x00,0x06,0xff,0xe5,0x8b,0x89,0x00,0xd1,0x10, ++ 0x10,0x08,0x06,0xff,0xe5,0x8b,0xa4,0x00,0x06,0xff,0xe5,0x8d,0x91,0x00,0x10,0x08, ++ 0x06,0xff,0xe5,0x96,0x9d,0x00,0x06,0xff,0xe5,0x98,0x86,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x06,0xff,0xe5,0x99,0xa8,0x00,0x06,0xff,0xe5,0xa1,0x80,0x00,0x10,0x08, ++ 0x06,0xff,0xe5,0xa2,0xa8,0x00,0x06,0xff,0xe5,0xb1,0xa4,0x00,0xd1,0x10,0x10,0x08, ++ 0x06,0xff,0xe5,0xb1,0xae,0x00,0x06,0xff,0xe6,0x82,0x94,0x00,0x10,0x08,0x06,0xff, ++ 0xe6,0x85,0xa8,0x00,0x06,0xff,0xe6,0x86,0x8e,0x00,0xcf,0x86,0xe5,0x01,0x01,0xd4, ++ 0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe6,0x87,0xb2,0x00,0x06, ++ 0xff,0xe6,0x95,0x8f,0x00,0x10,0x08,0x06,0xff,0xe6,0x97,0xa2,0x00,0x06,0xff,0xe6, ++ 0x9a,0x91,0x00,0xd1,0x10,0x10,0x08,0x06,0xff,0xe6,0xa2,0x85,0x00,0x06,0xff,0xe6, ++ 0xb5,0xb7,0x00,0x10,0x08,0x06,0xff,0xe6,0xb8,0x9a,0x00,0x06,0xff,0xe6,0xbc,0xa2, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe7,0x85,0xae,0x00,0x06,0xff,0xe7, ++ 0x88,0xab,0x00,0x10,0x08,0x06,0xff,0xe7,0x90,0xa2,0x00,0x06,0xff,0xe7,0xa2,0x91, ++ 0x00,0xd1,0x10,0x10,0x08,0x06,0xff,0xe7,0xa4,0xbe,0x00,0x06,0xff,0xe7,0xa5,0x89, ++ 0x00,0x10,0x08,0x06,0xff,0xe7,0xa5,0x88,0x00,0x06,0xff,0xe7,0xa5,0x90,0x00,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe7,0xa5,0x96,0x00,0x06,0xff,0xe7, ++ 0xa5,0x9d,0x00,0x10,0x08,0x06,0xff,0xe7,0xa6,0x8d,0x00,0x06,0xff,0xe7,0xa6,0x8e, ++ 0x00,0xd1,0x10,0x10,0x08,0x06,0xff,0xe7,0xa9,0x80,0x00,0x06,0xff,0xe7,0xaa,0x81, ++ 0x00,0x10,0x08,0x06,0xff,0xe7,0xaf,0x80,0x00,0x06,0xff,0xe7,0xb7,0xb4,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe7,0xb8,0x89,0x00,0x06,0xff,0xe7,0xb9,0x81, ++ 0x00,0x10,0x08,0x06,0xff,0xe7,0xbd,0xb2,0x00,0x06,0xff,0xe8,0x80,0x85,0x00,0xd1, ++ 0x10,0x10,0x08,0x06,0xff,0xe8,0x87,0xad,0x00,0x06,0xff,0xe8,0x89,0xb9,0x00,0x10, ++ 0x08,0x06,0xff,0xe8,0x89,0xb9,0x00,0x06,0xff,0xe8,0x91,0x97,0x00,0xd4,0x75,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe8,0xa4,0x90,0x00,0x06,0xff,0xe8, ++ 0xa6,0x96,0x00,0x10,0x08,0x06,0xff,0xe8,0xac,0x81,0x00,0x06,0xff,0xe8,0xac,0xb9, ++ 0x00,0xd1,0x10,0x10,0x08,0x06,0xff,0xe8,0xb3,0x93,0x00,0x06,0xff,0xe8,0xb4,0x88, ++ 0x00,0x10,0x08,0x06,0xff,0xe8,0xbe,0xb6,0x00,0x06,0xff,0xe9,0x80,0xb8,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x06,0xff,0xe9,0x9b,0xa3,0x00,0x06,0xff,0xe9,0x9f,0xbf, ++ 0x00,0x10,0x08,0x06,0xff,0xe9,0xa0,0xbb,0x00,0x0b,0xff,0xe6,0x81,0xb5,0x00,0x91, ++ 0x11,0x10,0x09,0x0b,0xff,0xf0,0xa4,0x8b,0xae,0x00,0x0b,0xff,0xe8,0x88,0x98,0x00, ++ 0x00,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff,0xe4,0xb8,0xa6,0x00, ++ 0x08,0xff,0xe5,0x86,0xb5,0x00,0x10,0x08,0x08,0xff,0xe5,0x85,0xa8,0x00,0x08,0xff, ++ 0xe4,0xbe,0x80,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe5,0x85,0x85,0x00,0x08,0xff, ++ 0xe5,0x86,0x80,0x00,0x10,0x08,0x08,0xff,0xe5,0x8b,0x87,0x00,0x08,0xff,0xe5,0x8b, ++ 0xba,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff,0xe5,0x96,0x9d,0x00,0x08,0xff, ++ 0xe5,0x95,0x95,0x00,0x10,0x08,0x08,0xff,0xe5,0x96,0x99,0x00,0x08,0xff,0xe5,0x97, ++ 0xa2,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe5,0xa1,0x9a,0x00,0x08,0xff,0xe5,0xa2, ++ 0xb3,0x00,0x10,0x08,0x08,0xff,0xe5,0xa5,0x84,0x00,0x08,0xff,0xe5,0xa5,0x94,0x00, ++ 0xe0,0x04,0x02,0xcf,0x86,0xe5,0x01,0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x08,0xff,0xe5,0xa9,0xa2,0x00,0x08,0xff,0xe5,0xac,0xa8,0x00,0x10,0x08, ++ 0x08,0xff,0xe5,0xbb,0x92,0x00,0x08,0xff,0xe5,0xbb,0x99,0x00,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe5,0xbd,0xa9,0x00,0x08,0xff,0xe5,0xbe,0xad,0x00,0x10,0x08,0x08,0xff, ++ 0xe6,0x83,0x98,0x00,0x08,0xff,0xe6,0x85,0x8e,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe6,0x84,0x88,0x00,0x08,0xff,0xe6,0x86,0x8e,0x00,0x10,0x08,0x08,0xff, ++ 0xe6,0x85,0xa0,0x00,0x08,0xff,0xe6,0x87,0xb2,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe6,0x88,0xb4,0x00,0x08,0xff,0xe6,0x8f,0x84,0x00,0x10,0x08,0x08,0xff,0xe6,0x90, ++ 0x9c,0x00,0x08,0xff,0xe6,0x91,0x92,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe6,0x95,0x96,0x00,0x08,0xff,0xe6,0x99,0xb4,0x00,0x10,0x08,0x08,0xff, ++ 0xe6,0x9c,0x97,0x00,0x08,0xff,0xe6,0x9c,0x9b,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe6,0x9d,0x96,0x00,0x08,0xff,0xe6,0xad,0xb9,0x00,0x10,0x08,0x08,0xff,0xe6,0xae, ++ 0xba,0x00,0x08,0xff,0xe6,0xb5,0x81,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe6,0xbb,0x9b,0x00,0x08,0xff,0xe6,0xbb,0x8b,0x00,0x10,0x08,0x08,0xff,0xe6,0xbc, ++ 0xa2,0x00,0x08,0xff,0xe7,0x80,0x9e,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe7,0x85, ++ 0xae,0x00,0x08,0xff,0xe7,0x9e,0xa7,0x00,0x10,0x08,0x08,0xff,0xe7,0x88,0xb5,0x00, ++ 0x08,0xff,0xe7,0x8a,0xaf,0x00,0xd4,0x80,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe7,0x8c,0xaa,0x00,0x08,0xff,0xe7,0x91,0xb1,0x00,0x10,0x08,0x08,0xff, ++ 0xe7,0x94,0x86,0x00,0x08,0xff,0xe7,0x94,0xbb,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe7,0x98,0x9d,0x00,0x08,0xff,0xe7,0x98,0x9f,0x00,0x10,0x08,0x08,0xff,0xe7,0x9b, ++ 0x8a,0x00,0x08,0xff,0xe7,0x9b,0x9b,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe7,0x9b,0xb4,0x00,0x08,0xff,0xe7,0x9d,0x8a,0x00,0x10,0x08,0x08,0xff,0xe7,0x9d, ++ 0x80,0x00,0x08,0xff,0xe7,0xa3,0x8c,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe7,0xaa, ++ 0xb1,0x00,0x08,0xff,0xe7,0xaf,0x80,0x00,0x10,0x08,0x08,0xff,0xe7,0xb1,0xbb,0x00, ++ 0x08,0xff,0xe7,0xb5,0x9b,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe7,0xb7,0xb4,0x00,0x08,0xff,0xe7,0xbc,0xbe,0x00,0x10,0x08,0x08,0xff,0xe8,0x80, ++ 0x85,0x00,0x08,0xff,0xe8,0x8d,0x92,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe8,0x8f, ++ 0xaf,0x00,0x08,0xff,0xe8,0x9d,0xb9,0x00,0x10,0x08,0x08,0xff,0xe8,0xa5,0x81,0x00, ++ 0x08,0xff,0xe8,0xa6,0x86,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x08,0xff,0xe8,0xa6, ++ 0x96,0x00,0x08,0xff,0xe8,0xaa,0xbf,0x00,0x10,0x08,0x08,0xff,0xe8,0xab,0xb8,0x00, ++ 0x08,0xff,0xe8,0xab,0x8b,0x00,0xd1,0x10,0x10,0x08,0x08,0xff,0xe8,0xac,0x81,0x00, ++ 0x08,0xff,0xe8,0xab,0xbe,0x00,0x10,0x08,0x08,0xff,0xe8,0xab,0xad,0x00,0x08,0xff, ++ 0xe8,0xac,0xb9,0x00,0xcf,0x86,0x95,0xde,0xd4,0x81,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x08,0xff,0xe8,0xae,0x8a,0x00,0x08,0xff,0xe8,0xb4,0x88,0x00,0x10,0x08, ++ 0x08,0xff,0xe8,0xbc,0xb8,0x00,0x08,0xff,0xe9,0x81,0xb2,0x00,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe9,0x86,0x99,0x00,0x08,0xff,0xe9,0x89,0xb6,0x00,0x10,0x08,0x08,0xff, ++ 0xe9,0x99,0xbc,0x00,0x08,0xff,0xe9,0x9b,0xa3,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x08,0xff,0xe9,0x9d,0x96,0x00,0x08,0xff,0xe9,0x9f,0x9b,0x00,0x10,0x08,0x08,0xff, ++ 0xe9,0x9f,0xbf,0x00,0x08,0xff,0xe9,0xa0,0x8b,0x00,0xd1,0x10,0x10,0x08,0x08,0xff, ++ 0xe9,0xa0,0xbb,0x00,0x08,0xff,0xe9,0xac,0x92,0x00,0x10,0x08,0x08,0xff,0xe9,0xbe, ++ 0x9c,0x00,0x08,0xff,0xf0,0xa2,0xa1,0x8a,0x00,0xd3,0x45,0xd2,0x22,0xd1,0x12,0x10, ++ 0x09,0x08,0xff,0xf0,0xa2,0xa1,0x84,0x00,0x08,0xff,0xf0,0xa3,0x8f,0x95,0x00,0x10, ++ 0x08,0x08,0xff,0xe3,0xae,0x9d,0x00,0x08,0xff,0xe4,0x80,0x98,0x00,0xd1,0x11,0x10, ++ 0x08,0x08,0xff,0xe4,0x80,0xb9,0x00,0x08,0xff,0xf0,0xa5,0x89,0x89,0x00,0x10,0x09, ++ 0x08,0xff,0xf0,0xa5,0xb3,0x90,0x00,0x08,0xff,0xf0,0xa7,0xbb,0x93,0x00,0x92,0x14, ++ 0x91,0x10,0x10,0x08,0x08,0xff,0xe9,0xbd,0x83,0x00,0x08,0xff,0xe9,0xbe,0x8e,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0xe1,0x94,0x01,0xe0,0x08,0x01,0xcf,0x86,0xd5,0x42, ++ 0xd4,0x14,0x93,0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00, ++ 0x00,0x00,0x00,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00, ++ 0x01,0x00,0x01,0x00,0x52,0x04,0x00,0x00,0xd1,0x0d,0x10,0x04,0x00,0x00,0x04,0xff, ++ 0xd7,0x99,0xd6,0xb4,0x00,0x10,0x04,0x01,0x1a,0x01,0xff,0xd7,0xb2,0xd6,0xb7,0x00, ++ 0xd4,0x42,0x53,0x04,0x01,0x00,0xd2,0x16,0x51,0x04,0x01,0x00,0x10,0x09,0x01,0xff, ++ 0xd7,0xa9,0xd7,0x81,0x00,0x01,0xff,0xd7,0xa9,0xd7,0x82,0x00,0xd1,0x16,0x10,0x0b, ++ 0x01,0xff,0xd7,0xa9,0xd6,0xbc,0xd7,0x81,0x00,0x01,0xff,0xd7,0xa9,0xd6,0xbc,0xd7, ++ 0x82,0x00,0x10,0x09,0x01,0xff,0xd7,0x90,0xd6,0xb7,0x00,0x01,0xff,0xd7,0x90,0xd6, ++ 0xb8,0x00,0xd3,0x43,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd7,0x90,0xd6,0xbc, ++ 0x00,0x01,0xff,0xd7,0x91,0xd6,0xbc,0x00,0x10,0x09,0x01,0xff,0xd7,0x92,0xd6,0xbc, ++ 0x00,0x01,0xff,0xd7,0x93,0xd6,0xbc,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd7,0x94, ++ 0xd6,0xbc,0x00,0x01,0xff,0xd7,0x95,0xd6,0xbc,0x00,0x10,0x09,0x01,0xff,0xd7,0x96, ++ 0xd6,0xbc,0x00,0x00,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd7,0x98,0xd6, ++ 0xbc,0x00,0x01,0xff,0xd7,0x99,0xd6,0xbc,0x00,0x10,0x09,0x01,0xff,0xd7,0x9a,0xd6, ++ 0xbc,0x00,0x01,0xff,0xd7,0x9b,0xd6,0xbc,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xd7, ++ 0x9c,0xd6,0xbc,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xd7,0x9e,0xd6,0xbc,0x00,0x00, ++ 0x00,0xcf,0x86,0x95,0x85,0x94,0x81,0xd3,0x3e,0xd2,0x1f,0xd1,0x12,0x10,0x09,0x01, ++ 0xff,0xd7,0xa0,0xd6,0xbc,0x00,0x01,0xff,0xd7,0xa1,0xd6,0xbc,0x00,0x10,0x04,0x00, ++ 0x00,0x01,0xff,0xd7,0xa3,0xd6,0xbc,0x00,0xd1,0x0d,0x10,0x09,0x01,0xff,0xd7,0xa4, ++ 0xd6,0xbc,0x00,0x00,0x00,0x10,0x09,0x01,0xff,0xd7,0xa6,0xd6,0xbc,0x00,0x01,0xff, ++ 0xd7,0xa7,0xd6,0xbc,0x00,0xd2,0x24,0xd1,0x12,0x10,0x09,0x01,0xff,0xd7,0xa8,0xd6, ++ 0xbc,0x00,0x01,0xff,0xd7,0xa9,0xd6,0xbc,0x00,0x10,0x09,0x01,0xff,0xd7,0xaa,0xd6, ++ 0xbc,0x00,0x01,0xff,0xd7,0x95,0xd6,0xb9,0x00,0xd1,0x12,0x10,0x09,0x01,0xff,0xd7, ++ 0x91,0xd6,0xbf,0x00,0x01,0xff,0xd7,0x9b,0xd6,0xbf,0x00,0x10,0x09,0x01,0xff,0xd7, ++ 0xa4,0xd6,0xbf,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd0,0x1a,0xcf,0x86,0x55,0x04, ++ 0x01,0x00,0x54,0x04,0x01,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x01,0x00,0x0c,0x00, ++ 0x0c,0x00,0x0c,0x00,0xcf,0x86,0x95,0x24,0xd4,0x10,0x93,0x0c,0x92,0x08,0x11,0x04, ++ 0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x00,0x00, ++ 0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0xd3,0x5a,0xd2,0x06, ++ 0xcf,0x06,0x01,0x00,0xd1,0x14,0xd0,0x06,0xcf,0x06,0x01,0x00,0xcf,0x86,0x95,0x08, ++ 0x14,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd0,0x1a,0xcf,0x86,0x95,0x14,0x54,0x04, ++ 0x01,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0xcf,0x86,0xd5,0x0c,0x94,0x08,0x13,0x04,0x01,0x00,0x00,0x00,0x05,0x00, ++ 0x54,0x04,0x05,0x00,0x53,0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x91,0x08,0x10,0x04, ++ 0x06,0x00,0x07,0x00,0x00,0x00,0xd2,0xce,0xd1,0xa5,0xd0,0x37,0xcf,0x86,0xd5,0x15, ++ 0x54,0x05,0x06,0xff,0x00,0x53,0x04,0x08,0x00,0x92,0x08,0x11,0x04,0x08,0x00,0x00, ++ 0x00,0x00,0x00,0x94,0x1c,0xd3,0x10,0x52,0x04,0x01,0xe6,0x51,0x04,0x0a,0xe6,0x10, ++ 0x04,0x0a,0xe6,0x10,0xdc,0x52,0x04,0x10,0xdc,0x11,0x04,0x10,0xdc,0x11,0xe6,0x01, ++ 0x00,0xcf,0x86,0xd5,0x38,0xd4,0x24,0xd3,0x14,0x52,0x04,0x01,0x00,0xd1,0x08,0x10, ++ 0x04,0x01,0x00,0x06,0x00,0x10,0x04,0x06,0x00,0x07,0x00,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x07,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x93,0x10,0x92,0x0c,0x51,0x04,0x01, ++ 0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd4,0x18,0xd3,0x10,0x52, ++ 0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x12,0x04,0x01, ++ 0x00,0x00,0x00,0x93,0x18,0xd2,0x0c,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x06, ++ 0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x01,0x00,0x01,0x00,0xd0,0x06,0xcf, ++ 0x06,0x01,0x00,0xcf,0x86,0x55,0x04,0x01,0x00,0x54,0x04,0x01,0x00,0x53,0x04,0x01, ++ 0x00,0x52,0x04,0x01,0x00,0xd1,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x10,0x04,0x00, ++ 0x00,0x01,0xff,0x00,0xd1,0x50,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x94,0x14,0x93,0x10, ++ 0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0x01,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04,0x01,0x00,0x53,0x04,0x01,0x00, ++ 0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x06,0x00,0x94,0x14, ++ 0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x06,0x00,0x01,0x00,0x01,0x00,0x01,0x00, ++ 0x01,0x00,0x01,0x00,0xd0,0x2f,0xcf,0x86,0x55,0x04,0x01,0x00,0xd4,0x15,0x93,0x11, ++ 0x92,0x0d,0x91,0x09,0x10,0x05,0x01,0xff,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01, ++ 0x00,0x53,0x04,0x01,0x00,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01, ++ 0x00,0x00,0x00,0xcf,0x86,0xd5,0x38,0xd4,0x18,0xd3,0x0c,0x92,0x08,0x11,0x04,0x00, ++ 0x00,0x01,0x00,0x01,0x00,0x92,0x08,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd3, ++ 0x0c,0x92,0x08,0x11,0x04,0x00,0x00,0x01,0x00,0x01,0x00,0xd2,0x08,0x11,0x04,0x00, ++ 0x00,0x01,0x00,0x91,0x08,0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0xd4,0x20,0xd3, ++ 0x10,0x52,0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x52, ++ 0x04,0x01,0x00,0x51,0x04,0x01,0x00,0x10,0x04,0x01,0x00,0x00,0x00,0x53,0x05,0x00, ++ 0xff,0x00,0xd2,0x0d,0x91,0x09,0x10,0x05,0x00,0xff,0x00,0x04,0x00,0x04,0x00,0x91, ++ 0x08,0x10,0x04,0x03,0x00,0x01,0x00,0x01,0x00,0x83,0xe2,0x46,0x3e,0xe1,0x1f,0x3b, ++ 0xe0,0x9c,0x39,0xcf,0x86,0xe5,0x40,0x26,0xc4,0xe3,0x16,0x14,0xe2,0xef,0x11,0xe1, ++ 0xd0,0x10,0xe0,0x60,0x07,0xcf,0x86,0xe5,0x53,0x03,0xe4,0x4c,0x02,0xe3,0x3d,0x01, ++ 0xd2,0x94,0xd1,0x70,0xd0,0x4a,0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x07,0x00, ++ 0x52,0x04,0x07,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x07,0x00,0x07,0x00,0x07,0x00, ++ 0xd4,0x14,0x93,0x10,0x52,0x04,0x07,0x00,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00, ++ 0x00,0x00,0x07,0x00,0x53,0x04,0x07,0x00,0xd2,0x0c,0x51,0x04,0x07,0x00,0x10,0x04, ++ 0x07,0x00,0x00,0x00,0x51,0x04,0x07,0x00,0x10,0x04,0x00,0x00,0x07,0x00,0xcf,0x86, ++ 0x95,0x20,0xd4,0x10,0x53,0x04,0x07,0x00,0x52,0x04,0x07,0x00,0x11,0x04,0x07,0x00, ++ 0x00,0x00,0x53,0x04,0x07,0x00,0x52,0x04,0x07,0x00,0x11,0x04,0x07,0x00,0x00,0x00, ++ 0x00,0x00,0xd0,0x06,0xcf,0x06,0x07,0x00,0xcf,0x86,0x55,0x04,0x07,0x00,0x54,0x04, ++ 0x07,0x00,0x53,0x04,0x07,0x00,0x92,0x0c,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00, ++ 0x00,0x00,0x00,0x00,0xd1,0x40,0xd0,0x3a,0xcf,0x86,0xd5,0x20,0x94,0x1c,0x93,0x18, ++ 0xd2,0x0c,0x51,0x04,0x07,0x00,0x10,0x04,0x07,0x00,0x00,0x00,0x51,0x04,0x00,0x00, ++ 0x10,0x04,0x00,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x54,0x04,0x07,0x00,0x93,0x10, ++ 0x52,0x04,0x07,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x07,0x00,0x07,0x00, ++ 0xcf,0x06,0x08,0x00,0xd0,0x46,0xcf,0x86,0xd5,0x2c,0xd4,0x20,0x53,0x04,0x08,0x00, ++ 0xd2,0x0c,0x51,0x04,0x08,0x00,0x10,0x04,0x08,0x00,0x10,0x00,0xd1,0x08,0x10,0x04, ++ 0x10,0x00,0x12,0x00,0x10,0x04,0x12,0x00,0x00,0x00,0x53,0x04,0x0a,0x00,0x12,0x04, ++ 0x0a,0x00,0x00,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x10,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x08,0x14,0x04, ++ 0x00,0x00,0x0a,0x00,0x54,0x04,0x0a,0x00,0x53,0x04,0x0a,0x00,0x52,0x04,0x0a,0x00, ++ 0x91,0x08,0x10,0x04,0x0a,0x00,0x0a,0xdc,0x00,0x00,0xd2,0x5e,0xd1,0x06,0xcf,0x06, ++ 0x00,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x0a,0x00,0x53,0x04,0x0a,0x00, ++ 0x52,0x04,0x0a,0x00,0x91,0x08,0x10,0x04,0x0a,0x00,0x00,0x00,0x00,0x00,0x0a,0x00, ++ 0xcf,0x86,0xd5,0x18,0x54,0x04,0x0a,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x0a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd4,0x14,0x93,0x10,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x10,0xdc,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x53,0x04, ++ 0x10,0x00,0x12,0x04,0x10,0x00,0x00,0x00,0xd1,0x70,0xd0,0x36,0xcf,0x86,0xd5,0x18, ++ 0x54,0x04,0x05,0x00,0x53,0x04,0x05,0x00,0x52,0x04,0x05,0x00,0x51,0x04,0x05,0x00, ++ 0x10,0x04,0x05,0x00,0x10,0x00,0x94,0x18,0xd3,0x08,0x12,0x04,0x05,0x00,0x00,0x00, ++ 0x52,0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x13,0x00,0x13,0x00,0x05,0x00, ++ 0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x05,0x00,0x92,0x0c,0x51,0x04,0x05,0x00, ++ 0x10,0x04,0x05,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x54,0x04,0x10,0x00,0xd3,0x0c, ++ 0x52,0x04,0x10,0x00,0x11,0x04,0x10,0x00,0x10,0xe6,0x92,0x0c,0x51,0x04,0x10,0xe6, ++ 0x10,0x04,0x10,0xe6,0x00,0x00,0x00,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04, ++ 0x07,0x00,0x53,0x04,0x07,0x00,0x52,0x04,0x07,0x00,0x51,0x04,0x07,0x00,0x10,0x04, ++ 0x00,0x00,0x07,0x00,0x08,0x00,0xcf,0x86,0x95,0x1c,0xd4,0x0c,0x93,0x08,0x12,0x04, ++ 0x08,0x00,0x00,0x00,0x08,0x00,0x93,0x0c,0x52,0x04,0x08,0x00,0x11,0x04,0x08,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0xd3,0xba,0xd2,0x80,0xd1,0x34,0xd0,0x1a,0xcf,0x86, ++ 0x55,0x04,0x05,0x00,0x94,0x10,0x93,0x0c,0x52,0x04,0x05,0x00,0x11,0x04,0x05,0x00, ++ 0x07,0x00,0x05,0x00,0x05,0x00,0xcf,0x86,0x95,0x14,0x94,0x10,0x53,0x04,0x05,0x00, ++ 0x52,0x04,0x05,0x00,0x11,0x04,0x05,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0xd0,0x2a, ++ 0xcf,0x86,0xd5,0x14,0x54,0x04,0x07,0x00,0x53,0x04,0x07,0x00,0x52,0x04,0x07,0x00, ++ 0x11,0x04,0x07,0x00,0x00,0x00,0x94,0x10,0x53,0x04,0x07,0x00,0x92,0x08,0x11,0x04, ++ 0x07,0x00,0x00,0x00,0x00,0x00,0x12,0x00,0xcf,0x86,0xd5,0x10,0x54,0x04,0x12,0x00, ++ 0x93,0x08,0x12,0x04,0x12,0x00,0x00,0x00,0x12,0x00,0x54,0x04,0x12,0x00,0x53,0x04, ++ 0x12,0x00,0x12,0x04,0x12,0x00,0x00,0x00,0xd1,0x34,0xd0,0x12,0xcf,0x86,0x55,0x04, ++ 0x10,0x00,0x94,0x08,0x13,0x04,0x10,0x00,0x00,0x00,0x10,0x00,0xcf,0x86,0x55,0x04, ++ 0x10,0x00,0x94,0x18,0xd3,0x08,0x12,0x04,0x10,0x00,0x00,0x00,0x52,0x04,0x00,0x00, ++ 0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x00,0x00,0xcf,0x06,0x00,0x00, ++ 0xd2,0x06,0xcf,0x06,0x10,0x00,0xd1,0x40,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x10,0x00, ++ 0x54,0x04,0x10,0x00,0x93,0x10,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04, ++ 0x10,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x14,0x54,0x04,0x10,0x00,0x93,0x0c, ++ 0x52,0x04,0x10,0x00,0x11,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x94,0x08,0x13,0x04, ++ 0x10,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xe4,0xce,0x02,0xe3,0x45,0x01, ++ 0xd2,0xd0,0xd1,0x70,0xd0,0x52,0xcf,0x86,0xd5,0x20,0x94,0x1c,0xd3,0x0c,0x52,0x04, ++ 0x07,0x00,0x11,0x04,0x07,0x00,0x00,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x07,0x00, ++ 0x00,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x54,0x04,0x07,0x00,0xd3,0x10,0x52,0x04, ++ 0x07,0x00,0x51,0x04,0x07,0x00,0x10,0x04,0x00,0x00,0x07,0x00,0xd2,0x0c,0x91,0x08, ++ 0x10,0x04,0x07,0x00,0x00,0x00,0x00,0x00,0xd1,0x08,0x10,0x04,0x07,0x00,0x00,0x00, ++ 0x10,0x04,0x00,0x00,0x07,0x00,0xcf,0x86,0x95,0x18,0x54,0x04,0x0b,0x00,0x93,0x10, ++ 0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x00,0x00,0x0b,0x00,0x0b,0x00, ++ 0x10,0x00,0xd0,0x32,0xcf,0x86,0xd5,0x18,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00, ++ 0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x94,0x14, ++ 0x93,0x10,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00, ++ 0x10,0x00,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x11,0x00,0xd3,0x14, ++ 0xd2,0x0c,0x51,0x04,0x11,0x00,0x10,0x04,0x11,0x00,0x00,0x00,0x11,0x04,0x11,0x00, ++ 0x00,0x00,0x92,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x11,0x00,0x11,0x00, ++ 0xd1,0x40,0xd0,0x3a,0xcf,0x86,0xd5,0x1c,0x54,0x04,0x09,0x00,0x53,0x04,0x09,0x00, ++ 0xd2,0x08,0x11,0x04,0x09,0x00,0x0b,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00, ++ 0x09,0x00,0x54,0x04,0x0a,0x00,0x53,0x04,0x0a,0x00,0xd2,0x08,0x11,0x04,0x0a,0x00, ++ 0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0a,0x00,0xcf,0x06,0x00,0x00, ++ 0xd0,0x1a,0xcf,0x86,0x55,0x04,0x0d,0x00,0x54,0x04,0x0d,0x00,0x53,0x04,0x0d,0x00, ++ 0x52,0x04,0x00,0x00,0x11,0x04,0x11,0x00,0x0d,0x00,0xcf,0x86,0x95,0x14,0x54,0x04, ++ 0x11,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x00,0x00,0x11,0x00,0x11,0x00,0x11,0x00, ++ 0x11,0x00,0xd2,0xec,0xd1,0xa4,0xd0,0x76,0xcf,0x86,0xd5,0x48,0xd4,0x28,0xd3,0x14, ++ 0x52,0x04,0x08,0x00,0xd1,0x08,0x10,0x04,0x00,0x00,0x08,0x00,0x10,0x04,0x08,0x00, ++ 0x00,0x00,0x52,0x04,0x00,0x00,0xd1,0x08,0x10,0x04,0x08,0x00,0x08,0xdc,0x10,0x04, ++ 0x08,0x00,0x08,0xe6,0xd3,0x10,0x52,0x04,0x08,0x00,0x91,0x08,0x10,0x04,0x00,0x00, ++ 0x08,0x00,0x08,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x08,0x00,0x08,0x00, ++ 0x08,0x00,0x54,0x04,0x08,0x00,0xd3,0x0c,0x52,0x04,0x08,0x00,0x11,0x04,0x14,0x00, ++ 0x00,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x08,0xe6,0x08,0x01,0x10,0x04,0x08,0xdc, ++ 0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x08,0x09,0xcf,0x86,0x95,0x28, ++ 0xd4,0x14,0x53,0x04,0x08,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x53,0x04,0x08,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x08,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x0b,0x00,0xd0,0x0a,0xcf,0x86,0x15,0x04,0x10,0x00, ++ 0x00,0x00,0xcf,0x86,0x55,0x04,0x10,0x00,0xd4,0x24,0xd3,0x14,0x52,0x04,0x10,0x00, ++ 0xd1,0x08,0x10,0x04,0x10,0x00,0x10,0xe6,0x10,0x04,0x10,0xdc,0x00,0x00,0x92,0x0c, ++ 0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x93,0x10,0x52,0x04, ++ 0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd1,0x54, ++ 0xd0,0x26,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04,0x0b,0x00,0xd3,0x0c,0x52,0x04, ++ 0x0b,0x00,0x11,0x04,0x0b,0x00,0x00,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00, ++ 0x0b,0x00,0x0b,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x14,0x54,0x04,0x0b,0x00,0x93,0x0c, ++ 0x52,0x04,0x0b,0x00,0x11,0x04,0x0b,0x00,0x00,0x00,0x0b,0x00,0x54,0x04,0x0b,0x00, ++ 0x93,0x10,0x92,0x0c,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00,0x00,0x00,0x00,0x00, ++ 0x0b,0x00,0xd0,0x42,0xcf,0x86,0xd5,0x28,0x54,0x04,0x10,0x00,0xd3,0x0c,0x92,0x08, ++ 0x11,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00, ++ 0x10,0x00,0x10,0x00,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x94,0x14, ++ 0x53,0x04,0x00,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00, ++ 0x10,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd3,0x96,0xd2,0x68,0xd1,0x24,0xd0,0x06, ++ 0xcf,0x06,0x0b,0x00,0xcf,0x86,0x95,0x18,0x94,0x14,0x53,0x04,0x0b,0x00,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xd0,0x1e,0xcf,0x86,0x55,0x04,0x11,0x00,0x54,0x04,0x11,0x00,0x93,0x10,0x92,0x0c, ++ 0x51,0x04,0x11,0x00,0x10,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86, ++ 0x55,0x04,0x11,0x00,0x54,0x04,0x11,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x11,0x00, ++ 0x10,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0x92,0x08,0x11,0x04,0x00,0x00,0x11,0x00, ++ 0x11,0x00,0xd1,0x28,0xd0,0x22,0xcf,0x86,0x55,0x04,0x14,0x00,0xd4,0x0c,0x93,0x08, ++ 0x12,0x04,0x14,0x00,0x14,0xe6,0x00,0x00,0x53,0x04,0x14,0x00,0x92,0x08,0x11,0x04, ++ 0x14,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xd2,0x2a, ++ 0xd1,0x24,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04, ++ 0x0b,0x00,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04, ++ 0x0b,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd1,0x58,0xd0,0x12,0xcf,0x86,0x55,0x04, ++ 0x14,0x00,0x94,0x08,0x13,0x04,0x14,0x00,0x00,0x00,0x14,0x00,0xcf,0x86,0x95,0x40, ++ 0xd4,0x24,0xd3,0x0c,0x52,0x04,0x14,0x00,0x11,0x04,0x14,0x00,0x14,0xdc,0xd2,0x0c, ++ 0x51,0x04,0x14,0xe6,0x10,0x04,0x14,0xe6,0x14,0xdc,0x91,0x08,0x10,0x04,0x14,0xe6, ++ 0x14,0xdc,0x14,0xdc,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0xdc,0x14,0x00, ++ 0x14,0x00,0x14,0x00,0x92,0x08,0x11,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x15,0x00, ++ 0x93,0x10,0x52,0x04,0x15,0x00,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00,0x00, ++ 0x00,0x00,0xcf,0x86,0xe5,0x0f,0x06,0xe4,0xf8,0x03,0xe3,0x02,0x02,0xd2,0xfb,0xd1, ++ 0x4c,0xd0,0x06,0xcf,0x06,0x0c,0x00,0xcf,0x86,0xd5,0x2c,0xd4,0x1c,0xd3,0x10,0x52, ++ 0x04,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x09,0x0c,0x00,0x52,0x04,0x0c, ++ 0x00,0x11,0x04,0x0c,0x00,0x00,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x00,0x00,0x0c, ++ 0x00,0x0c,0x00,0x0c,0x00,0x54,0x04,0x0c,0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00, ++ 0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x09,0xd0,0x69,0xcf,0x86,0xd5, ++ 0x32,0x54,0x04,0x0b,0x00,0x53,0x04,0x0b,0x00,0xd2,0x15,0x51,0x04,0x0b,0x00,0x10, ++ 0x0d,0x0b,0xff,0xf0,0x91,0x82,0x99,0xf0,0x91,0x82,0xba,0x00,0x0b,0x00,0x91,0x11, ++ 0x10,0x0d,0x0b,0xff,0xf0,0x91,0x82,0x9b,0xf0,0x91,0x82,0xba,0x00,0x0b,0x00,0x0b, ++ 0x00,0xd4,0x1d,0x53,0x04,0x0b,0x00,0x92,0x15,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b, ++ 0x00,0x0b,0xff,0xf0,0x91,0x82,0xa5,0xf0,0x91,0x82,0xba,0x00,0x0b,0x00,0x53,0x04, ++ 0x0b,0x00,0x92,0x10,0xd1,0x08,0x10,0x04,0x0b,0x00,0x0b,0x09,0x10,0x04,0x0b,0x07, ++ 0x0b,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x20,0x94,0x1c,0xd3,0x0c,0x92,0x08,0x11,0x04, ++ 0x0b,0x00,0x00,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00, ++ 0x14,0x00,0x00,0x00,0x0d,0x00,0xd4,0x14,0x53,0x04,0x0d,0x00,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x0d,0x00,0x92,0x08, ++ 0x11,0x04,0x0d,0x00,0x00,0x00,0x00,0x00,0xd1,0x96,0xd0,0x5c,0xcf,0x86,0xd5,0x18, ++ 0x94,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x0d,0xe6,0x10,0x04,0x0d,0xe6,0x0d,0x00, ++ 0x0d,0x00,0x0d,0x00,0x0d,0x00,0xd4,0x26,0x53,0x04,0x0d,0x00,0x52,0x04,0x0d,0x00, ++ 0x51,0x04,0x0d,0x00,0x10,0x0d,0x0d,0xff,0xf0,0x91,0x84,0xb1,0xf0,0x91,0x84,0xa7, ++ 0x00,0x0d,0xff,0xf0,0x91,0x84,0xb2,0xf0,0x91,0x84,0xa7,0x00,0x93,0x18,0xd2,0x0c, ++ 0x51,0x04,0x0d,0x00,0x10,0x04,0x0d,0x00,0x0d,0x09,0x91,0x08,0x10,0x04,0x0d,0x09, ++ 0x00,0x00,0x0d,0x00,0x0d,0x00,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x52,0x04, ++ 0x0d,0x00,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x10,0x00, ++ 0x54,0x04,0x10,0x00,0x93,0x18,0xd2,0x0c,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00, ++ 0x10,0x07,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd0,0x06, ++ 0xcf,0x06,0x0d,0x00,0xcf,0x86,0xd5,0x40,0xd4,0x2c,0xd3,0x10,0x92,0x0c,0x91,0x08, ++ 0x10,0x04,0x0d,0x09,0x0d,0x00,0x0d,0x00,0x0d,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04, ++ 0x0d,0x00,0x11,0x00,0x10,0x04,0x11,0x07,0x11,0x00,0x91,0x08,0x10,0x04,0x11,0x00, ++ 0x10,0x00,0x00,0x00,0x53,0x04,0x0d,0x00,0x92,0x0c,0x51,0x04,0x0d,0x00,0x10,0x04, ++ 0x10,0x00,0x11,0x00,0x11,0x00,0xd4,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x93,0x10,0x52,0x04,0x10,0x00, ++ 0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd2,0xc8,0xd1,0x48, ++ 0xd0,0x42,0xcf,0x86,0xd5,0x18,0x54,0x04,0x10,0x00,0x93,0x10,0x92,0x0c,0x51,0x04, ++ 0x10,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x54,0x04,0x10,0x00, ++ 0xd3,0x14,0x52,0x04,0x10,0x00,0xd1,0x08,0x10,0x04,0x10,0x00,0x10,0x09,0x10,0x04, ++ 0x10,0x07,0x10,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x12,0x00, ++ 0x00,0x00,0xcf,0x06,0x00,0x00,0xd0,0x52,0xcf,0x86,0xd5,0x3c,0xd4,0x28,0xd3,0x10, ++ 0x52,0x04,0x11,0x00,0x51,0x04,0x11,0x00,0x10,0x04,0x11,0x00,0x00,0x00,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x11,0x00,0x00,0x00,0x11,0x00,0x51,0x04,0x11,0x00,0x10,0x04, ++ 0x00,0x00,0x11,0x00,0x53,0x04,0x11,0x00,0x52,0x04,0x11,0x00,0x51,0x04,0x11,0x00, ++ 0x10,0x04,0x00,0x00,0x11,0x00,0x94,0x10,0x53,0x04,0x11,0x00,0x92,0x08,0x11,0x04, ++ 0x11,0x00,0x00,0x00,0x00,0x00,0x10,0x00,0xcf,0x86,0x55,0x04,0x10,0x00,0xd4,0x18, ++ 0x53,0x04,0x10,0x00,0x92,0x10,0xd1,0x08,0x10,0x04,0x10,0x00,0x10,0x07,0x10,0x04, ++ 0x10,0x09,0x00,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x92,0x08,0x11,0x04,0x10,0x00, ++ 0x00,0x00,0x00,0x00,0xe1,0x27,0x01,0xd0,0x8a,0xcf,0x86,0xd5,0x44,0xd4,0x2c,0xd3, ++ 0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x11,0x00,0x10,0x00,0x10,0x00,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x52,0x04,0x10,0x00,0xd1,0x08,0x10,0x04,0x10, ++ 0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x93,0x14,0x92,0x10,0xd1,0x08,0x10, ++ 0x04,0x10,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0xd4, ++ 0x14,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x10, ++ 0x00,0x10,0x00,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x10, ++ 0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0xd2,0x0c,0x51,0x04,0x10, ++ 0x00,0x10,0x04,0x00,0x00,0x14,0x07,0x91,0x08,0x10,0x04,0x10,0x07,0x10,0x00,0x10, ++ 0x00,0xcf,0x86,0xd5,0x6a,0xd4,0x42,0xd3,0x14,0x52,0x04,0x10,0x00,0xd1,0x08,0x10, ++ 0x04,0x10,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0xd2,0x19,0xd1,0x08,0x10, ++ 0x04,0x10,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0xff,0xf0,0x91,0x8d,0x87,0xf0, ++ 0x91,0x8c,0xbe,0x00,0x91,0x11,0x10,0x0d,0x10,0xff,0xf0,0x91,0x8d,0x87,0xf0,0x91, ++ 0x8d,0x97,0x00,0x10,0x09,0x00,0x00,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x11, ++ 0x00,0x00,0x00,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x52, ++ 0x04,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0xd4,0x1c,0xd3, ++ 0x0c,0x52,0x04,0x10,0x00,0x11,0x04,0x00,0x00,0x10,0xe6,0x52,0x04,0x10,0xe6,0x91, ++ 0x08,0x10,0x04,0x10,0xe6,0x00,0x00,0x00,0x00,0x93,0x10,0x52,0x04,0x10,0xe6,0x91, ++ 0x08,0x10,0x04,0x10,0xe6,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xe3, ++ 0x30,0x01,0xd2,0xb7,0xd1,0x48,0xd0,0x06,0xcf,0x06,0x12,0x00,0xcf,0x86,0x95,0x3c, ++ 0xd4,0x1c,0x93,0x18,0xd2,0x0c,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x09,0x12,0x00, ++ 0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x07,0x12,0x00,0x12,0x00,0x53,0x04,0x12,0x00, ++ 0xd2,0x0c,0x51,0x04,0x12,0x00,0x10,0x04,0x00,0x00,0x12,0x00,0xd1,0x08,0x10,0x04, ++ 0x00,0x00,0x12,0x00,0x10,0x04,0x14,0xe6,0x15,0x00,0x00,0x00,0xd0,0x45,0xcf,0x86, ++ 0x55,0x04,0x10,0x00,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00,0xd2,0x15,0x51,0x04, ++ 0x10,0x00,0x10,0x04,0x10,0x00,0x10,0xff,0xf0,0x91,0x92,0xb9,0xf0,0x91,0x92,0xba, ++ 0x00,0xd1,0x11,0x10,0x0d,0x10,0xff,0xf0,0x91,0x92,0xb9,0xf0,0x91,0x92,0xb0,0x00, ++ 0x10,0x00,0x10,0x0d,0x10,0xff,0xf0,0x91,0x92,0xb9,0xf0,0x91,0x92,0xbd,0x00,0x10, ++ 0x00,0xcf,0x86,0x95,0x24,0xd4,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x10,0x00,0x10, ++ 0x04,0x10,0x09,0x10,0x07,0x10,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x92,0x08,0x11, ++ 0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0, ++ 0x40,0xcf,0x86,0x55,0x04,0x10,0x00,0x54,0x04,0x10,0x00,0xd3,0x0c,0x52,0x04,0x10, ++ 0x00,0x11,0x04,0x10,0x00,0x00,0x00,0xd2,0x1e,0x51,0x04,0x10,0x00,0x10,0x0d,0x10, ++ 0xff,0xf0,0x91,0x96,0xb8,0xf0,0x91,0x96,0xaf,0x00,0x10,0xff,0xf0,0x91,0x96,0xb9, ++ 0xf0,0x91,0x96,0xaf,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x10,0x09,0xcf, ++ 0x86,0x95,0x2c,0xd4,0x1c,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x10,0x07,0x10, ++ 0x00,0x10,0x00,0x10,0x00,0x92,0x08,0x11,0x04,0x10,0x00,0x11,0x00,0x11,0x00,0x53, ++ 0x04,0x11,0x00,0x52,0x04,0x11,0x00,0x11,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0xd2, ++ 0xa0,0xd1,0x5c,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x10,0x00,0x54,0x04,0x10,0x00,0x53, ++ 0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x10, ++ 0x09,0xcf,0x86,0xd5,0x24,0xd4,0x14,0x93,0x10,0x52,0x04,0x10,0x00,0x91,0x08,0x10, ++ 0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x92,0x08,0x11, ++ 0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x94,0x14,0x53,0x04,0x12,0x00,0x52,0x04,0x12, ++ 0x00,0x91,0x08,0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd0,0x2a,0xcf, ++ 0x86,0x55,0x04,0x0d,0x00,0x54,0x04,0x0d,0x00,0xd3,0x10,0x52,0x04,0x0d,0x00,0x51, ++ 0x04,0x0d,0x00,0x10,0x04,0x0d,0x09,0x0d,0x07,0x92,0x0c,0x91,0x08,0x10,0x04,0x15, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0x95,0x14,0x94,0x10,0x53,0x04,0x0d, ++ 0x00,0x92,0x08,0x11,0x04,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd1, ++ 0x40,0xd0,0x3a,0xcf,0x86,0xd5,0x20,0x54,0x04,0x11,0x00,0x53,0x04,0x11,0x00,0xd2, ++ 0x0c,0x51,0x04,0x11,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x00, ++ 0x00,0x11,0x00,0x11,0x00,0x94,0x14,0x53,0x04,0x11,0x00,0x92,0x0c,0x51,0x04,0x11, ++ 0x00,0x10,0x04,0x11,0x00,0x11,0x09,0x00,0x00,0x11,0x00,0xcf,0x06,0x00,0x00,0xcf, ++ 0x06,0x00,0x00,0xe4,0x59,0x01,0xd3,0xb2,0xd2,0x5c,0xd1,0x28,0xd0,0x22,0xcf,0x86, ++ 0x55,0x04,0x14,0x00,0x54,0x04,0x14,0x00,0x53,0x04,0x14,0x00,0x92,0x10,0xd1,0x08, ++ 0x10,0x04,0x14,0x00,0x14,0x09,0x10,0x04,0x14,0x07,0x14,0x00,0x00,0x00,0xcf,0x06, ++ 0x00,0x00,0xd0,0x0a,0xcf,0x86,0x15,0x04,0x00,0x00,0x10,0x00,0xcf,0x86,0x55,0x04, ++ 0x10,0x00,0x54,0x04,0x10,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x10,0x00,0x10,0x04, ++ 0x10,0x00,0x00,0x00,0x00,0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04, ++ 0x00,0x00,0x10,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x1a,0xcf,0x86,0x55,0x04, ++ 0x00,0x00,0x94,0x10,0x53,0x04,0x15,0x00,0x92,0x08,0x11,0x04,0x00,0x00,0x15,0x00, ++ 0x15,0x00,0x15,0x00,0xcf,0x86,0xd5,0x14,0x54,0x04,0x15,0x00,0x53,0x04,0x15,0x00, ++ 0x92,0x08,0x11,0x04,0x00,0x00,0x15,0x00,0x15,0x00,0x94,0x1c,0x93,0x18,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x15,0x09,0x15,0x00,0x15,0x00,0x91,0x08,0x10,0x04,0x15,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd2,0xa0,0xd1,0x3c,0xd0,0x1e,0xcf,0x86, ++ 0x55,0x04,0x13,0x00,0x54,0x04,0x13,0x00,0x93,0x10,0x52,0x04,0x13,0x00,0x91,0x08, ++ 0x10,0x04,0x13,0x09,0x13,0x00,0x13,0x00,0x13,0x00,0xcf,0x86,0x95,0x18,0x94,0x14, ++ 0x93,0x10,0x52,0x04,0x13,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x13,0x09, ++ 0x00,0x00,0x13,0x00,0x13,0x00,0xd0,0x46,0xcf,0x86,0xd5,0x2c,0xd4,0x10,0x93,0x0c, ++ 0x52,0x04,0x13,0x00,0x11,0x04,0x15,0x00,0x13,0x00,0x13,0x00,0x53,0x04,0x13,0x00, ++ 0xd2,0x0c,0x91,0x08,0x10,0x04,0x13,0x00,0x13,0x09,0x13,0x00,0x91,0x08,0x10,0x04, ++ 0x13,0x00,0x14,0x00,0x13,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x13,0x00, ++ 0x10,0x04,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0x55,0x04, ++ 0x10,0x00,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xe3,0xa9,0x01,0xd2, ++ 0xb0,0xd1,0x6c,0xd0,0x3e,0xcf,0x86,0xd5,0x18,0x94,0x14,0x53,0x04,0x12,0x00,0x92, ++ 0x0c,0x91,0x08,0x10,0x04,0x12,0x00,0x00,0x00,0x12,0x00,0x12,0x00,0x12,0x00,0x54, ++ 0x04,0x12,0x00,0xd3,0x10,0x52,0x04,0x12,0x00,0x51,0x04,0x12,0x00,0x10,0x04,0x12, ++ 0x00,0x00,0x00,0x52,0x04,0x12,0x00,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x12, ++ 0x09,0xcf,0x86,0xd5,0x14,0x94,0x10,0x93,0x0c,0x52,0x04,0x12,0x00,0x11,0x04,0x12, ++ 0x00,0x00,0x00,0x00,0x00,0x12,0x00,0x94,0x14,0x53,0x04,0x12,0x00,0x52,0x04,0x12, ++ 0x00,0x91,0x08,0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00,0x12,0x00,0xd0,0x3e,0xcf, ++ 0x86,0xd5,0x14,0x54,0x04,0x12,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x00,0x00,0x12, ++ 0x00,0x12,0x00,0x12,0x00,0xd4,0x14,0x53,0x04,0x12,0x00,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x12,0x00,0x12,0x00,0x12,0x00,0x93,0x10,0x52,0x04,0x12,0x00,0x51, ++ 0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd1, ++ 0xa0,0xd0,0x52,0xcf,0x86,0xd5,0x24,0x94,0x20,0xd3,0x10,0x52,0x04,0x13,0x00,0x51, ++ 0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0x92,0x0c,0x51,0x04,0x13,0x00,0x10, ++ 0x04,0x00,0x00,0x13,0x00,0x13,0x00,0x13,0x00,0x54,0x04,0x13,0x00,0xd3,0x10,0x52, ++ 0x04,0x13,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0xd2,0x0c,0x51, ++ 0x04,0x00,0x00,0x10,0x04,0x13,0x00,0x00,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x00, ++ 0x00,0x13,0x00,0xcf,0x86,0xd5,0x28,0xd4,0x18,0x93,0x14,0xd2,0x0c,0x51,0x04,0x13, ++ 0x00,0x10,0x04,0x13,0x07,0x13,0x00,0x11,0x04,0x13,0x09,0x13,0x00,0x00,0x00,0x53, ++ 0x04,0x13,0x00,0x92,0x08,0x11,0x04,0x13,0x00,0x00,0x00,0x00,0x00,0x94,0x20,0xd3, ++ 0x10,0x52,0x04,0x14,0x00,0x51,0x04,0x14,0x00,0x10,0x04,0x00,0x00,0x14,0x00,0x92, ++ 0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00,0x14,0x00,0x14,0x00,0x14,0x00,0xd0, ++ 0x52,0xcf,0x86,0xd5,0x3c,0xd4,0x14,0x53,0x04,0x14,0x00,0x52,0x04,0x14,0x00,0x51, ++ 0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x14, ++ 0x00,0x10,0x04,0x00,0x00,0x14,0x00,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x14, ++ 0x09,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x94, ++ 0x10,0x53,0x04,0x14,0x00,0x92,0x08,0x11,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0xcf,0x06,0x00,0x00,0xd2,0x2a,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf, ++ 0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x14,0x00,0x53,0x04,0x14, ++ 0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd1, ++ 0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x15, ++ 0x00,0x54,0x04,0x15,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04,0x15,0x00,0x00,0x00,0x00, ++ 0x00,0x52,0x04,0x00,0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x15,0x00,0xd0, ++ 0xca,0xcf,0x86,0xd5,0xc2,0xd4,0x54,0xd3,0x06,0xcf,0x06,0x09,0x00,0xd2,0x06,0xcf, ++ 0x06,0x09,0x00,0xd1,0x24,0xd0,0x06,0xcf,0x06,0x09,0x00,0xcf,0x86,0x55,0x04,0x09, ++ 0x00,0x94,0x14,0x53,0x04,0x09,0x00,0x52,0x04,0x09,0x00,0x51,0x04,0x09,0x00,0x10, ++ 0x04,0x09,0x00,0x10,0x00,0x10,0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x10, ++ 0x00,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x10,0x00,0x11,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd3,0x68,0xd2,0x46,0xd1,0x40,0xd0, ++ 0x06,0xcf,0x06,0x09,0x00,0xcf,0x86,0x55,0x04,0x09,0x00,0xd4,0x20,0xd3,0x10,0x92, ++ 0x0c,0x51,0x04,0x09,0x00,0x10,0x04,0x09,0x00,0x10,0x00,0x10,0x00,0x52,0x04,0x10, ++ 0x00,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x93,0x10,0x52,0x04,0x09, ++ 0x00,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x11, ++ 0x00,0xd1,0x1c,0xd0,0x06,0xcf,0x06,0x11,0x00,0xcf,0x86,0x95,0x10,0x94,0x0c,0x93, ++ 0x08,0x12,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00, ++ 0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5,0x4c,0xd4,0x06,0xcf, ++ 0x06,0x0b,0x00,0xd3,0x40,0xd2,0x3a,0xd1,0x34,0xd0,0x2e,0xcf,0x86,0x55,0x04,0x0b, ++ 0x00,0xd4,0x14,0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10, ++ 0x04,0x0b,0x00,0x00,0x00,0x53,0x04,0x15,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x15, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf, ++ 0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xd1,0x4c,0xd0,0x44,0xcf, ++ 0x86,0xd5,0x3c,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x06,0xcf,0x06,0x11,0x00,0xd2, ++ 0x2a,0xd1,0x24,0xd0,0x06,0xcf,0x06,0x11,0x00,0xcf,0x86,0x95,0x18,0x94,0x14,0x93, ++ 0x10,0x52,0x04,0x11,0x00,0x51,0x04,0x11,0x00,0x10,0x04,0x11,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00, ++ 0x00,0xcf,0x86,0xcf,0x06,0x00,0x00,0xe0,0xd2,0x01,0xcf,0x86,0xd5,0x06,0xcf,0x06, ++ 0x00,0x00,0xe4,0x0b,0x01,0xd3,0x06,0xcf,0x06,0x0c,0x00,0xd2,0x84,0xd1,0x50,0xd0, ++ 0x1e,0xcf,0x86,0x55,0x04,0x0c,0x00,0x54,0x04,0x0c,0x00,0x53,0x04,0x0c,0x00,0x92, ++ 0x0c,0x91,0x08,0x10,0x04,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5, ++ 0x18,0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x51,0x04,0x10, ++ 0x00,0x10,0x04,0x10,0x00,0x00,0x00,0x94,0x14,0x53,0x04,0x10,0x00,0xd2,0x08,0x11, ++ 0x04,0x10,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x10,0x00,0x00,0x00,0xd0,0x06,0xcf, ++ 0x06,0x00,0x00,0xcf,0x86,0xd5,0x08,0x14,0x04,0x00,0x00,0x10,0x00,0xd4,0x10,0x53, ++ 0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x11,0x04,0x10,0x00,0x00,0x00,0x93,0x10,0x52, ++ 0x04,0x10,0x01,0x91,0x08,0x10,0x04,0x10,0x01,0x10,0x00,0x00,0x00,0x00,0x00,0xd1, ++ 0x6c,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x10,0x00,0x54,0x04,0x10,0x00,0x93,0x10,0x52, ++ 0x04,0x10,0xe6,0x51,0x04,0x10,0xe6,0x10,0x04,0x10,0xe6,0x10,0x00,0x10,0x00,0xcf, ++ 0x86,0xd5,0x24,0xd4,0x10,0x93,0x0c,0x52,0x04,0x10,0x00,0x11,0x04,0x10,0x00,0x00, ++ 0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x92,0x0c,0x51,0x04,0x10,0x00,0x10,0x04,0x00, ++ 0x00,0x10,0x00,0x10,0x00,0xd4,0x14,0x93,0x10,0x92,0x0c,0x51,0x04,0x10,0x00,0x10, ++ 0x04,0x00,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x53,0x04,0x10,0x00,0x52,0x04,0x00, ++ 0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x10,0x00,0x10,0x00,0xd0,0x0e,0xcf,0x86,0x95, ++ 0x08,0x14,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd3,0x06,0xcf, ++ 0x06,0x00,0x00,0xd2,0x30,0xd1,0x0c,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x06,0x14, ++ 0x00,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04,0x14,0x00,0x53,0x04,0x14,0x00,0x92, ++ 0x0c,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf, ++ 0x06,0x00,0x00,0xd1,0x4c,0xd0,0x06,0xcf,0x06,0x0d,0x00,0xcf,0x86,0xd5,0x2c,0x94, ++ 0x28,0xd3,0x10,0x52,0x04,0x0d,0x00,0x91,0x08,0x10,0x04,0x0d,0x00,0x15,0x00,0x15, ++ 0x00,0xd2,0x0c,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00,0x00,0x51,0x04,0x00, ++ 0x00,0x10,0x04,0x00,0x00,0x15,0x00,0x0d,0x00,0x54,0x04,0x0d,0x00,0x53,0x04,0x0d, ++ 0x00,0x52,0x04,0x0d,0x00,0x51,0x04,0x0d,0x00,0x10,0x04,0x0d,0x00,0x15,0x00,0xd0, ++ 0x1e,0xcf,0x86,0x95,0x18,0x94,0x14,0x53,0x04,0x15,0x00,0x52,0x04,0x00,0x00,0x51, ++ 0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0d,0x00,0x0d,0x00,0x00,0x00,0xcf,0x86,0x55, ++ 0x04,0x00,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x12,0x00,0x13, ++ 0x00,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xcf,0x06,0x12,0x00,0xe2, ++ 0xc6,0x01,0xd1,0x8e,0xd0,0x86,0xcf,0x86,0xd5,0x48,0xd4,0x06,0xcf,0x06,0x12,0x00, ++ 0xd3,0x06,0xcf,0x06,0x12,0x00,0xd2,0x06,0xcf,0x06,0x12,0x00,0xd1,0x06,0xcf,0x06, ++ 0x12,0x00,0xd0,0x06,0xcf,0x06,0x12,0x00,0xcf,0x86,0x55,0x04,0x12,0x00,0xd4,0x14, ++ 0x53,0x04,0x12,0x00,0x52,0x04,0x12,0x00,0x91,0x08,0x10,0x04,0x12,0x00,0x14,0x00, ++ 0x14,0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x14,0x00,0x15,0x00,0x15,0x00,0x00,0x00, ++ 0xd4,0x36,0xd3,0x06,0xcf,0x06,0x12,0x00,0xd2,0x2a,0xd1,0x06,0xcf,0x06,0x12,0x00, ++ 0xd0,0x06,0xcf,0x06,0x12,0x00,0xcf,0x86,0x55,0x04,0x12,0x00,0x54,0x04,0x12,0x00, ++ 0x93,0x10,0x92,0x0c,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00, ++ 0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x86,0xcf,0x06,0x00,0x00, ++ 0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5,0xa2,0xd4,0x9c,0xd3,0x74, ++ 0xd2,0x26,0xd1,0x20,0xd0,0x1a,0xcf,0x86,0x95,0x14,0x94,0x10,0x93,0x0c,0x92,0x08, ++ 0x11,0x04,0x0c,0x00,0x13,0x00,0x13,0x00,0x13,0x00,0x13,0x00,0x13,0x00,0xcf,0x06, ++ 0x13,0x00,0xcf,0x06,0x13,0x00,0xd1,0x48,0xd0,0x1e,0xcf,0x86,0x95,0x18,0x54,0x04, ++ 0x13,0x00,0x53,0x04,0x13,0x00,0x52,0x04,0x13,0x00,0x51,0x04,0x13,0x00,0x10,0x04, ++ 0x13,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0xd5,0x18,0x54,0x04,0x00,0x00,0x93,0x10, ++ 0x92,0x0c,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0x94,0x0c,0x93,0x08,0x12,0x04,0x00,0x00,0x15,0x00,0x00,0x00,0x13,0x00,0xcf,0x06, ++ 0x13,0x00,0xd2,0x22,0xd1,0x06,0xcf,0x06,0x13,0x00,0xd0,0x06,0xcf,0x06,0x13,0x00, ++ 0xcf,0x86,0x55,0x04,0x13,0x00,0x54,0x04,0x13,0x00,0x53,0x04,0x13,0x00,0x12,0x04, ++ 0x13,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06, ++ 0x00,0x00,0xd3,0x7f,0xd2,0x79,0xd1,0x34,0xd0,0x06,0xcf,0x06,0x10,0x00,0xcf,0x86, ++ 0x55,0x04,0x10,0x00,0xd4,0x14,0x53,0x04,0x10,0x00,0x92,0x0c,0x51,0x04,0x10,0x00, ++ 0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0x52,0x04,0x10,0x00, ++ 0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd0,0x3f,0xcf,0x86,0xd5,0x2c, ++ 0xd4,0x14,0x53,0x04,0x10,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x53,0x04,0x10,0x00,0xd2,0x08,0x11,0x04,0x10,0x00,0x00,0x00, ++ 0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x01,0x10,0x00,0x94,0x0d,0x93,0x09,0x12,0x05, ++ 0x10,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00, ++ 0x00,0xcf,0x06,0x00,0x00,0xe1,0x96,0x04,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00, ++ 0xcf,0x86,0xe5,0x33,0x04,0xe4,0x83,0x02,0xe3,0xf8,0x01,0xd2,0x26,0xd1,0x06,0xcf, ++ 0x06,0x05,0x00,0xd0,0x06,0xcf,0x06,0x05,0x00,0xcf,0x86,0x55,0x04,0x05,0x00,0x54, ++ 0x04,0x05,0x00,0x93,0x0c,0x52,0x04,0x05,0x00,0x11,0x04,0x05,0x00,0x00,0x00,0x00, ++ 0x00,0xd1,0xef,0xd0,0x2a,0xcf,0x86,0x55,0x04,0x05,0x00,0x94,0x20,0xd3,0x10,0x52, ++ 0x04,0x05,0x00,0x51,0x04,0x05,0x00,0x10,0x04,0x05,0x00,0x00,0x00,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x0a,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0xcf,0x86,0xd5, ++ 0x2a,0x54,0x04,0x05,0x00,0x53,0x04,0x05,0x00,0x52,0x04,0x05,0x00,0x51,0x04,0x05, ++ 0x00,0x10,0x0d,0x05,0xff,0xf0,0x9d,0x85,0x97,0xf0,0x9d,0x85,0xa5,0x00,0x05,0xff, ++ 0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0x00,0xd4,0x75,0xd3,0x61,0xd2,0x44,0xd1, ++ 0x22,0x10,0x11,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0xf0,0x9d,0x85, ++ 0xae,0x00,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0xf0,0x9d,0x85,0xaf, ++ 0x00,0x10,0x11,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0xf0,0x9d,0x85, ++ 0xb0,0x00,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0xf0,0x9d,0x85,0xb1, ++ 0x00,0xd1,0x15,0x10,0x11,0x05,0xff,0xf0,0x9d,0x85,0x98,0xf0,0x9d,0x85,0xa5,0xf0, ++ 0x9d,0x85,0xb2,0x00,0x05,0xd8,0x10,0x04,0x05,0xd8,0x05,0x01,0xd2,0x08,0x11,0x04, ++ 0x05,0x01,0x05,0x00,0x91,0x08,0x10,0x04,0x05,0x00,0x05,0xe2,0x05,0xd8,0xd3,0x12, ++ 0x92,0x0d,0x51,0x04,0x05,0xd8,0x10,0x04,0x05,0xd8,0x05,0xff,0x00,0x05,0xff,0x00, ++ 0x92,0x0e,0x51,0x05,0x05,0xff,0x00,0x10,0x05,0x05,0xff,0x00,0x05,0xdc,0x05,0xdc, ++ 0xd0,0x97,0xcf,0x86,0xd5,0x28,0x94,0x24,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x05,0xdc, ++ 0x10,0x04,0x05,0xdc,0x05,0x00,0x91,0x08,0x10,0x04,0x05,0x00,0x05,0xe6,0x05,0xe6, ++ 0x92,0x08,0x11,0x04,0x05,0xe6,0x05,0xdc,0x05,0x00,0x05,0x00,0xd4,0x14,0x53,0x04, ++ 0x05,0x00,0xd2,0x08,0x11,0x04,0x05,0x00,0x05,0xe6,0x11,0x04,0x05,0xe6,0x05,0x00, ++ 0x53,0x04,0x05,0x00,0xd2,0x15,0x51,0x04,0x05,0x00,0x10,0x04,0x05,0x00,0x05,0xff, ++ 0xf0,0x9d,0x86,0xb9,0xf0,0x9d,0x85,0xa5,0x00,0xd1,0x1e,0x10,0x0d,0x05,0xff,0xf0, ++ 0x9d,0x86,0xba,0xf0,0x9d,0x85,0xa5,0x00,0x05,0xff,0xf0,0x9d,0x86,0xb9,0xf0,0x9d, ++ 0x85,0xa5,0xf0,0x9d,0x85,0xae,0x00,0x10,0x11,0x05,0xff,0xf0,0x9d,0x86,0xba,0xf0, ++ 0x9d,0x85,0xa5,0xf0,0x9d,0x85,0xae,0x00,0x05,0xff,0xf0,0x9d,0x86,0xb9,0xf0,0x9d, ++ 0x85,0xa5,0xf0,0x9d,0x85,0xaf,0x00,0xcf,0x86,0xd5,0x31,0xd4,0x21,0x93,0x1d,0x92, ++ 0x19,0x91,0x15,0x10,0x11,0x05,0xff,0xf0,0x9d,0x86,0xba,0xf0,0x9d,0x85,0xa5,0xf0, ++ 0x9d,0x85,0xaf,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0x53,0x04,0x05,0x00, ++ 0x52,0x04,0x05,0x00,0x11,0x04,0x05,0x00,0x11,0x00,0x94,0x14,0x53,0x04,0x11,0x00, ++ 0x92,0x0c,0x91,0x08,0x10,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++ 0xd2,0x44,0xd1,0x28,0xd0,0x06,0xcf,0x06,0x08,0x00,0xcf,0x86,0x95,0x1c,0x94,0x18, ++ 0x93,0x14,0xd2,0x08,0x11,0x04,0x08,0x00,0x08,0xe6,0x91,0x08,0x10,0x04,0x08,0xe6, ++ 0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00, ++ 0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x14,0x00,0x93,0x08,0x12,0x04,0x14,0x00, ++ 0x00,0x00,0x00,0x00,0xd1,0x40,0xd0,0x06,0xcf,0x06,0x07,0x00,0xcf,0x86,0xd5,0x18, ++ 0x54,0x04,0x07,0x00,0x93,0x10,0x52,0x04,0x07,0x00,0x51,0x04,0x07,0x00,0x10,0x04, ++ 0x07,0x00,0x00,0x00,0x00,0x00,0x54,0x04,0x09,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04, ++ 0x09,0x00,0x14,0x00,0x14,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x14,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xe3,0x5f,0x01,0xd2,0xb4,0xd1,0x24,0xd0, ++ 0x06,0xcf,0x06,0x05,0x00,0xcf,0x86,0x95,0x18,0x54,0x04,0x05,0x00,0x93,0x10,0x52, ++ 0x04,0x05,0x00,0x91,0x08,0x10,0x04,0x05,0x00,0x00,0x00,0x05,0x00,0x05,0x00,0x05, ++ 0x00,0xd0,0x6a,0xcf,0x86,0xd5,0x18,0x54,0x04,0x05,0x00,0x53,0x04,0x05,0x00,0x52, ++ 0x04,0x05,0x00,0x91,0x08,0x10,0x04,0x05,0x00,0x00,0x00,0x05,0x00,0xd4,0x34,0xd3, ++ 0x1c,0xd2,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x05,0x00,0x00,0x00,0xd1,0x08,0x10, ++ 0x04,0x00,0x00,0x05,0x00,0x10,0x04,0x05,0x00,0x00,0x00,0xd2,0x0c,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x05,0x00,0x05,0x00,0x91,0x08,0x10,0x04,0x05,0x00,0x00,0x00,0x05, ++ 0x00,0x53,0x04,0x05,0x00,0xd2,0x0c,0x51,0x04,0x05,0x00,0x10,0x04,0x00,0x00,0x05, ++ 0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x05,0x00,0x05,0x00,0xcf,0x86,0x95,0x20,0x94, ++ 0x1c,0x93,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x05,0x00,0x07,0x00,0x05,0x00,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0xd1, ++ 0xa4,0xd0,0x6a,0xcf,0x86,0xd5,0x48,0xd4,0x28,0xd3,0x10,0x52,0x04,0x05,0x00,0x51, ++ 0x04,0x05,0x00,0x10,0x04,0x00,0x00,0x05,0x00,0xd2,0x0c,0x51,0x04,0x05,0x00,0x10, ++ 0x04,0x05,0x00,0x00,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x05,0x00,0x05,0x00,0xd3, ++ 0x10,0x52,0x04,0x05,0x00,0x91,0x08,0x10,0x04,0x05,0x00,0x00,0x00,0x05,0x00,0x52, ++ 0x04,0x05,0x00,0x91,0x08,0x10,0x04,0x05,0x00,0x00,0x00,0x05,0x00,0x54,0x04,0x05, ++ 0x00,0x53,0x04,0x05,0x00,0xd2,0x0c,0x51,0x04,0x05,0x00,0x10,0x04,0x00,0x00,0x05, ++ 0x00,0x51,0x04,0x05,0x00,0x10,0x04,0x05,0x00,0x00,0x00,0xcf,0x86,0x95,0x34,0xd4, ++ 0x20,0xd3,0x14,0x52,0x04,0x05,0x00,0xd1,0x08,0x10,0x04,0x05,0x00,0x00,0x00,0x10, ++ 0x04,0x05,0x00,0x00,0x00,0x92,0x08,0x11,0x04,0x00,0x00,0x05,0x00,0x05,0x00,0x93, ++ 0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x05,0x00,0x00,0x00,0x05,0x00,0x05,0x00,0x05, ++ 0x00,0x05,0x00,0xcf,0x06,0x05,0x00,0xd2,0x26,0xd1,0x06,0xcf,0x06,0x05,0x00,0xd0, ++ 0x1a,0xcf,0x86,0x55,0x04,0x05,0x00,0x94,0x10,0x93,0x0c,0x52,0x04,0x05,0x00,0x11, ++ 0x04,0x08,0x00,0x00,0x00,0x05,0x00,0x05,0x00,0xcf,0x06,0x05,0x00,0xd1,0x06,0xcf, ++ 0x06,0x05,0x00,0xd0,0x06,0xcf,0x06,0x05,0x00,0xcf,0x86,0x95,0x18,0x94,0x14,0x53, ++ 0x04,0x05,0x00,0xd2,0x08,0x11,0x04,0x05,0x00,0x09,0x00,0x11,0x04,0x00,0x00,0x05, ++ 0x00,0x05,0x00,0x05,0x00,0xd4,0x52,0xd3,0x06,0xcf,0x06,0x11,0x00,0xd2,0x46,0xd1, ++ 0x06,0xcf,0x06,0x11,0x00,0xd0,0x3a,0xcf,0x86,0xd5,0x20,0xd4,0x0c,0x53,0x04,0x11, ++ 0x00,0x12,0x04,0x11,0x00,0x00,0x00,0x53,0x04,0x00,0x00,0x92,0x0c,0x51,0x04,0x00, ++ 0x00,0x10,0x04,0x00,0x00,0x11,0x00,0x11,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x11,0x00,0x11,0x00,0x11,0x00,0x11,0x00,0x00,0x00,0xcf, ++ 0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xe0,0xc2,0x03,0xcf,0x86, ++ 0xe5,0x03,0x01,0xd4,0xfc,0xd3,0xc0,0xd2,0x66,0xd1,0x60,0xd0,0x5a,0xcf,0x86,0xd5, ++ 0x2c,0xd4,0x14,0x93,0x10,0x52,0x04,0x12,0xe6,0x51,0x04,0x12,0xe6,0x10,0x04,0x12, ++ 0xe6,0x00,0x00,0x12,0xe6,0x53,0x04,0x12,0xe6,0x92,0x10,0xd1,0x08,0x10,0x04,0x12, ++ 0xe6,0x00,0x00,0x10,0x04,0x00,0x00,0x12,0xe6,0x12,0xe6,0x94,0x28,0xd3,0x18,0xd2, ++ 0x0c,0x51,0x04,0x12,0xe6,0x10,0x04,0x00,0x00,0x12,0xe6,0x91,0x08,0x10,0x04,0x12, ++ 0xe6,0x00,0x00,0x12,0xe6,0x92,0x0c,0x51,0x04,0x12,0xe6,0x10,0x04,0x12,0xe6,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xd1,0x54,0xd0, ++ 0x36,0xcf,0x86,0x55,0x04,0x15,0x00,0xd4,0x14,0x53,0x04,0x15,0x00,0x52,0x04,0x15, ++ 0x00,0x91,0x08,0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0xd3,0x10,0x52,0x04,0x15, ++ 0xe6,0x51,0x04,0x15,0xe6,0x10,0x04,0x15,0xe6,0x15,0x00,0x52,0x04,0x15,0x00,0x11, ++ 0x04,0x15,0x00,0x00,0x00,0xcf,0x86,0x95,0x18,0x94,0x14,0x53,0x04,0x15,0x00,0xd2, ++ 0x08,0x11,0x04,0x15,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x15,0x00,0x00,0x00,0x00, ++ 0x00,0xcf,0x06,0x00,0x00,0xd2,0x36,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf, ++ 0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x15,0x00,0xd4,0x0c,0x53,0x04,0x15,0x00,0x12, ++ 0x04,0x15,0x00,0x15,0xe6,0x53,0x04,0x15,0x00,0xd2,0x08,0x11,0x04,0x15,0x00,0x00, ++ 0x00,0x51,0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x15,0x00,0xcf,0x06,0x00,0x00,0xcf, ++ 0x06,0x00,0x00,0xd4,0x82,0xd3,0x7c,0xd2,0x3e,0xd1,0x06,0xcf,0x06,0x10,0x00,0xd0, ++ 0x06,0xcf,0x06,0x10,0x00,0xcf,0x86,0x95,0x2c,0xd4,0x18,0x93,0x14,0x52,0x04,0x10, ++ 0x00,0xd1,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x10,0x00,0x10, ++ 0x00,0x93,0x10,0x52,0x04,0x10,0xdc,0x51,0x04,0x10,0xdc,0x10,0x04,0x10,0xdc,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0xd1,0x38,0xd0,0x06,0xcf,0x06,0x12,0x00,0xcf,0x86,0x95, ++ 0x2c,0xd4,0x18,0xd3,0x08,0x12,0x04,0x12,0x00,0x12,0xe6,0x92,0x0c,0x51,0x04,0x12, ++ 0xe6,0x10,0x04,0x12,0x07,0x15,0x00,0x00,0x00,0x53,0x04,0x12,0x00,0xd2,0x08,0x11, ++ 0x04,0x12,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x12,0x00,0x00,0x00,0xcf,0x06,0x00, ++ 0x00,0xcf,0x06,0x00,0x00,0xd3,0x82,0xd2,0x48,0xd1,0x24,0xd0,0x06,0xcf,0x06,0x00, ++ 0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00,0x00,0x93,0x10,0x92,0x0c,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x14,0x00,0x14,0x00,0x14,0x00,0x14,0x00,0xd0,0x1e,0xcf, ++ 0x86,0x55,0x04,0x14,0x00,0x54,0x04,0x14,0x00,0x93,0x10,0x52,0x04,0x14,0x00,0x91, ++ 0x08,0x10,0x04,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd1, ++ 0x34,0xd0,0x2e,0xcf,0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x15,0x00,0x15,0x00,0x15,0x00,0x15,0x00,0x15,0x00,0x54,0x04,0x15, ++ 0x00,0x53,0x04,0x15,0x00,0x52,0x04,0x15,0x00,0x11,0x04,0x15,0x00,0x00,0x00,0xcf, ++ 0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xe2,0xb2,0x01,0xe1,0x41,0x01,0xd0,0x6e,0xcf, ++ 0x86,0xd5,0x18,0x94,0x14,0x93,0x10,0x52,0x04,0x0d,0x00,0x91,0x08,0x10,0x04,0x00, ++ 0x00,0x0d,0x00,0x0d,0x00,0x0d,0x00,0x0d,0x00,0xd4,0x30,0xd3,0x20,0xd2,0x10,0xd1, ++ 0x08,0x10,0x04,0x00,0x00,0x0d,0x00,0x10,0x04,0x0d,0x00,0x00,0x00,0xd1,0x08,0x10, ++ 0x04,0x0d,0x00,0x00,0x00,0x10,0x04,0x00,0x00,0x0d,0x00,0x92,0x0c,0x91,0x08,0x10, ++ 0x04,0x00,0x00,0x0d,0x00,0x0d,0x00,0x0d,0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x0d, ++ 0x00,0x10,0x04,0x0d,0x00,0x00,0x00,0x0d,0x00,0x92,0x10,0xd1,0x08,0x10,0x04,0x00, ++ 0x00,0x0d,0x00,0x10,0x04,0x00,0x00,0x0d,0x00,0x00,0x00,0xcf,0x86,0xd5,0x74,0xd4, ++ 0x34,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x00,0x00,0x10,0x04,0x0d,0x00,0x00,0x00,0x51, ++ 0x04,0x00,0x00,0x10,0x04,0x00,0x00,0x0d,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x00, ++ 0x00,0x0d,0x00,0x10,0x04,0x00,0x00,0x0d,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x0d, ++ 0x00,0x0d,0x00,0xd3,0x20,0xd2,0x10,0xd1,0x08,0x10,0x04,0x00,0x00,0x0d,0x00,0x10, ++ 0x04,0x0d,0x00,0x00,0x00,0xd1,0x08,0x10,0x04,0x0d,0x00,0x00,0x00,0x10,0x04,0x00, ++ 0x00,0x0d,0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x00,0x00,0x0d,0x00,0x10,0x04,0x00, ++ 0x00,0x0d,0x00,0xd1,0x08,0x10,0x04,0x00,0x00,0x0d,0x00,0x10,0x04,0x00,0x00,0x0d, ++ 0x00,0xd4,0x30,0xd3,0x20,0xd2,0x10,0xd1,0x08,0x10,0x04,0x00,0x00,0x0d,0x00,0x10, ++ 0x04,0x0d,0x00,0x00,0x00,0xd1,0x08,0x10,0x04,0x0d,0x00,0x00,0x00,0x10,0x04,0x00, ++ 0x00,0x0d,0x00,0x92,0x0c,0x51,0x04,0x0d,0x00,0x10,0x04,0x0d,0x00,0x00,0x00,0x0d, ++ 0x00,0xd3,0x10,0x92,0x0c,0x51,0x04,0x0d,0x00,0x10,0x04,0x0d,0x00,0x00,0x00,0x0d, ++ 0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0d,0x00,0x0d,0x00,0xd1,0x08,0x10, ++ 0x04,0x0d,0x00,0x00,0x00,0x10,0x04,0x0d,0x00,0x00,0x00,0xd0,0x56,0xcf,0x86,0xd5, ++ 0x20,0xd4,0x14,0x53,0x04,0x0d,0x00,0x92,0x0c,0x51,0x04,0x0d,0x00,0x10,0x04,0x00, ++ 0x00,0x0d,0x00,0x0d,0x00,0x53,0x04,0x0d,0x00,0x12,0x04,0x0d,0x00,0x00,0x00,0xd4, ++ 0x28,0xd3,0x18,0xd2,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0d,0x00,0x0d,0x00,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x0d,0x00,0x0d,0x00,0x92,0x0c,0x51,0x04,0x0d,0x00,0x10, ++ 0x04,0x00,0x00,0x0d,0x00,0x0d,0x00,0x53,0x04,0x0d,0x00,0x12,0x04,0x0d,0x00,0x00, ++ 0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00,0x00,0x93,0x0c,0x92,0x08,0x11, ++ 0x04,0x0d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x86,0xe5, ++ 0x96,0x05,0xe4,0x28,0x03,0xe3,0xed,0x01,0xd2,0xa0,0xd1,0x1c,0xd0,0x16,0xcf,0x86, ++ 0x55,0x04,0x0a,0x00,0x94,0x0c,0x53,0x04,0x0a,0x00,0x12,0x04,0x0a,0x00,0x00,0x00, ++ 0x0a,0x00,0xcf,0x06,0x0a,0x00,0xd0,0x46,0xcf,0x86,0xd5,0x10,0x54,0x04,0x0a,0x00, ++ 0x93,0x08,0x12,0x04,0x0a,0x00,0x00,0x00,0x00,0x00,0xd4,0x14,0x53,0x04,0x0c,0x00, ++ 0x52,0x04,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00,0xd3,0x10, ++ 0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0c,0x00,0x0c,0x00,0x0c,0x00,0x52,0x04, ++ 0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00,0x10,0x00,0xcf,0x86,0xd5,0x28, ++ 0xd4,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0c,0x00,0x0c,0x00, ++ 0x0c,0x00,0x0c,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x00,0x00,0x0c,0x00, ++ 0x0c,0x00,0x0c,0x00,0x0c,0x00,0x54,0x04,0x10,0x00,0x93,0x0c,0x52,0x04,0x10,0x00, ++ 0x11,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd1,0xe4,0xd0,0x5a,0xcf,0x86,0xd5,0x20, ++ 0x94,0x1c,0x53,0x04,0x0b,0x00,0xd2,0x0c,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00, ++ 0x10,0x00,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x0b,0x00,0xd4,0x14, ++ 0x53,0x04,0x0b,0x00,0x52,0x04,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04,0x0b,0x00, ++ 0x14,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c,0x00,0x0b,0x00,0x0c,0x00, ++ 0x0c,0x00,0x52,0x04,0x0c,0x00,0xd1,0x08,0x10,0x04,0x0c,0x00,0x0b,0x00,0x10,0x04, ++ 0x0c,0x00,0x0b,0x00,0xcf,0x86,0xd5,0x4c,0xd4,0x2c,0xd3,0x18,0xd2,0x0c,0x51,0x04, ++ 0x0c,0x00,0x10,0x04,0x0b,0x00,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0b,0x00, ++ 0x0c,0x00,0xd2,0x08,0x11,0x04,0x0c,0x00,0x0b,0x00,0x51,0x04,0x0b,0x00,0x10,0x04, ++ 0x0b,0x00,0x0c,0x00,0xd3,0x10,0x52,0x04,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04, ++ 0x0c,0x00,0x0b,0x00,0x52,0x04,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00, ++ 0x0b,0x00,0xd4,0x18,0x53,0x04,0x0c,0x00,0xd2,0x08,0x11,0x04,0x0c,0x00,0x0d,0x00, ++ 0x91,0x08,0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0x53,0x04,0x0c,0x00,0xd2,0x10, ++ 0xd1,0x08,0x10,0x04,0x0c,0x00,0x0b,0x00,0x10,0x04,0x0c,0x00,0x0b,0x00,0xd1,0x08, ++ 0x10,0x04,0x0b,0x00,0x0c,0x00,0x10,0x04,0x0c,0x00,0x0b,0x00,0xd0,0x4e,0xcf,0x86, ++ 0xd5,0x34,0xd4,0x14,0x53,0x04,0x0c,0x00,0xd2,0x08,0x11,0x04,0x0c,0x00,0x0b,0x00, ++ 0x11,0x04,0x0b,0x00,0x0c,0x00,0xd3,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0b,0x00, ++ 0x0c,0x00,0x0c,0x00,0x0c,0x00,0x92,0x0c,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00, ++ 0x12,0x00,0x12,0x00,0x94,0x14,0x53,0x04,0x12,0x00,0x52,0x04,0x12,0x00,0x91,0x08, ++ 0x10,0x04,0x12,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00, ++ 0x94,0x10,0x93,0x0c,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x0c,0x00,0x0c,0x00, ++ 0x0c,0x00,0xd2,0x7e,0xd1,0x78,0xd0,0x3e,0xcf,0x86,0xd5,0x1c,0x94,0x18,0x93,0x14, ++ 0x92,0x10,0xd1,0x08,0x10,0x04,0x0b,0x00,0x0c,0x00,0x10,0x04,0x0c,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0x0b,0x00,0x54,0x04,0x0b,0x00,0xd3,0x0c,0x92,0x08,0x11,0x04, ++ 0x0b,0x00,0x0c,0x00,0x0c,0x00,0x92,0x0c,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00, ++ 0x12,0x00,0x00,0x00,0xcf,0x86,0xd5,0x24,0xd4,0x14,0x53,0x04,0x0b,0x00,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x0b,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x93,0x0c,0x92,0x08, ++ 0x11,0x04,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x94,0x10,0x93,0x0c,0x52,0x04, ++ 0x13,0x00,0x11,0x04,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00, ++ 0xd1,0x58,0xd0,0x3a,0xcf,0x86,0x55,0x04,0x0c,0x00,0xd4,0x20,0xd3,0x10,0x92,0x0c, ++ 0x91,0x08,0x10,0x04,0x0c,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x52,0x04,0x10,0x00, ++ 0x91,0x08,0x10,0x04,0x10,0x00,0x11,0x00,0x11,0x00,0x93,0x10,0x52,0x04,0x0c,0x00, ++ 0x51,0x04,0x0c,0x00,0x10,0x04,0x10,0x00,0x0c,0x00,0x0c,0x00,0xcf,0x86,0x55,0x04, ++ 0x0c,0x00,0x54,0x04,0x0c,0x00,0x53,0x04,0x0c,0x00,0x52,0x04,0x0c,0x00,0x91,0x08, ++ 0x10,0x04,0x0c,0x00,0x10,0x00,0x11,0x00,0xd0,0x16,0xcf,0x86,0x95,0x10,0x54,0x04, ++ 0x0c,0x00,0x93,0x08,0x12,0x04,0x0c,0x00,0x10,0x00,0x10,0x00,0x0c,0x00,0xcf,0x86, ++ 0xd5,0x34,0xd4,0x28,0xd3,0x10,0x52,0x04,0x0c,0x00,0x91,0x08,0x10,0x04,0x0c,0x00, ++ 0x10,0x00,0x0c,0x00,0xd2,0x0c,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00,0x10,0x00, ++ 0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x11,0x00,0x93,0x08,0x12,0x04,0x11,0x00, ++ 0x10,0x00,0x10,0x00,0x54,0x04,0x0c,0x00,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04, ++ 0x0c,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x11,0x00,0xd3,0xfc,0xd2,0x6c,0xd1,0x3c, ++ 0xd0,0x1e,0xcf,0x86,0x55,0x04,0x0c,0x00,0x54,0x04,0x0c,0x00,0x53,0x04,0x0c,0x00, ++ 0x52,0x04,0x0c,0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00,0x10,0x00,0xcf,0x86, ++ 0x95,0x18,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0c,0x00,0x10,0x00, ++ 0x0c,0x00,0x0c,0x00,0x0c,0x00,0x0c,0x00,0x0c,0x00,0xd0,0x06,0xcf,0x06,0x0c,0x00, ++ 0xcf,0x86,0x55,0x04,0x0c,0x00,0x54,0x04,0x0c,0x00,0x53,0x04,0x0c,0x00,0xd2,0x0c, ++ 0x91,0x08,0x10,0x04,0x10,0x00,0x0c,0x00,0x0c,0x00,0xd1,0x08,0x10,0x04,0x0c,0x00, ++ 0x10,0x00,0x10,0x04,0x10,0x00,0x11,0x00,0xd1,0x54,0xd0,0x1a,0xcf,0x86,0x55,0x04, ++ 0x0c,0x00,0x54,0x04,0x0c,0x00,0x53,0x04,0x0c,0x00,0x52,0x04,0x0c,0x00,0x11,0x04, ++ 0x0c,0x00,0x10,0x00,0xcf,0x86,0xd5,0x1c,0x94,0x18,0xd3,0x08,0x12,0x04,0x0d,0x00, ++ 0x10,0x00,0x92,0x0c,0x51,0x04,0x10,0x00,0x10,0x04,0x10,0x00,0x11,0x00,0x11,0x00, ++ 0x0c,0x00,0xd4,0x08,0x13,0x04,0x0c,0x00,0x10,0x00,0x53,0x04,0x10,0x00,0x92,0x0c, ++ 0x51,0x04,0x10,0x00,0x10,0x04,0x12,0x00,0x10,0x00,0x10,0x00,0xd0,0x1e,0xcf,0x86, ++ 0x55,0x04,0x10,0x00,0x94,0x14,0x93,0x10,0x52,0x04,0x10,0x00,0x91,0x08,0x10,0x04, ++ 0x12,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0xcf,0x86,0x55,0x04,0x10,0x00, ++ 0x54,0x04,0x10,0x00,0x53,0x04,0x10,0x00,0x92,0x0c,0x51,0x04,0x10,0x00,0x10,0x04, ++ 0x10,0x00,0x0c,0x00,0x0c,0x00,0xe2,0x19,0x01,0xd1,0xa8,0xd0,0x7e,0xcf,0x86,0xd5, ++ 0x4c,0xd4,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x0d,0x00,0x0c,0x00,0x0c, ++ 0x00,0x0c,0x00,0x0c,0x00,0xd3,0x1c,0xd2,0x0c,0x91,0x08,0x10,0x04,0x0c,0x00,0x0d, ++ 0x00,0x0c,0x00,0xd1,0x08,0x10,0x04,0x0c,0x00,0x0d,0x00,0x10,0x04,0x0c,0x00,0x0d, ++ 0x00,0xd2,0x10,0xd1,0x08,0x10,0x04,0x0c,0x00,0x0d,0x00,0x10,0x04,0x0c,0x00,0x0d, ++ 0x00,0x51,0x04,0x0c,0x00,0x10,0x04,0x0c,0x00,0x0d,0x00,0xd4,0x1c,0xd3,0x0c,0x52, ++ 0x04,0x0c,0x00,0x11,0x04,0x0c,0x00,0x0d,0x00,0x52,0x04,0x0c,0x00,0x91,0x08,0x10, ++ 0x04,0x0d,0x00,0x0c,0x00,0x0d,0x00,0x93,0x10,0x52,0x04,0x0c,0x00,0x91,0x08,0x10, ++ 0x04,0x0d,0x00,0x0c,0x00,0x0c,0x00,0x0c,0x00,0xcf,0x86,0x95,0x24,0x94,0x20,0x93, ++ 0x1c,0xd2,0x10,0xd1,0x08,0x10,0x04,0x0c,0x00,0x10,0x00,0x10,0x04,0x10,0x00,0x11, ++ 0x00,0x91,0x08,0x10,0x04,0x11,0x00,0x0c,0x00,0x0c,0x00,0x0c,0x00,0x10,0x00,0x10, ++ 0x00,0xd0,0x06,0xcf,0x06,0x0c,0x00,0xcf,0x86,0xd5,0x30,0xd4,0x10,0x93,0x0c,0x52, ++ 0x04,0x0c,0x00,0x11,0x04,0x0c,0x00,0x10,0x00,0x10,0x00,0x93,0x1c,0xd2,0x10,0xd1, ++ 0x08,0x10,0x04,0x11,0x00,0x12,0x00,0x10,0x04,0x12,0x00,0x13,0x00,0x91,0x08,0x10, ++ 0x04,0x13,0x00,0x15,0x00,0x00,0x00,0x00,0x00,0xd4,0x14,0x53,0x04,0x10,0x00,0x52, ++ 0x04,0x10,0x00,0x91,0x08,0x10,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0xd3,0x10,0x52, ++ 0x04,0x10,0x00,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x13,0x00,0x92,0x10,0xd1, ++ 0x08,0x10,0x04,0x13,0x00,0x14,0x00,0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0xd1, ++ 0x1c,0xd0,0x06,0xcf,0x06,0x0c,0x00,0xcf,0x86,0x55,0x04,0x0c,0x00,0x54,0x04,0x0c, ++ 0x00,0x93,0x08,0x12,0x04,0x0c,0x00,0x00,0x00,0x00,0x00,0xd0,0x06,0xcf,0x06,0x10, ++ 0x00,0xcf,0x86,0xd5,0x24,0x54,0x04,0x10,0x00,0xd3,0x10,0x52,0x04,0x10,0x00,0x91, ++ 0x08,0x10,0x04,0x10,0x00,0x14,0x00,0x14,0x00,0x92,0x0c,0x91,0x08,0x10,0x04,0x14, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x94,0x0c,0x53,0x04,0x15,0x00,0x12,0x04,0x15, ++ 0x00,0x00,0x00,0x00,0x00,0xe4,0x40,0x02,0xe3,0xc9,0x01,0xd2,0x5c,0xd1,0x34,0xd0, ++ 0x16,0xcf,0x86,0x95,0x10,0x94,0x0c,0x53,0x04,0x10,0x00,0x12,0x04,0x10,0x00,0x00, ++ 0x00,0x10,0x00,0x10,0x00,0xcf,0x86,0x95,0x18,0xd4,0x08,0x13,0x04,0x10,0x00,0x00, ++ 0x00,0x53,0x04,0x10,0x00,0x92,0x08,0x11,0x04,0x10,0x00,0x00,0x00,0x00,0x00,0x10, ++ 0x00,0xd0,0x22,0xcf,0x86,0xd5,0x0c,0x94,0x08,0x13,0x04,0x10,0x00,0x00,0x00,0x10, ++ 0x00,0x94,0x10,0x53,0x04,0x10,0x00,0x52,0x04,0x10,0x00,0x11,0x04,0x10,0x00,0x00, ++ 0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xd1,0xc0,0xd0,0x5e,0xcf,0x86,0xd5,0x30,0xd4, ++ 0x14,0x53,0x04,0x13,0x00,0x52,0x04,0x13,0x00,0x91,0x08,0x10,0x04,0x00,0x00,0x15, ++ 0x00,0x15,0x00,0x53,0x04,0x11,0x00,0xd2,0x0c,0x91,0x08,0x10,0x04,0x11,0x00,0x12, ++ 0x00,0x12,0x00,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x13,0x00,0xd4,0x08,0x13, ++ 0x04,0x12,0x00,0x13,0x00,0xd3,0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x12,0x00,0x13, ++ 0x00,0x10,0x04,0x13,0x00,0x12,0x00,0x12,0x00,0x52,0x04,0x12,0x00,0x51,0x04,0x12, ++ 0x00,0x10,0x04,0x12,0x00,0x15,0x00,0xcf,0x86,0xd5,0x28,0xd4,0x14,0x53,0x04,0x12, ++ 0x00,0x52,0x04,0x12,0x00,0x91,0x08,0x10,0x04,0x13,0x00,0x14,0x00,0x14,0x00,0x53, ++ 0x04,0x12,0x00,0x52,0x04,0x12,0x00,0x51,0x04,0x12,0x00,0x10,0x04,0x12,0x00,0x13, ++ 0x00,0xd4,0x0c,0x53,0x04,0x13,0x00,0x12,0x04,0x13,0x00,0x14,0x00,0xd3,0x1c,0xd2, ++ 0x10,0xd1,0x08,0x10,0x04,0x14,0x00,0x15,0x00,0x10,0x04,0x00,0x00,0x14,0x00,0x51, ++ 0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0x92,0x0c,0x51,0x04,0x00,0x00,0x10, ++ 0x04,0x14,0x00,0x15,0x00,0x14,0x00,0xd0,0x62,0xcf,0x86,0xd5,0x24,0xd4,0x14,0x93, ++ 0x10,0x52,0x04,0x11,0x00,0x91,0x08,0x10,0x04,0x11,0x00,0x12,0x00,0x12,0x00,0x12, ++ 0x00,0x93,0x0c,0x92,0x08,0x11,0x04,0x12,0x00,0x13,0x00,0x13,0x00,0x14,0x00,0xd4, ++ 0x2c,0xd3,0x18,0xd2,0x0c,0x51,0x04,0x14,0x00,0x10,0x04,0x14,0x00,0x00,0x00,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x15,0x00,0x15,0x00,0xd2,0x0c,0x51,0x04,0x15,0x00,0x10, ++ 0x04,0x15,0x00,0x00,0x00,0x11,0x04,0x00,0x00,0x15,0x00,0x53,0x04,0x14,0x00,0x92, ++ 0x08,0x11,0x04,0x14,0x00,0x15,0x00,0x15,0x00,0xcf,0x86,0xd5,0x30,0x94,0x2c,0xd3, ++ 0x14,0x92,0x10,0xd1,0x08,0x10,0x04,0x11,0x00,0x14,0x00,0x10,0x04,0x14,0x00,0x15, ++ 0x00,0x15,0x00,0xd2,0x0c,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00,0x00,0x91, ++ 0x08,0x10,0x04,0x00,0x00,0x15,0x00,0x15,0x00,0x13,0x00,0x94,0x14,0x93,0x10,0x52, ++ 0x04,0x13,0x00,0x51,0x04,0x13,0x00,0x10,0x04,0x13,0x00,0x14,0x00,0x14,0x00,0x14, ++ 0x00,0xd2,0x70,0xd1,0x40,0xd0,0x06,0xcf,0x06,0x15,0x00,0xcf,0x86,0xd5,0x10,0x54, ++ 0x04,0x15,0x00,0x93,0x08,0x12,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0xd4,0x10,0x53, ++ 0x04,0x14,0x00,0x52,0x04,0x14,0x00,0x11,0x04,0x14,0x00,0x00,0x00,0xd3,0x08,0x12, ++ 0x04,0x15,0x00,0x00,0x00,0x92,0x0c,0x51,0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00, ++ 0x00,0x00,0x00,0xd0,0x2a,0xcf,0x86,0x95,0x24,0xd4,0x14,0x93,0x10,0x92,0x0c,0x51, ++ 0x04,0x15,0x00,0x10,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x93,0x0c,0x52, ++ 0x04,0x15,0x00,0x11,0x04,0x15,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00, ++ 0x00,0xcf,0x06,0x00,0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00, ++ 0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55, ++ 0x04,0x00,0x00,0x54,0x04,0x00,0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11, ++ 0x04,0x00,0x00,0x02,0x00,0xe4,0xf9,0x12,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00, ++ 0xd2,0xc2,0xd1,0x08,0xcf,0x86,0xcf,0x06,0x05,0x00,0xd0,0x44,0xcf,0x86,0xd5,0x3c, ++ 0xd4,0x06,0xcf,0x06,0x05,0x00,0xd3,0x06,0xcf,0x06,0x05,0x00,0xd2,0x2a,0xd1,0x06, ++ 0xcf,0x06,0x05,0x00,0xd0,0x06,0xcf,0x06,0x05,0x00,0xcf,0x86,0x95,0x18,0x54,0x04, ++ 0x05,0x00,0x93,0x10,0x52,0x04,0x05,0x00,0x51,0x04,0x05,0x00,0x10,0x04,0x05,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x0b,0x00,0xcf,0x06,0x0b,0x00,0xcf,0x86, ++ 0xd5,0x3c,0xd4,0x06,0xcf,0x06,0x0b,0x00,0xd3,0x06,0xcf,0x06,0x0b,0x00,0xd2,0x06, ++ 0xcf,0x06,0x0b,0x00,0xd1,0x24,0xd0,0x1e,0xcf,0x86,0x55,0x04,0x0b,0x00,0x54,0x04, ++ 0x0b,0x00,0x93,0x10,0x52,0x04,0x0b,0x00,0x91,0x08,0x10,0x04,0x0b,0x00,0x00,0x00, ++ 0x00,0x00,0x00,0x00,0xcf,0x06,0x0c,0x00,0xcf,0x06,0x0c,0x00,0xd4,0x32,0xd3,0x2c, ++ 0xd2,0x26,0xd1,0x20,0xd0,0x1a,0xcf,0x86,0x95,0x14,0x54,0x04,0x0c,0x00,0x53,0x04, ++ 0x0c,0x00,0x52,0x04,0x0c,0x00,0x11,0x04,0x0c,0x00,0x00,0x00,0x11,0x00,0xcf,0x06, ++ 0x11,0x00,0xcf,0x06,0x11,0x00,0xcf,0x06,0x11,0x00,0xcf,0x06,0x11,0x00,0xcf,0x06, ++ 0x11,0x00,0xd1,0x48,0xd0,0x40,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x11,0x00,0xd4,0x06, ++ 0xcf,0x06,0x11,0x00,0xd3,0x06,0xcf,0x06,0x11,0x00,0xd2,0x26,0xd1,0x06,0xcf,0x06, ++ 0x11,0x00,0xd0,0x1a,0xcf,0x86,0x55,0x04,0x11,0x00,0x94,0x10,0x93,0x0c,0x92,0x08, ++ 0x11,0x04,0x11,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x13,0x00,0xcf,0x06,0x13,0x00, ++ 0xcf,0x06,0x13,0x00,0xcf,0x86,0xcf,0x06,0x13,0x00,0xd0,0x44,0xcf,0x86,0xd5,0x06, ++ 0xcf,0x06,0x13,0x00,0xd4,0x36,0xd3,0x06,0xcf,0x06,0x13,0x00,0xd2,0x06,0xcf,0x06, ++ 0x13,0x00,0xd1,0x06,0xcf,0x06,0x13,0x00,0xd0,0x06,0xcf,0x06,0x13,0x00,0xcf,0x86, ++ 0x55,0x04,0x13,0x00,0x94,0x14,0x93,0x10,0x92,0x0c,0x91,0x08,0x10,0x04,0x13,0x00, ++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x86, ++ 0xd5,0x06,0xcf,0x06,0x00,0x00,0xe4,0x68,0x11,0xe3,0x51,0x10,0xe2,0x17,0x08,0xe1, ++ 0x06,0x04,0xe0,0x03,0x02,0xcf,0x86,0xe5,0x06,0x01,0xd4,0x82,0xd3,0x41,0xd2,0x21, ++ 0xd1,0x10,0x10,0x08,0x05,0xff,0xe4,0xb8,0xbd,0x00,0x05,0xff,0xe4,0xb8,0xb8,0x00, ++ 0x10,0x08,0x05,0xff,0xe4,0xb9,0x81,0x00,0x05,0xff,0xf0,0xa0,0x84,0xa2,0x00,0xd1, ++ 0x10,0x10,0x08,0x05,0xff,0xe4,0xbd,0xa0,0x00,0x05,0xff,0xe4,0xbe,0xae,0x00,0x10, ++ 0x08,0x05,0xff,0xe4,0xbe,0xbb,0x00,0x05,0xff,0xe5,0x80,0x82,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x05,0xff,0xe5,0x81,0xba,0x00,0x05,0xff,0xe5,0x82,0x99,0x00,0x10, ++ 0x08,0x05,0xff,0xe5,0x83,0xa7,0x00,0x05,0xff,0xe5,0x83,0x8f,0x00,0xd1,0x11,0x10, ++ 0x08,0x05,0xff,0xe3,0x92,0x9e,0x00,0x05,0xff,0xf0,0xa0,0x98,0xba,0x00,0x10,0x08, ++ 0x05,0xff,0xe5,0x85,0x8d,0x00,0x05,0xff,0xe5,0x85,0x94,0x00,0xd3,0x42,0xd2,0x21, ++ 0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0x85,0xa4,0x00,0x05,0xff,0xe5,0x85,0xb7,0x00, ++ 0x10,0x09,0x05,0xff,0xf0,0xa0,0x94,0x9c,0x00,0x05,0xff,0xe3,0x92,0xb9,0x00,0xd1, ++ 0x10,0x10,0x08,0x05,0xff,0xe5,0x85,0xa7,0x00,0x05,0xff,0xe5,0x86,0x8d,0x00,0x10, ++ 0x09,0x05,0xff,0xf0,0xa0,0x95,0x8b,0x00,0x05,0xff,0xe5,0x86,0x97,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0x86,0xa4,0x00,0x05,0xff,0xe4,0xbb,0x8c,0x00, ++ 0x10,0x08,0x05,0xff,0xe5,0x86,0xac,0x00,0x05,0xff,0xe5,0x86,0xb5,0x00,0xd1,0x11, ++ 0x10,0x09,0x05,0xff,0xf0,0xa9,0x87,0x9f,0x00,0x05,0xff,0xe5,0x87,0xb5,0x00,0x10, ++ 0x08,0x05,0xff,0xe5,0x88,0x83,0x00,0x05,0xff,0xe3,0x93,0x9f,0x00,0xd4,0x80,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0x88,0xbb,0x00,0x05,0xff,0xe5, ++ 0x89,0x86,0x00,0x10,0x08,0x05,0xff,0xe5,0x89,0xb2,0x00,0x05,0xff,0xe5,0x89,0xb7, ++ 0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe3,0x94,0x95,0x00,0x05,0xff,0xe5,0x8b,0x87, ++ 0x00,0x10,0x08,0x05,0xff,0xe5,0x8b,0x89,0x00,0x05,0xff,0xe5,0x8b,0xa4,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0x8b,0xba,0x00,0x05,0xff,0xe5,0x8c,0x85, ++ 0x00,0x10,0x08,0x05,0xff,0xe5,0x8c,0x86,0x00,0x05,0xff,0xe5,0x8c,0x97,0x00,0xd1, ++ 0x10,0x10,0x08,0x05,0xff,0xe5,0x8d,0x89,0x00,0x05,0xff,0xe5,0x8d,0x91,0x00,0x10, ++ 0x08,0x05,0xff,0xe5,0x8d,0x9a,0x00,0x05,0xff,0xe5,0x8d,0xb3,0x00,0xd3,0x39,0xd2, ++ 0x18,0x91,0x10,0x10,0x08,0x05,0xff,0xe5,0x8d,0xbd,0x00,0x05,0xff,0xe5,0x8d,0xbf, ++ 0x00,0x05,0xff,0xe5,0x8d,0xbf,0x00,0xd1,0x11,0x10,0x09,0x05,0xff,0xf0,0xa0,0xa8, ++ 0xac,0x00,0x05,0xff,0xe7,0x81,0xb0,0x00,0x10,0x08,0x05,0xff,0xe5,0x8f,0x8a,0x00, ++ 0x05,0xff,0xe5,0x8f,0x9f,0x00,0xd2,0x21,0xd1,0x11,0x10,0x09,0x05,0xff,0xf0,0xa0, ++ 0xad,0xa3,0x00,0x05,0xff,0xe5,0x8f,0xab,0x00,0x10,0x08,0x05,0xff,0xe5,0x8f,0xb1, ++ 0x00,0x05,0xff,0xe5,0x90,0x86,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0x92,0x9e, ++ 0x00,0x05,0xff,0xe5,0x90,0xb8,0x00,0x10,0x08,0x05,0xff,0xe5,0x91,0x88,0x00,0x05, ++ 0xff,0xe5,0x91,0xa8,0x00,0xcf,0x86,0xe5,0x02,0x01,0xd4,0x80,0xd3,0x40,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0x92,0xa2,0x00,0x05,0xff,0xe5,0x93,0xb6,0x00, ++ 0x10,0x08,0x05,0xff,0xe5,0x94,0x90,0x00,0x05,0xff,0xe5,0x95,0x93,0x00,0xd1,0x10, ++ 0x10,0x08,0x05,0xff,0xe5,0x95,0xa3,0x00,0x05,0xff,0xe5,0x96,0x84,0x00,0x10,0x08, ++ 0x05,0xff,0xe5,0x96,0x84,0x00,0x05,0xff,0xe5,0x96,0x99,0x00,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x05,0xff,0xe5,0x96,0xab,0x00,0x05,0xff,0xe5,0x96,0xb3,0x00,0x10,0x08, ++ 0x05,0xff,0xe5,0x97,0x82,0x00,0x05,0xff,0xe5,0x9c,0x96,0x00,0xd1,0x10,0x10,0x08, ++ 0x05,0xff,0xe5,0x98,0x86,0x00,0x05,0xff,0xe5,0x9c,0x97,0x00,0x10,0x08,0x05,0xff, ++ 0xe5,0x99,0x91,0x00,0x05,0xff,0xe5,0x99,0xb4,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x05,0xff,0xe5,0x88,0x87,0x00,0x05,0xff,0xe5,0xa3,0xae,0x00,0x10,0x08, ++ 0x05,0xff,0xe5,0x9f,0x8e,0x00,0x05,0xff,0xe5,0x9f,0xb4,0x00,0xd1,0x10,0x10,0x08, ++ 0x05,0xff,0xe5,0xa0,0x8d,0x00,0x05,0xff,0xe5,0x9e,0x8b,0x00,0x10,0x08,0x05,0xff, ++ 0xe5,0xa0,0xb2,0x00,0x05,0xff,0xe5,0xa0,0xb1,0x00,0xd2,0x21,0xd1,0x11,0x10,0x08, ++ 0x05,0xff,0xe5,0xa2,0xac,0x00,0x05,0xff,0xf0,0xa1,0x93,0xa4,0x00,0x10,0x08,0x05, ++ 0xff,0xe5,0xa3,0xb2,0x00,0x05,0xff,0xe5,0xa3,0xb7,0x00,0xd1,0x10,0x10,0x08,0x05, ++ 0xff,0xe5,0xa4,0x86,0x00,0x05,0xff,0xe5,0xa4,0x9a,0x00,0x10,0x08,0x05,0xff,0xe5, ++ 0xa4,0xa2,0x00,0x05,0xff,0xe5,0xa5,0xa2,0x00,0xd4,0x7b,0xd3,0x42,0xd2,0x22,0xd1, ++ 0x12,0x10,0x09,0x05,0xff,0xf0,0xa1,0x9a,0xa8,0x00,0x05,0xff,0xf0,0xa1,0x9b,0xaa, ++ 0x00,0x10,0x08,0x05,0xff,0xe5,0xa7,0xac,0x00,0x05,0xff,0xe5,0xa8,0x9b,0x00,0xd1, ++ 0x10,0x10,0x08,0x05,0xff,0xe5,0xa8,0xa7,0x00,0x05,0xff,0xe5,0xa7,0x98,0x00,0x10, ++ 0x08,0x05,0xff,0xe5,0xa9,0xa6,0x00,0x05,0xff,0xe3,0x9b,0xae,0x00,0xd2,0x18,0x91, ++ 0x10,0x10,0x08,0x05,0xff,0xe3,0x9b,0xbc,0x00,0x05,0xff,0xe5,0xac,0x88,0x00,0x05, ++ 0xff,0xe5,0xac,0xbe,0x00,0xd1,0x11,0x10,0x09,0x05,0xff,0xf0,0xa1,0xa7,0x88,0x00, ++ 0x05,0xff,0xe5,0xaf,0x83,0x00,0x10,0x08,0x05,0xff,0xe5,0xaf,0x98,0x00,0x05,0xff, ++ 0xe5,0xaf,0xa7,0x00,0xd3,0x41,0xd2,0x21,0xd1,0x11,0x10,0x08,0x05,0xff,0xe5,0xaf, ++ 0xb3,0x00,0x05,0xff,0xf0,0xa1,0xac,0x98,0x00,0x10,0x08,0x05,0xff,0xe5,0xaf,0xbf, ++ 0x00,0x05,0xff,0xe5,0xb0,0x86,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0xbd,0x93, ++ 0x00,0x05,0xff,0xe5,0xb0,0xa2,0x00,0x10,0x08,0x05,0xff,0xe3,0x9e,0x81,0x00,0x05, ++ 0xff,0xe5,0xb1,0xa0,0x00,0xd2,0x21,0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0xb1,0xae, ++ 0x00,0x05,0xff,0xe5,0xb3,0x80,0x00,0x10,0x08,0x05,0xff,0xe5,0xb2,0x8d,0x00,0x05, ++ 0xff,0xf0,0xa1,0xb7,0xa4,0x00,0xd1,0x11,0x10,0x08,0x05,0xff,0xe5,0xb5,0x83,0x00, ++ 0x05,0xff,0xf0,0xa1,0xb7,0xa6,0x00,0x10,0x08,0x05,0xff,0xe5,0xb5,0xae,0x00,0x05, ++ 0xff,0xe5,0xb5,0xab,0x00,0xe0,0x04,0x02,0xcf,0x86,0xd5,0xfe,0xd4,0x82,0xd3,0x40, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0xb5,0xbc,0x00,0x05,0xff,0xe5,0xb7, ++ 0xa1,0x00,0x10,0x08,0x05,0xff,0xe5,0xb7,0xa2,0x00,0x05,0xff,0xe3,0xa0,0xaf,0x00, ++ 0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0xb7,0xbd,0x00,0x05,0xff,0xe5,0xb8,0xa8,0x00, ++ 0x10,0x08,0x05,0xff,0xe5,0xb8,0xbd,0x00,0x05,0xff,0xe5,0xb9,0xa9,0x00,0xd2,0x21, ++ 0xd1,0x11,0x10,0x08,0x05,0xff,0xe3,0xa1,0xa2,0x00,0x05,0xff,0xf0,0xa2,0x86,0x83, ++ 0x00,0x10,0x08,0x05,0xff,0xe3,0xa1,0xbc,0x00,0x05,0xff,0xe5,0xba,0xb0,0x00,0xd1, ++ 0x10,0x10,0x08,0x05,0xff,0xe5,0xba,0xb3,0x00,0x05,0xff,0xe5,0xba,0xb6,0x00,0x10, ++ 0x08,0x05,0xff,0xe5,0xbb,0x8a,0x00,0x05,0xff,0xf0,0xaa,0x8e,0x92,0x00,0xd3,0x3b, ++ 0xd2,0x22,0xd1,0x11,0x10,0x08,0x05,0xff,0xe5,0xbb,0xbe,0x00,0x05,0xff,0xf0,0xa2, ++ 0x8c,0xb1,0x00,0x10,0x09,0x05,0xff,0xf0,0xa2,0x8c,0xb1,0x00,0x05,0xff,0xe8,0x88, ++ 0x81,0x00,0x51,0x08,0x05,0xff,0xe5,0xbc,0xa2,0x00,0x10,0x08,0x05,0xff,0xe3,0xa3, ++ 0x87,0x00,0x05,0xff,0xf0,0xa3,0x8a,0xb8,0x00,0xd2,0x21,0xd1,0x11,0x10,0x09,0x05, ++ 0xff,0xf0,0xa6,0x87,0x9a,0x00,0x05,0xff,0xe5,0xbd,0xa2,0x00,0x10,0x08,0x05,0xff, ++ 0xe5,0xbd,0xab,0x00,0x05,0xff,0xe3,0xa3,0xa3,0x00,0xd1,0x10,0x10,0x08,0x05,0xff, ++ 0xe5,0xbe,0x9a,0x00,0x05,0xff,0xe5,0xbf,0x8d,0x00,0x10,0x08,0x05,0xff,0xe5,0xbf, ++ 0x97,0x00,0x05,0xff,0xe5,0xbf,0xb9,0x00,0xd4,0x81,0xd3,0x41,0xd2,0x20,0xd1,0x10, ++ 0x10,0x08,0x05,0xff,0xe6,0x82,0x81,0x00,0x05,0xff,0xe3,0xa4,0xba,0x00,0x10,0x08, ++ 0x05,0xff,0xe3,0xa4,0x9c,0x00,0x05,0xff,0xe6,0x82,0x94,0x00,0xd1,0x11,0x10,0x09, ++ 0x05,0xff,0xf0,0xa2,0x9b,0x94,0x00,0x05,0xff,0xe6,0x83,0x87,0x00,0x10,0x08,0x05, ++ 0xff,0xe6,0x85,0x88,0x00,0x05,0xff,0xe6,0x85,0x8c,0x00,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x05,0xff,0xe6,0x85,0x8e,0x00,0x05,0xff,0xe6,0x85,0x8c,0x00,0x10,0x08,0x05, ++ 0xff,0xe6,0x85,0xba,0x00,0x05,0xff,0xe6,0x86,0x8e,0x00,0xd1,0x10,0x10,0x08,0x05, ++ 0xff,0xe6,0x86,0xb2,0x00,0x05,0xff,0xe6,0x86,0xa4,0x00,0x10,0x08,0x05,0xff,0xe6, ++ 0x86,0xaf,0x00,0x05,0xff,0xe6,0x87,0x9e,0x00,0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10, ++ 0x08,0x05,0xff,0xe6,0x87,0xb2,0x00,0x05,0xff,0xe6,0x87,0xb6,0x00,0x10,0x08,0x05, ++ 0xff,0xe6,0x88,0x90,0x00,0x05,0xff,0xe6,0x88,0x9b,0x00,0xd1,0x10,0x10,0x08,0x05, ++ 0xff,0xe6,0x89,0x9d,0x00,0x05,0xff,0xe6,0x8a,0xb1,0x00,0x10,0x08,0x05,0xff,0xe6, ++ 0x8b,0x94,0x00,0x05,0xff,0xe6,0x8d,0x90,0x00,0xd2,0x21,0xd1,0x11,0x10,0x09,0x05, ++ 0xff,0xf0,0xa2,0xac,0x8c,0x00,0x05,0xff,0xe6,0x8c,0xbd,0x00,0x10,0x08,0x05,0xff, ++ 0xe6,0x8b,0xbc,0x00,0x05,0xff,0xe6,0x8d,0xa8,0x00,0xd1,0x10,0x10,0x08,0x05,0xff, ++ 0xe6,0x8e,0x83,0x00,0x05,0xff,0xe6,0x8f,0xa4,0x00,0x10,0x09,0x05,0xff,0xf0,0xa2, ++ 0xaf,0xb1,0x00,0x05,0xff,0xe6,0x90,0xa2,0x00,0xcf,0x86,0xe5,0x03,0x01,0xd4,0x81, ++ 0xd3,0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0x8f,0x85,0x00,0x05,0xff, ++ 0xe6,0x8e,0xa9,0x00,0x10,0x08,0x05,0xff,0xe3,0xa8,0xae,0x00,0x05,0xff,0xe6,0x91, ++ 0xa9,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0x91,0xbe,0x00,0x05,0xff,0xe6,0x92, ++ 0x9d,0x00,0x10,0x08,0x05,0xff,0xe6,0x91,0xb7,0x00,0x05,0xff,0xe3,0xa9,0xac,0x00, ++ 0xd2,0x21,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0x95,0x8f,0x00,0x05,0xff,0xe6,0x95, ++ 0xac,0x00,0x10,0x09,0x05,0xff,0xf0,0xa3,0x80,0x8a,0x00,0x05,0xff,0xe6,0x97,0xa3, ++ 0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0x9b,0xb8,0x00,0x05,0xff,0xe6,0x99,0x89, ++ 0x00,0x10,0x08,0x05,0xff,0xe3,0xac,0x99,0x00,0x05,0xff,0xe6,0x9a,0x91,0x00,0xd3, ++ 0x40,0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe3,0xac,0x88,0x00,0x05,0xff,0xe3, ++ 0xab,0xa4,0x00,0x10,0x08,0x05,0xff,0xe5,0x86,0x92,0x00,0x05,0xff,0xe5,0x86,0x95, ++ 0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0x9c,0x80,0x00,0x05,0xff,0xe6,0x9a,0x9c, ++ 0x00,0x10,0x08,0x05,0xff,0xe8,0x82,0xad,0x00,0x05,0xff,0xe4,0x8f,0x99,0x00,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0x9c,0x97,0x00,0x05,0xff,0xe6,0x9c,0x9b, ++ 0x00,0x10,0x08,0x05,0xff,0xe6,0x9c,0xa1,0x00,0x05,0xff,0xe6,0x9d,0x9e,0x00,0xd1, ++ 0x11,0x10,0x08,0x05,0xff,0xe6,0x9d,0x93,0x00,0x05,0xff,0xf0,0xa3,0x8f,0x83,0x00, ++ 0x10,0x08,0x05,0xff,0xe3,0xad,0x89,0x00,0x05,0xff,0xe6,0x9f,0xba,0x00,0xd4,0x82, ++ 0xd3,0x41,0xd2,0x21,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0x9e,0x85,0x00,0x05,0xff, ++ 0xe6,0xa1,0x92,0x00,0x10,0x08,0x05,0xff,0xe6,0xa2,0x85,0x00,0x05,0xff,0xf0,0xa3, ++ 0x91,0xad,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0xa2,0x8e,0x00,0x05,0xff,0xe6, ++ 0xa0,0x9f,0x00,0x10,0x08,0x05,0xff,0xe6,0xa4,0x94,0x00,0x05,0xff,0xe3,0xae,0x9d, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0xa5,0x82,0x00,0x05,0xff,0xe6, ++ 0xa6,0xa3,0x00,0x10,0x08,0x05,0xff,0xe6,0xa7,0xaa,0x00,0x05,0xff,0xe6,0xaa,0xa8, ++ 0x00,0xd1,0x11,0x10,0x09,0x05,0xff,0xf0,0xa3,0x9a,0xa3,0x00,0x05,0xff,0xe6,0xab, ++ 0x9b,0x00,0x10,0x08,0x05,0xff,0xe3,0xb0,0x98,0x00,0x05,0xff,0xe6,0xac,0xa1,0x00, ++ 0xd3,0x42,0xd2,0x21,0xd1,0x11,0x10,0x09,0x05,0xff,0xf0,0xa3,0xa2,0xa7,0x00,0x05, ++ 0xff,0xe6,0xad,0x94,0x00,0x10,0x08,0x05,0xff,0xe3,0xb1,0x8e,0x00,0x05,0xff,0xe6, ++ 0xad,0xb2,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0xae,0x9f,0x00,0x05,0xff,0xe6, ++ 0xae,0xba,0x00,0x10,0x08,0x05,0xff,0xe6,0xae,0xbb,0x00,0x05,0xff,0xf0,0xa3,0xaa, ++ 0x8d,0x00,0xd2,0x23,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa1,0xb4,0x8b,0x00,0x05, ++ 0xff,0xf0,0xa3,0xab,0xba,0x00,0x10,0x08,0x05,0xff,0xe6,0xb1,0x8e,0x00,0x05,0xff, ++ 0xf0,0xa3,0xb2,0xbc,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0xb2,0xbf,0x00,0x05, ++ 0xff,0xe6,0xb3,0x8d,0x00,0x10,0x08,0x05,0xff,0xe6,0xb1,0xa7,0x00,0x05,0xff,0xe6, ++ 0xb4,0x96,0x00,0xe1,0x1d,0x04,0xe0,0x0c,0x02,0xcf,0x86,0xe5,0x08,0x01,0xd4,0x82, ++ 0xd3,0x41,0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0xb4,0xbe,0x00,0x05,0xff, ++ 0xe6,0xb5,0xb7,0x00,0x10,0x08,0x05,0xff,0xe6,0xb5,0x81,0x00,0x05,0xff,0xe6,0xb5, ++ 0xa9,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0xb5,0xb8,0x00,0x05,0xff,0xe6,0xb6, ++ 0x85,0x00,0x10,0x09,0x05,0xff,0xf0,0xa3,0xb4,0x9e,0x00,0x05,0xff,0xe6,0xb4,0xb4, ++ 0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe6,0xb8,0xaf,0x00,0x05,0xff,0xe6, ++ 0xb9,0xae,0x00,0x10,0x08,0x05,0xff,0xe3,0xb4,0xb3,0x00,0x05,0xff,0xe6,0xbb,0x8b, ++ 0x00,0xd1,0x11,0x10,0x08,0x05,0xff,0xe6,0xbb,0x87,0x00,0x05,0xff,0xf0,0xa3,0xbb, ++ 0x91,0x00,0x10,0x08,0x05,0xff,0xe6,0xb7,0xb9,0x00,0x05,0xff,0xe6,0xbd,0xae,0x00, ++ 0xd3,0x42,0xd2,0x22,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa3,0xbd,0x9e,0x00,0x05, ++ 0xff,0xf0,0xa3,0xbe,0x8e,0x00,0x10,0x08,0x05,0xff,0xe6,0xbf,0x86,0x00,0x05,0xff, ++ 0xe7,0x80,0xb9,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe7,0x80,0x9e,0x00,0x05,0xff, ++ 0xe7,0x80,0x9b,0x00,0x10,0x08,0x05,0xff,0xe3,0xb6,0x96,0x00,0x05,0xff,0xe7,0x81, ++ 0x8a,0x00,0xd2,0x21,0xd1,0x10,0x10,0x08,0x05,0xff,0xe7,0x81,0xbd,0x00,0x05,0xff, ++ 0xe7,0x81,0xb7,0x00,0x10,0x08,0x05,0xff,0xe7,0x82,0xad,0x00,0x05,0xff,0xf0,0xa0, ++ 0x94,0xa5,0x00,0xd1,0x11,0x10,0x08,0x05,0xff,0xe7,0x85,0x85,0x00,0x05,0xff,0xf0, ++ 0xa4,0x89,0xa3,0x00,0x10,0x08,0x05,0xff,0xe7,0x86,0x9c,0x00,0x05,0xff,0xf0,0xa4, ++ 0x8e,0xab,0x00,0xd4,0x7b,0xd3,0x43,0xd2,0x21,0xd1,0x10,0x10,0x08,0x05,0xff,0xe7, ++ 0x88,0xa8,0x00,0x05,0xff,0xe7,0x88,0xb5,0x00,0x10,0x08,0x05,0xff,0xe7,0x89,0x90, ++ 0x00,0x05,0xff,0xf0,0xa4,0x98,0x88,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe7,0x8a, ++ 0x80,0x00,0x05,0xff,0xe7,0x8a,0x95,0x00,0x10,0x09,0x05,0xff,0xf0,0xa4,0x9c,0xb5, ++ 0x00,0x05,0xff,0xf0,0xa4,0xa0,0x94,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff, ++ 0xe7,0x8d,0xba,0x00,0x05,0xff,0xe7,0x8e,0x8b,0x00,0x10,0x08,0x05,0xff,0xe3,0xba, ++ 0xac,0x00,0x05,0xff,0xe7,0x8e,0xa5,0x00,0x51,0x08,0x05,0xff,0xe3,0xba,0xb8,0x00, ++ 0x10,0x08,0x05,0xff,0xe7,0x91,0x87,0x00,0x05,0xff,0xe7,0x91,0x9c,0x00,0xd3,0x42, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe7,0x91,0xb1,0x00,0x05,0xff,0xe7,0x92, ++ 0x85,0x00,0x10,0x08,0x05,0xff,0xe7,0x93,0x8a,0x00,0x05,0xff,0xe3,0xbc,0x9b,0x00, ++ 0xd1,0x11,0x10,0x08,0x05,0xff,0xe7,0x94,0xa4,0x00,0x05,0xff,0xf0,0xa4,0xb0,0xb6, ++ 0x00,0x10,0x08,0x05,0xff,0xe7,0x94,0xbe,0x00,0x05,0xff,0xf0,0xa4,0xb2,0x92,0x00, ++ 0xd2,0x22,0xd1,0x11,0x10,0x08,0x05,0xff,0xe7,0x95,0xb0,0x00,0x05,0xff,0xf0,0xa2, ++ 0x86,0x9f,0x00,0x10,0x08,0x05,0xff,0xe7,0x98,0x90,0x00,0x05,0xff,0xf0,0xa4,0xbe, ++ 0xa1,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa4,0xbe,0xb8,0x00,0x05,0xff,0xf0, ++ 0xa5,0x81,0x84,0x00,0x10,0x08,0x05,0xff,0xe3,0xbf,0xbc,0x00,0x05,0xff,0xe4,0x80, ++ 0x88,0x00,0xcf,0x86,0xe5,0x04,0x01,0xd4,0x7d,0xd3,0x3c,0xd2,0x23,0xd1,0x11,0x10, ++ 0x08,0x05,0xff,0xe7,0x9b,0xb4,0x00,0x05,0xff,0xf0,0xa5,0x83,0xb3,0x00,0x10,0x09, ++ 0x05,0xff,0xf0,0xa5,0x83,0xb2,0x00,0x05,0xff,0xf0,0xa5,0x84,0x99,0x00,0x91,0x11, ++ 0x10,0x09,0x05,0xff,0xf0,0xa5,0x84,0xb3,0x00,0x05,0xff,0xe7,0x9c,0x9e,0x00,0x05, ++ 0xff,0xe7,0x9c,0x9f,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe7,0x9d,0x8a, ++ 0x00,0x05,0xff,0xe4,0x80,0xb9,0x00,0x10,0x08,0x05,0xff,0xe7,0x9e,0x8b,0x00,0x05, ++ 0xff,0xe4,0x81,0x86,0x00,0xd1,0x11,0x10,0x08,0x05,0xff,0xe4,0x82,0x96,0x00,0x05, ++ 0xff,0xf0,0xa5,0x90,0x9d,0x00,0x10,0x08,0x05,0xff,0xe7,0xa1,0x8e,0x00,0x05,0xff, ++ 0xe7,0xa2,0x8c,0x00,0xd3,0x43,0xd2,0x21,0xd1,0x10,0x10,0x08,0x05,0xff,0xe7,0xa3, ++ 0x8c,0x00,0x05,0xff,0xe4,0x83,0xa3,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0x98,0xa6, ++ 0x00,0x05,0xff,0xe7,0xa5,0x96,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0x9a, ++ 0x9a,0x00,0x05,0xff,0xf0,0xa5,0x9b,0x85,0x00,0x10,0x08,0x05,0xff,0xe7,0xa6,0x8f, ++ 0x00,0x05,0xff,0xe7,0xa7,0xab,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe4, ++ 0x84,0xaf,0x00,0x05,0xff,0xe7,0xa9,0x80,0x00,0x10,0x08,0x05,0xff,0xe7,0xa9,0x8a, ++ 0x00,0x05,0xff,0xe7,0xa9,0x8f,0x00,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa5,0xa5, ++ 0xbc,0x00,0x05,0xff,0xf0,0xa5,0xaa,0xa7,0x00,0x10,0x09,0x05,0xff,0xf0,0xa5,0xaa, ++ 0xa7,0x00,0x05,0xff,0xe7,0xab,0xae,0x00,0xd4,0x83,0xd3,0x42,0xd2,0x21,0xd1,0x11, ++ 0x10,0x08,0x05,0xff,0xe4,0x88,0x82,0x00,0x05,0xff,0xf0,0xa5,0xae,0xab,0x00,0x10, ++ 0x08,0x05,0xff,0xe7,0xaf,0x86,0x00,0x05,0xff,0xe7,0xaf,0x89,0x00,0xd1,0x11,0x10, ++ 0x08,0x05,0xff,0xe4,0x88,0xa7,0x00,0x05,0xff,0xf0,0xa5,0xb2,0x80,0x00,0x10,0x08, ++ 0x05,0xff,0xe7,0xb3,0x92,0x00,0x05,0xff,0xe4,0x8a,0xa0,0x00,0xd2,0x21,0xd1,0x10, ++ 0x10,0x08,0x05,0xff,0xe7,0xb3,0xa8,0x00,0x05,0xff,0xe7,0xb3,0xa3,0x00,0x10,0x08, ++ 0x05,0xff,0xe7,0xb4,0x80,0x00,0x05,0xff,0xf0,0xa5,0xbe,0x86,0x00,0xd1,0x10,0x10, ++ 0x08,0x05,0xff,0xe7,0xb5,0xa3,0x00,0x05,0xff,0xe4,0x8c,0x81,0x00,0x10,0x08,0x05, ++ 0xff,0xe7,0xb7,0x87,0x00,0x05,0xff,0xe7,0xb8,0x82,0x00,0xd3,0x44,0xd2,0x22,0xd1, ++ 0x10,0x10,0x08,0x05,0xff,0xe7,0xb9,0x85,0x00,0x05,0xff,0xe4,0x8c,0xb4,0x00,0x10, ++ 0x09,0x05,0xff,0xf0,0xa6,0x88,0xa8,0x00,0x05,0xff,0xf0,0xa6,0x89,0x87,0x00,0xd1, ++ 0x11,0x10,0x08,0x05,0xff,0xe4,0x8d,0x99,0x00,0x05,0xff,0xf0,0xa6,0x8b,0x99,0x00, ++ 0x10,0x08,0x05,0xff,0xe7,0xbd,0xba,0x00,0x05,0xff,0xf0,0xa6,0x8c,0xbe,0x00,0xd2, ++ 0x21,0xd1,0x10,0x10,0x08,0x05,0xff,0xe7,0xbe,0x95,0x00,0x05,0xff,0xe7,0xbf,0xba, ++ 0x00,0x10,0x08,0x05,0xff,0xe8,0x80,0x85,0x00,0x05,0xff,0xf0,0xa6,0x93,0x9a,0x00, ++ 0xd1,0x11,0x10,0x09,0x05,0xff,0xf0,0xa6,0x94,0xa3,0x00,0x05,0xff,0xe8,0x81,0xa0, ++ 0x00,0x10,0x09,0x05,0xff,0xf0,0xa6,0x96,0xa8,0x00,0x05,0xff,0xe8,0x81,0xb0,0x00, ++ 0xe0,0x11,0x02,0xcf,0x86,0xe5,0x07,0x01,0xd4,0x85,0xd3,0x42,0xd2,0x21,0xd1,0x11, ++ 0x10,0x09,0x05,0xff,0xf0,0xa3,0x8d,0x9f,0x00,0x05,0xff,0xe4,0x8f,0x95,0x00,0x10, ++ 0x08,0x05,0xff,0xe8,0x82,0xb2,0x00,0x05,0xff,0xe8,0x84,0x83,0x00,0xd1,0x10,0x10, ++ 0x08,0x05,0xff,0xe4,0x90,0x8b,0x00,0x05,0xff,0xe8,0x84,0xbe,0x00,0x10,0x08,0x05, ++ 0xff,0xe5,0xaa,0xb5,0x00,0x05,0xff,0xf0,0xa6,0x9e,0xa7,0x00,0xd2,0x23,0xd1,0x12, ++ 0x10,0x09,0x05,0xff,0xf0,0xa6,0x9e,0xb5,0x00,0x05,0xff,0xf0,0xa3,0x8e,0x93,0x00, ++ 0x10,0x09,0x05,0xff,0xf0,0xa3,0x8e,0x9c,0x00,0x05,0xff,0xe8,0x88,0x81,0x00,0xd1, ++ 0x10,0x10,0x08,0x05,0xff,0xe8,0x88,0x84,0x00,0x05,0xff,0xe8,0xbe,0x9e,0x00,0x10, ++ 0x08,0x05,0xff,0xe4,0x91,0xab,0x00,0x05,0xff,0xe8,0x8a,0x91,0x00,0xd3,0x41,0xd2, ++ 0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x8a,0x8b,0x00,0x05,0xff,0xe8,0x8a,0x9d, ++ 0x00,0x10,0x08,0x05,0xff,0xe5,0x8a,0xb3,0x00,0x05,0xff,0xe8,0x8a,0xb1,0x00,0xd1, ++ 0x10,0x10,0x08,0x05,0xff,0xe8,0x8a,0xb3,0x00,0x05,0xff,0xe8,0x8a,0xbd,0x00,0x10, ++ 0x08,0x05,0xff,0xe8,0x8b,0xa6,0x00,0x05,0xff,0xf0,0xa6,0xac,0xbc,0x00,0xd2,0x20, ++ 0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x8b,0xa5,0x00,0x05,0xff,0xe8,0x8c,0x9d,0x00, ++ 0x10,0x08,0x05,0xff,0xe8,0x8d,0xa3,0x00,0x05,0xff,0xe8,0x8e,0xad,0x00,0xd1,0x10, ++ 0x10,0x08,0x05,0xff,0xe8,0x8c,0xa3,0x00,0x05,0xff,0xe8,0x8e,0xbd,0x00,0x10,0x08, ++ 0x05,0xff,0xe8,0x8f,0xa7,0x00,0x05,0xff,0xe8,0x91,0x97,0x00,0xd4,0x85,0xd3,0x43, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x8d,0x93,0x00,0x05,0xff,0xe8,0x8f, ++ 0x8a,0x00,0x10,0x08,0x05,0xff,0xe8,0x8f,0x8c,0x00,0x05,0xff,0xe8,0x8f,0x9c,0x00, ++ 0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa6,0xb0,0xb6,0x00,0x05,0xff,0xf0,0xa6,0xb5, ++ 0xab,0x00,0x10,0x09,0x05,0xff,0xf0,0xa6,0xb3,0x95,0x00,0x05,0xff,0xe4,0x94,0xab, ++ 0x00,0xd2,0x21,0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x93,0xb1,0x00,0x05,0xff,0xe8, ++ 0x93,0xb3,0x00,0x10,0x08,0x05,0xff,0xe8,0x94,0x96,0x00,0x05,0xff,0xf0,0xa7,0x8f, ++ 0x8a,0x00,0xd1,0x11,0x10,0x08,0x05,0xff,0xe8,0x95,0xa4,0x00,0x05,0xff,0xf0,0xa6, ++ 0xbc,0xac,0x00,0x10,0x08,0x05,0xff,0xe4,0x95,0x9d,0x00,0x05,0xff,0xe4,0x95,0xa1, ++ 0x00,0xd3,0x42,0xd2,0x22,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa6,0xbe,0xb1,0x00, ++ 0x05,0xff,0xf0,0xa7,0x83,0x92,0x00,0x10,0x08,0x05,0xff,0xe4,0x95,0xab,0x00,0x05, ++ 0xff,0xe8,0x99,0x90,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x99,0x9c,0x00,0x05, ++ 0xff,0xe8,0x99,0xa7,0x00,0x10,0x08,0x05,0xff,0xe8,0x99,0xa9,0x00,0x05,0xff,0xe8, ++ 0x9a,0xa9,0x00,0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x9a,0x88,0x00,0x05, ++ 0xff,0xe8,0x9c,0x8e,0x00,0x10,0x08,0x05,0xff,0xe8,0x9b,0xa2,0x00,0x05,0xff,0xe8, ++ 0x9d,0xb9,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe8,0x9c,0xa8,0x00,0x05,0xff,0xe8, ++ 0x9d,0xab,0x00,0x10,0x08,0x05,0xff,0xe8,0x9e,0x86,0x00,0x05,0xff,0xe4,0x97,0x97, ++ 0x00,0xcf,0x86,0xe5,0x08,0x01,0xd4,0x83,0xd3,0x41,0xd2,0x20,0xd1,0x10,0x10,0x08, ++ 0x05,0xff,0xe8,0x9f,0xa1,0x00,0x05,0xff,0xe8,0xa0,0x81,0x00,0x10,0x08,0x05,0xff, ++ 0xe4,0x97,0xb9,0x00,0x05,0xff,0xe8,0xa1,0xa0,0x00,0xd1,0x11,0x10,0x08,0x05,0xff, ++ 0xe8,0xa1,0xa3,0x00,0x05,0xff,0xf0,0xa7,0x99,0xa7,0x00,0x10,0x08,0x05,0xff,0xe8, ++ 0xa3,0x97,0x00,0x05,0xff,0xe8,0xa3,0x9e,0x00,0xd2,0x21,0xd1,0x10,0x10,0x08,0x05, ++ 0xff,0xe4,0x98,0xb5,0x00,0x05,0xff,0xe8,0xa3,0xba,0x00,0x10,0x08,0x05,0xff,0xe3, ++ 0x92,0xbb,0x00,0x05,0xff,0xf0,0xa7,0xa2,0xae,0x00,0xd1,0x11,0x10,0x09,0x05,0xff, ++ 0xf0,0xa7,0xa5,0xa6,0x00,0x05,0xff,0xe4,0x9a,0xbe,0x00,0x10,0x08,0x05,0xff,0xe4, ++ 0x9b,0x87,0x00,0x05,0xff,0xe8,0xaa,0xa0,0x00,0xd3,0x41,0xd2,0x21,0xd1,0x10,0x10, ++ 0x08,0x05,0xff,0xe8,0xab,0xad,0x00,0x05,0xff,0xe8,0xae,0x8a,0x00,0x10,0x08,0x05, ++ 0xff,0xe8,0xb1,0x95,0x00,0x05,0xff,0xf0,0xa7,0xb2,0xa8,0x00,0xd1,0x10,0x10,0x08, ++ 0x05,0xff,0xe8,0xb2,0xab,0x00,0x05,0xff,0xe8,0xb3,0x81,0x00,0x10,0x08,0x05,0xff, ++ 0xe8,0xb4,0x9b,0x00,0x05,0xff,0xe8,0xb5,0xb7,0x00,0xd2,0x22,0xd1,0x12,0x10,0x09, ++ 0x05,0xff,0xf0,0xa7,0xbc,0xaf,0x00,0x05,0xff,0xf0,0xa0,0xa0,0x84,0x00,0x10,0x08, ++ 0x05,0xff,0xe8,0xb7,0x8b,0x00,0x05,0xff,0xe8,0xb6,0xbc,0x00,0xd1,0x11,0x10,0x08, ++ 0x05,0xff,0xe8,0xb7,0xb0,0x00,0x05,0xff,0xf0,0xa0,0xa3,0x9e,0x00,0x10,0x08,0x05, ++ 0xff,0xe8,0xbb,0x94,0x00,0x05,0xff,0xe8,0xbc,0xb8,0x00,0xd4,0x84,0xd3,0x43,0xd2, ++ 0x22,0xd1,0x12,0x10,0x09,0x05,0xff,0xf0,0xa8,0x97,0x92,0x00,0x05,0xff,0xf0,0xa8, ++ 0x97,0xad,0x00,0x10,0x08,0x05,0xff,0xe9,0x82,0x94,0x00,0x05,0xff,0xe9,0x83,0xb1, ++ 0x00,0xd1,0x11,0x10,0x08,0x05,0xff,0xe9,0x84,0x91,0x00,0x05,0xff,0xf0,0xa8,0x9c, ++ 0xae,0x00,0x10,0x08,0x05,0xff,0xe9,0x84,0x9b,0x00,0x05,0xff,0xe9,0x88,0xb8,0x00, ++ 0xd2,0x20,0xd1,0x10,0x10,0x08,0x05,0xff,0xe9,0x8b,0x97,0x00,0x05,0xff,0xe9,0x8b, ++ 0x98,0x00,0x10,0x08,0x05,0xff,0xe9,0x89,0xbc,0x00,0x05,0xff,0xe9,0x8f,0xb9,0x00, ++ 0xd1,0x11,0x10,0x08,0x05,0xff,0xe9,0x90,0x95,0x00,0x05,0xff,0xf0,0xa8,0xaf,0xba, ++ 0x00,0x10,0x08,0x05,0xff,0xe9,0x96,0x8b,0x00,0x05,0xff,0xe4,0xa6,0x95,0x00,0xd3, ++ 0x43,0xd2,0x21,0xd1,0x11,0x10,0x08,0x05,0xff,0xe9,0x96,0xb7,0x00,0x05,0xff,0xf0, ++ 0xa8,0xb5,0xb7,0x00,0x10,0x08,0x05,0xff,0xe4,0xa7,0xa6,0x00,0x05,0xff,0xe9,0x9b, ++ 0x83,0x00,0xd1,0x10,0x10,0x08,0x05,0xff,0xe5,0xb6,0xb2,0x00,0x05,0xff,0xe9,0x9c, ++ 0xa3,0x00,0x10,0x09,0x05,0xff,0xf0,0xa9,0x85,0x85,0x00,0x05,0xff,0xf0,0xa9,0x88, ++ 0x9a,0x00,0xd2,0x21,0xd1,0x10,0x10,0x08,0x05,0xff,0xe4,0xa9,0xae,0x00,0x05,0xff, ++ 0xe4,0xa9,0xb6,0x00,0x10,0x08,0x05,0xff,0xe9,0x9f,0xa0,0x00,0x05,0xff,0xf0,0xa9, ++ 0x90,0x8a,0x00,0x91,0x11,0x10,0x08,0x05,0xff,0xe4,0xaa,0xb2,0x00,0x05,0xff,0xf0, ++ 0xa9,0x92,0x96,0x00,0x05,0xff,0xe9,0xa0,0x8b,0x00,0xe2,0x10,0x01,0xe1,0x09,0x01, ++ 0xe0,0x02,0x01,0xcf,0x86,0x95,0xfb,0xd4,0x82,0xd3,0x41,0xd2,0x21,0xd1,0x11,0x10, ++ 0x08,0x05,0xff,0xe9,0xa0,0xa9,0x00,0x05,0xff,0xf0,0xa9,0x96,0xb6,0x00,0x10,0x08, ++ 0x05,0xff,0xe9,0xa3,0xa2,0x00,0x05,0xff,0xe4,0xac,0xb3,0x00,0xd1,0x10,0x10,0x08, ++ 0x05,0xff,0xe9,0xa4,0xa9,0x00,0x05,0xff,0xe9,0xa6,0xa7,0x00,0x10,0x08,0x05,0xff, ++ 0xe9,0xa7,0x82,0x00,0x05,0xff,0xe9,0xa7,0xbe,0x00,0xd2,0x21,0xd1,0x11,0x10,0x08, ++ 0x05,0xff,0xe4,0xaf,0x8e,0x00,0x05,0xff,0xf0,0xa9,0xac,0xb0,0x00,0x10,0x08,0x05, ++ 0xff,0xe9,0xac,0x92,0x00,0x05,0xff,0xe9,0xb1,0x80,0x00,0xd1,0x10,0x10,0x08,0x05, ++ 0xff,0xe9,0xb3,0xbd,0x00,0x05,0xff,0xe4,0xb3,0x8e,0x00,0x10,0x08,0x05,0xff,0xe4, ++ 0xb3,0xad,0x00,0x05,0xff,0xe9,0xb5,0xa7,0x00,0xd3,0x44,0xd2,0x23,0xd1,0x11,0x10, ++ 0x09,0x05,0xff,0xf0,0xaa,0x83,0x8e,0x00,0x05,0xff,0xe4,0xb3,0xb8,0x00,0x10,0x09, ++ 0x05,0xff,0xf0,0xaa,0x84,0x85,0x00,0x05,0xff,0xf0,0xaa,0x88,0x8e,0x00,0xd1,0x11, ++ 0x10,0x09,0x05,0xff,0xf0,0xaa,0x8a,0x91,0x00,0x05,0xff,0xe9,0xba,0xbb,0x00,0x10, ++ 0x08,0x05,0xff,0xe4,0xb5,0x96,0x00,0x05,0xff,0xe9,0xbb,0xb9,0x00,0xd2,0x20,0xd1, ++ 0x10,0x10,0x08,0x05,0xff,0xe9,0xbb,0xbe,0x00,0x05,0xff,0xe9,0xbc,0x85,0x00,0x10, ++ 0x08,0x05,0xff,0xe9,0xbc,0x8f,0x00,0x05,0xff,0xe9,0xbc,0x96,0x00,0x91,0x11,0x10, ++ 0x08,0x05,0xff,0xe9,0xbc,0xbb,0x00,0x05,0xff,0xf0,0xaa,0x98,0x80,0x00,0x00,0x00, ++ 0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xcf,0x06,0x00,0x00,0xd3,0x06, ++ 0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00, ++ 0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00,0x00, ++ 0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02,0x00,0xd3,0x08, ++ 0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd1,0x08, ++ 0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86, ++ 0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x06,0xcf,0x06, ++ 0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x06, ++ 0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00,0x00,0x53,0x04, ++ 0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02,0x00,0xcf,0x86,0xd5,0xc0, ++ 0xd4,0x60,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf,0x06, ++ 0x00,0x00,0xd1,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06, ++ 0x00,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00,0x00, ++ 0xd3,0x06,0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf,0x06, ++ 0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04, ++ 0x00,0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02,0x00, ++ 0xd3,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00, ++ 0xd1,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00, ++ 0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x06, ++ 0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00, ++ 0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00,0x00, ++ 0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02,0x00,0xd4,0x60, ++ 0xd3,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00, ++ 0xd1,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00, ++ 0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x06, ++ 0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00, ++ 0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00,0x00, ++ 0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02,0x00,0xd3,0x08, ++ 0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd1,0x08, ++ 0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86, ++ 0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x06,0xcf,0x06, ++ 0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x06, ++ 0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00,0x00,0x53,0x04, ++ 0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02,0x00,0xe0,0x83,0x01,0xcf, ++ 0x86,0xd5,0xc0,0xd4,0x60,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf, ++ 0x86,0xcf,0x06,0x00,0x00,0xd1,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf, ++ 0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf, ++ 0x06,0x00,0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1, ++ 0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00, ++ 0x00,0x54,0x04,0x00,0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00, ++ 0x00,0x02,0x00,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf, ++ 0x06,0x00,0x00,0xd1,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf, ++ 0x06,0x00,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00, ++ 0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf, ++ 0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54, ++ 0x04,0x00,0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02, ++ 0x00,0xd4,0x60,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf, ++ 0x06,0x00,0x00,0xd1,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf, ++ 0x06,0x00,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00, ++ 0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf, ++ 0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54, ++ 0x04,0x00,0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02, ++ 0x00,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf,0x06,0x00, ++ 0x00,0xd1,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00, ++ 0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3, ++ 0x06,0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00, ++ 0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00, ++ 0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02,0x00,0xcf, ++ 0x86,0xd5,0xc0,0xd4,0x60,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf, ++ 0x86,0xcf,0x06,0x00,0x00,0xd1,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf, ++ 0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf, ++ 0x06,0x00,0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1, ++ 0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00, ++ 0x00,0x54,0x04,0x00,0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00, ++ 0x00,0x02,0x00,0xd3,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf, ++ 0x06,0x00,0x00,0xd1,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf, ++ 0x06,0x00,0x00,0xcf,0x86,0xd5,0x06,0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00, ++ 0x00,0xd3,0x06,0xcf,0x06,0x00,0x00,0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf, ++ 0x06,0x00,0x00,0xd0,0x06,0xcf,0x06,0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54, ++ 0x04,0x00,0x00,0x53,0x04,0x00,0x00,0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02, ++ 0x00,0xd4,0xd9,0xd3,0x81,0xd2,0x79,0xd1,0x71,0xd0,0x69,0xcf,0x86,0xd5,0x60,0xd4, ++ 0x59,0xd3,0x52,0xd2,0x33,0xd1,0x2c,0xd0,0x25,0xcf,0x86,0x95,0x1e,0x94,0x19,0x93, ++ 0x14,0x92,0x0f,0x91,0x0a,0x10,0x05,0x00,0xff,0x00,0x05,0xff,0x00,0x00,0xff,0x00, ++ 0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x05,0xff,0x00,0xcf,0x06,0x05,0xff, ++ 0x00,0xcf,0x06,0x00,0xff,0x00,0xd1,0x07,0xcf,0x06,0x07,0xff,0x00,0xd0,0x07,0xcf, ++ 0x06,0x07,0xff,0x00,0xcf,0x86,0x55,0x05,0x07,0xff,0x00,0x14,0x05,0x07,0xff,0x00, ++ 0x00,0xff,0x00,0xcf,0x06,0x00,0xff,0x00,0xcf,0x06,0x00,0xff,0x00,0xcf,0x06,0x00, ++ 0xff,0x00,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86, ++ 0xcf,0x06,0x00,0x00,0xd2,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xd1,0x08,0xcf,0x86, ++ 0xcf,0x06,0x00,0x00,0xd0,0x08,0xcf,0x86,0xcf,0x06,0x00,0x00,0xcf,0x86,0xd5,0x06, ++ 0xcf,0x06,0x00,0x00,0xd4,0x06,0xcf,0x06,0x00,0x00,0xd3,0x06,0xcf,0x06,0x00,0x00, ++ 0xd2,0x06,0xcf,0x06,0x00,0x00,0xd1,0x06,0xcf,0x06,0x00,0x00,0xd0,0x06,0xcf,0x06, ++ 0x00,0x00,0xcf,0x86,0x55,0x04,0x00,0x00,0x54,0x04,0x00,0x00,0x53,0x04,0x00,0x00, ++ 0x52,0x04,0x00,0x00,0x11,0x04,0x00,0x00,0x02,0x00,0xcf,0x86,0xcf,0x06,0x02,0x00, ++ 0x81,0x80,0xcf,0x86,0x85,0x84,0xcf,0x86,0xcf,0x06,0x02,0x00,0x00,0x00,0x00,0x00 ++}; ++ ++struct utf8data_table utf8_data_table = { ++ .utf8agetab = utf8agetab, ++ .utf8agetab_size = ARRAY_SIZE(utf8agetab), ++ ++ .utf8nfdicfdata = utf8nfdicfdata, ++ .utf8nfdicfdata_size = ARRAY_SIZE(utf8nfdicfdata), ++ ++ .utf8nfdidata = utf8nfdidata, ++ .utf8nfdidata_size = ARRAY_SIZE(utf8nfdidata), ++ ++ .utf8data = utf8data, ++}; ++EXPORT_SYMBOL_GPL(utf8_data_table); ++MODULE_LICENSE("GPL v2"); +-- +2.27.0 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9049-net-phy-aquantia-Added-support-for-AQR113-PHY-device.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9049-net-phy-aquantia-Added-support-for-AQR113-PHY-device.patch new file mode 100644 index 00000000..ea263d88 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9049-net-phy-aquantia-Added-support-for-AQR113-PHY-device.patch @@ -0,0 +1,155 @@ +From 2ef0d79e86eb36f61e98fd9ba62858c5d2689fd9 Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Thu, 2 Jun 2022 12:43:51 +0530 +Subject: [PATCH 49/57] net: phy: aquantia: Added support for AQR113 PHY device + + Add support for AQR113 family + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +Change-Id: Ifacb46293faec6282f41579744ebe2a61b25a19e +--- + drivers/net/phy/aquantia_main.c | 100 ++++++++++++++++++++++++++++++++ + 1 file changed, 100 insertions(+) + +diff --git a/drivers/net/phy/aquantia_main.c b/drivers/net/phy/aquantia_main.c +index 3221224525ac..f7c10d8fee1f 100644 +--- a/drivers/net/phy/aquantia_main.c ++++ b/drivers/net/phy/aquantia_main.c +@@ -22,6 +22,7 @@ + #define PHY_ID_AQR107 0x03a1b4e0 + #define PHY_ID_AQCS109 0x03a1b5c2 + #define PHY_ID_AQR405 0x03a1b4b0 ++#define PHY_ID_AQR113 0x31c31c12 + + #define MDIO_PHYXS_VEND_IF_STATUS 0xe812 + #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3) +@@ -255,6 +256,65 @@ static int aqr_config_aneg(struct phy_device *phydev) + return genphy_c45_check_and_restart_aneg(phydev, changed); + } + ++ ++static int aqr113_set_mode(struct phy_device *phydev) ++{ ++ ++ int val; ++ int fw; ++ int build; ++ ++ fw = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); ++ if (fw < 0) ++ return val; ++ val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_RSVD_STAT1); ++ if (val < 0) ++ return val; ++ ++ build = FIELD_GET(GENMASK(7,0), val); ++ ++ if ((fw == 0x506) && (build = 0x16)) { ++ ++ /* set PHY in SGMI mode for 1000M with system side AN disabled*/ ++ val = phy_read_mmd(phydev, 0x7, 0xc400); ++ if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, phydev->advertising)) ++ val = val | (3 << 0xe); ++ else ++ val = val & (~( 3<< 0xe)); ++ phy_write_mmd(phydev, 0x7, 0xc400,val); ++ ++ ++ /* set PHY in SGMI mode for 2500M with system side AN disabled */ ++ val = phy_read_mmd(phydev, 0x7, 0xc400); ++ if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->advertising)) ++ val = val | (1 << 0xa); ++ else ++ val = val & (~( 1<< 0xa)); ++ phy_write_mmd(phydev, 0x7, 0xc400,val); ++ ++ /* clear 5G support */ ++ val = phy_read_mmd(phydev, 0x7, 0xc400); ++ val = val & (~( 1<< 0xb)); ++ phy_write_mmd(phydev, 0x7, 0xc400,val); ++ ++ ++ val = phy_read_mmd(phydev, 0x7, 0x20); ++ if (linkmode_test_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, phydev->advertising)) ++ val = val | (1 << 0xc); ++ else ++ val = val & (~( 1<< 0xc)); ++ phy_write_mmd(phydev, 0x7, 0x20,val); ++ ++ } ++ return 0; ++} ++ ++static int aqr113_config_aneg(struct phy_device *phydev) ++{ ++ aqr113_set_mode(phydev); ++ return aqr_config_aneg(phydev); ++} ++ + static int aqr_config_intr(struct phy_device *phydev) + { + bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED; +@@ -529,6 +589,32 @@ static int aqr107_config_init(struct phy_device *phydev) + return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); + } + ++static int aqr113_config_init(struct phy_device *phydev) ++{ ++ int ret; ++ int val; ++ ++ /* Check that the PHY interface type is compatible */ ++ if (phydev->interface != PHY_INTERFACE_MODE_SGMII && ++ phydev->interface != PHY_INTERFACE_MODE_2500BASEX && ++ phydev->interface != PHY_INTERFACE_MODE_10GBASER) ++ return -ENODEV; ++ ++ WARN(phydev->interface == PHY_INTERFACE_MODE_10GKR, ++ "Your devicetree is out of date, please update it. The AQR113 family doesn't support 10GKR, maybe you mean 10GBASER.\n"); ++ ++ ret = aqr107_wait_reset_complete(phydev); ++ if (!ret) ++ aqr107_chip_info(phydev); ++ ++ /* clear 5G support */ ++ val = phy_read_mmd(phydev, 0x7, 0xc400); ++ val = val & (~( 1<< 0xb)); ++ phy_write_mmd(phydev, 0x7, 0xc400,val); ++ ++ return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); ++} ++ + static int aqcs109_config_init(struct phy_device *phydev) + { + int ret; +@@ -673,6 +759,19 @@ static struct phy_driver aqr_driver[] = { + .get_stats = aqr107_get_stats, + .link_change_notify = aqr107_link_change_notify, + }, ++ ++{ ++ PHY_ID_MATCH_MODEL(PHY_ID_AQR113), ++ .name = "Aquantia AQR113", ++ .probe = aqr107_probe, ++ .config_init = aqr113_config_init, ++ .config_aneg = aqr113_config_aneg, ++ .read_status = aqr107_read_status, ++ .suspend = aqr107_suspend, ++ .resume = aqr107_resume, ++ .get_stats = aqr107_get_stats, ++}, ++ + { + PHY_ID_MATCH_MODEL(PHY_ID_AQCS109), + .name = "Aquantia AQCS109", +@@ -709,6 +808,7 @@ static struct mdio_device_id __maybe_unused aqr_tbl[] = { + { PHY_ID_MATCH_MODEL(PHY_ID_AQR105) }, + { PHY_ID_MATCH_MODEL(PHY_ID_AQR106) }, + { PHY_ID_MATCH_MODEL(PHY_ID_AQR107) }, ++ { PHY_ID_MATCH_MODEL(PHY_ID_AQR113) }, + { PHY_ID_MATCH_MODEL(PHY_ID_AQCS109) }, + { PHY_ID_MATCH_MODEL(PHY_ID_AQR405) }, + { } +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9050-Add-10M-support-in-PHY-device-supported-field.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9050-Add-10M-support-in-PHY-device-supported-field.patch new file mode 100644 index 00000000..a2cfbf23 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9050-Add-10M-support-in-PHY-device-supported-field.patch @@ -0,0 +1,28 @@ +From 5ea3a3fa893fc2154967244c3dd7f5f73621df49 Mon Sep 17 00:00:00 2001 +From: Devang Vyas <devangnayanbhai.vyas@amd.com> +Date: Thu, 8 Sep 2022 11:12:00 +0530 +Subject: [PATCH 50/57] Add 10M support in PHY device supported field + +Signed-off-by: Devang Vyas <devangnayanbhai.vyas@amd.com> +Change-Id: I88e16e3549b2bf71b90d73f7ec62ab7993355b8c +--- + drivers/net/phy/aquantia_main.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/net/phy/aquantia_main.c b/drivers/net/phy/aquantia_main.c +index f41c49c8205c..402b93829c86 100755 +--- a/drivers/net/phy/aquantia_main.c ++++ b/drivers/net/phy/aquantia_main.c +@@ -600,6 +600,9 @@ static int aqr113_config_init(struct phy_device *phydev) + val = val & (~( 1<< 0xb)); + phy_write_mmd(phydev, 0x7, 0xc400,val); + ++ /* Add 10M support */ ++ linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, phydev->supported); ++ + return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT); + } + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9051-amd-xgbe-Add-support-for-10Mbps.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9051-amd-xgbe-Add-support-for-10Mbps.patch new file mode 100644 index 00000000..2ec5d97c --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9051-amd-xgbe-Add-support-for-10Mbps.patch @@ -0,0 +1,459 @@ +From f9c00a709f69bd4415a08b8cd84c0cf70e678287 Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Fri, 3 Jun 2022 13:15:26 +0530 +Subject: [PATCH 51/57] amd-xgbe: Add support for 10Mbps + +Adds the support for 10Mbps speed in SFP mode. +Note: All the relevant changes for enabling 10Mbps in RJ45 are also +included in the patch, however, the current changes only work for +AIC2-phy not the onboard phy. The onboard AQR113 PHY fails to +complete AN and linkup at 10Mbps. + +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Change-Id: I0aff49cfe99b3b951b2b46259b28256ee0a19c81 +--- + drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 3 + + drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 25 +++++ + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 113 +++++++++++++++++--- + drivers/net/ethernet/amd/xgbe/xgbe.h | 2 + + 4 files changed, 130 insertions(+), 13 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +index d5fd49dd25f3..e5cc96bc70ad 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +@@ -807,6 +807,9 @@ static int xgbe_set_speed(struct xgbe_prv_data *pdata, int speed) + unsigned int ss; + + switch (speed) { ++ case SPEED_10: ++ ss = 0x07; ++ break; + case SPEED_1000: + ss = 0x03; + break; +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +index 944271556e0c..d0b2179e9078 100755 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +@@ -274,6 +274,15 @@ static void xgbe_sgmii_1000_mode(struct xgbe_prv_data *pdata) + pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SGMII_1000); + } + ++static void xgbe_sgmii_10_mode(struct xgbe_prv_data *pdata) ++{ ++ /* Set MAC to 10M speed */ ++ pdata->hw_if.set_speed(pdata, SPEED_10); ++ ++ /* Call PHY implementation support to complete rate change */ ++ pdata->phy_if.phy_impl.set_mode(pdata, XGBE_MODE_SGMII_10); ++} ++ + static void xgbe_sgmii_100_mode(struct xgbe_prv_data *pdata) + { + /* Set MAC to 1G speed */ +@@ -306,6 +315,9 @@ static void xgbe_change_mode(struct xgbe_prv_data *pdata, + case XGBE_MODE_KR: + xgbe_kr_mode(pdata); + break; ++ case XGBE_MODE_SGMII_10: ++ xgbe_sgmii_10_mode(pdata); ++ break; + case XGBE_MODE_SGMII_100: + xgbe_sgmii_100_mode(pdata); + break; +@@ -1087,6 +1099,8 @@ static const char *xgbe_phy_fc_string(struct xgbe_prv_data *pdata) + static const char *xgbe_phy_speed_string(int speed) + { + switch (speed) { ++ case SPEED_10: ++ return "10Mbps"; + case SPEED_100: + return "100Mbps"; + case SPEED_1000: +@@ -1174,6 +1188,7 @@ static int xgbe_phy_config_fixed(struct xgbe_prv_data *pdata) + case XGBE_MODE_KX_1000: + case XGBE_MODE_KX_2500: + case XGBE_MODE_KR: ++ case XGBE_MODE_SGMII_10: + case XGBE_MODE_SGMII_100: + case XGBE_MODE_SGMII_1000: + case XGBE_MODE_X: +@@ -1242,6 +1257,8 @@ static int __xgbe_phy_config_aneg(struct xgbe_prv_data *pdata, bool set_mode) + xgbe_set_mode(pdata, XGBE_MODE_SGMII_1000); + } else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_100)) { + xgbe_set_mode(pdata, XGBE_MODE_SGMII_100); ++ } else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_10)) { ++ xgbe_set_mode(pdata, XGBE_MODE_SGMII_10); + } else { + enable_irq(pdata->an_irq); + ret = -EINVAL; +@@ -1331,6 +1348,9 @@ static void xgbe_phy_status_result(struct xgbe_prv_data *pdata) + if(pdata->an_mode != XGBE_AN_MODE_MDIO) { + + switch (mode) { ++ case XGBE_MODE_SGMII_10: ++ pdata->phy.speed = SPEED_10; ++ break; + case XGBE_MODE_SGMII_100: + pdata->phy.speed = SPEED_100; + break; +@@ -1470,6 +1490,7 @@ static int xgbe_phy_start(struct xgbe_prv_data *pdata) + /* Set initial mode - call the mode setting routines + * directly to insure we are properly configured + */ ++ + if (xgbe_use_mode(pdata, XGBE_MODE_KR)) { + xgbe_kr_mode(pdata); + } else if (xgbe_use_mode(pdata, XGBE_MODE_KX_2500)) { +@@ -1484,6 +1505,8 @@ static int xgbe_phy_start(struct xgbe_prv_data *pdata) + xgbe_sgmii_1000_mode(pdata); + } else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_100)) { + xgbe_sgmii_100_mode(pdata); ++ } else if (xgbe_use_mode(pdata, XGBE_MODE_SGMII_10)) { ++ xgbe_sgmii_10_mode(pdata); + } else { + ret = -EINVAL; + goto err_irq; +@@ -1581,6 +1604,8 @@ static int xgbe_phy_best_advertised_speed(struct xgbe_prv_data *pdata) + return SPEED_1000; + else if (XGBE_ADV(lks, 100baseT_Full)) + return SPEED_100; ++ else if (XGBE_ADV(lks, 10baseT_Full)) ++ return SPEED_10; + + return SPEED_UNKNOWN; + } +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 2135c521f6e2..de53e636b049 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -124,6 +124,7 @@ + #include "xgbe.h" + #include "xgbe-common.h" + ++#define XGBE_PHY_PORT_SPEED_10 BIT(0) + #define XGBE_PHY_PORT_SPEED_100 BIT(1) + #define XGBE_PHY_PORT_SPEED_1000 BIT(2) + #define XGBE_PHY_PORT_SPEED_2500 BIT(3) +@@ -763,6 +764,8 @@ static void xgbe_phy_sfp_phy_settings(struct xgbe_prv_data *pdata) + XGBE_SET_SUP(lks, Pause); + XGBE_SET_SUP(lks, Asym_Pause); + if (phy_data->sfp_base == XGBE_SFP_BASE_1000_T) { ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) ++ XGBE_SET_SUP(lks, 10baseT_Full); + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) + XGBE_SET_SUP(lks, 100baseT_Full); + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) +@@ -1561,6 +1564,17 @@ static enum xgbe_mode xgbe_phy_an37_sgmii_outcome(struct xgbe_prv_data *pdata) + xgbe_phy_phydev_flowctrl(pdata); + + switch (pdata->an_status & XGBE_SGMII_AN_LINK_SPEED) { ++ case XGBE_SGMII_AN_LINK_SPEED_10: ++ if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { ++ XGBE_SET_LP_ADV(lks, 10baseT_Full); ++ mode = XGBE_MODE_SGMII_10; ++ } else { ++ /* Half-duplex not supported */ ++ XGBE_SET_LP_ADV(lks, 10baseT_Half); ++ mode = XGBE_MODE_UNKNOWN; ++ } ++ break; ++ + case XGBE_SGMII_AN_LINK_SPEED_100: + if (pdata->an_status & XGBE_SGMII_AN_LINK_DUPLEX) { + XGBE_SET_LP_ADV(lks, 100baseT_Full); +@@ -1677,7 +1691,10 @@ static enum xgbe_mode xgbe_phy_an73_redrv_outcome(struct xgbe_prv_data *pdata) + switch (phy_data->sfp_base) { + case XGBE_SFP_BASE_1000_T: + if (phy_data->phydev && +- (phy_data->phydev->speed == SPEED_100)) ++ (phy_data->phydev->speed == SPEED_10)) ++ mode = XGBE_MODE_SGMII_10; ++ else if (phy_data->phydev && ++ (phy_data->phydev->speed == SPEED_100)) + mode = XGBE_MODE_SGMII_100; + else + mode = XGBE_MODE_SGMII_1000; +@@ -1692,7 +1709,10 @@ static enum xgbe_mode xgbe_phy_an73_redrv_outcome(struct xgbe_prv_data *pdata) + break; + default: + if (phy_data->phydev && +- (phy_data->phydev->speed == SPEED_100)) ++ (phy_data->phydev->speed == SPEED_10)) ++ mode = XGBE_MODE_SGMII_10; ++ else if (phy_data->phydev && ++ (phy_data->phydev->speed == SPEED_100)) + mode = XGBE_MODE_SGMII_100; + else + mode = XGBE_MODE_SGMII_1000; +@@ -1805,30 +1825,40 @@ static enum xgbe_mode xgbe_phy_mdio_an_outcome(struct xgbe_prv_data *pdata) + case PHY_INTERFACE_MODE_10GKR: + if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) && (phy_data->phydev->speed == SPEED_10000)) + mode = XGBE_MODE_KR; +- if(phy_data->phydev->speed == SPEED_100) { ++ if(phy_data->phydev->speed == SPEED_10) { ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) ++ mode = XGBE_MODE_SGMII_10; ++ } ++ else if(phy_data->phydev->speed == SPEED_100) { + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) + mode = XGBE_MODE_SGMII_100; + } else if (phy_data->phydev->speed == SPEED_1000){ + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) + mode = XGBE_MODE_SGMII_1000; ++ + } else if (phy_data->phydev->speed == SPEED_1000) { + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) +- mode =XGBE_MODE_KX_2500; ++ mode =XGBE_MODE_KX_2500; + } + break; + case PHY_INTERFACE_MODE_10GBASER: + mode = XGBE_MODE_KR; + break; + case PHY_INTERFACE_MODE_SGMII: +- if(phy_data->phydev->speed == SPEED_100) { ++ if(phy_data->phydev->speed == SPEED_10) { ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) ++ mode = XGBE_MODE_SGMII_10; ++ } ++ else if(phy_data->phydev->speed == SPEED_100) { + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) + mode = XGBE_MODE_SGMII_100; ++ + } else if (phy_data->phydev->speed == SPEED_1000){ + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) + mode = XGBE_MODE_SGMII_1000; + } else if (phy_data->phydev->speed == SPEED_1000) { + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) +- mode = XGBE_MODE_KX_2500; ++ mode = XGBE_MODE_KX_2500; + } + break; + case PHY_INTERFACE_MODE_2500BASEX: +@@ -1904,8 +1934,11 @@ static void xgbe_phy_an_advertising(struct xgbe_prv_data *pdata, + (phy_data->phydev->speed == SPEED_2500)) { + netif_dbg(pdata, link, pdata->netdev, "advertising 2.5G speed\n"); + XGBE_SET_ADV(dlks, 2500baseX_Full); +- } +- else ++ } else if (phy_data->phydev && ++ (phy_data->phydev->speed == SPEED_10)) { ++ netif_dbg(pdata, link, pdata->netdev, "advertising 10M speed\n"); ++ XGBE_SET_ADV(dlks, 10baseT_Full); ++ } else + XGBE_SET_ADV(dlks, 1000baseKX_Full); + break; + case XGBE_PORT_MODE_10GBASE_R: +@@ -1947,7 +1980,6 @@ static int xgbe_phy_an_config(struct xgbe_prv_data *pdata) + linkmode_and(phy_data->phydev->advertising, + phy_data->phydev->supported, + lks->link_modes.advertising); +- + if (pdata->phy.autoneg != AUTONEG_ENABLE) { + phy_data->phydev->speed = pdata->phy.speed; + phy_data->phydev->duplex = pdata->phy.duplex; +@@ -2332,6 +2364,20 @@ static void xgbe_phy_sgmii_100_mode(struct xgbe_prv_data *pdata) + netif_dbg(pdata, link, pdata->netdev, "100MbE SGMII mode set\n"); + } + ++static void xgbe_phy_sgmii_10_mode(struct xgbe_prv_data *pdata) ++{ ++ struct xgbe_phy_data *phy_data = pdata->phy_data; ++ ++ xgbe_phy_set_redrv_mode(pdata); ++ ++ /* 10M/SGMII */ ++ xgbe_phy_perform_ratechange(pdata, 1, 0); ++ ++ phy_data->cur_mode = XGBE_MODE_SGMII_10; ++ ++ netif_dbg(pdata, link, pdata->netdev, "10MbE SGMII mode set\n"); ++} ++ + static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata) + { + struct xgbe_phy_data *phy_data = pdata->phy_data; +@@ -2394,6 +2440,7 @@ static enum xgbe_mode xgbe_phy_switch_baset_mode(struct xgbe_prv_data *pdata) + else if (phy_data->mdio_an_mode) + return XGBE_MODE_KR; + switch (xgbe_phy_cur_mode(pdata)) { ++ case XGBE_MODE_SGMII_10: + case XGBE_MODE_SGMII_100: + case XGBE_MODE_SGMII_1000: + case XGBE_MODE_KX_2500: +@@ -2462,6 +2509,8 @@ static enum xgbe_mode xgbe_phy_get_baset_mode(struct xgbe_phy_data *phy_data, + int speed) + { + switch (speed) { ++ case SPEED_10: ++ return XGBE_MODE_SGMII_10; + case SPEED_100: + return XGBE_MODE_SGMII_100; + case SPEED_1000: +@@ -2479,6 +2528,8 @@ static enum xgbe_mode xgbe_phy_get_sfp_mode(struct xgbe_phy_data *phy_data, + int speed) + { + switch (speed) { ++ case SPEED_10: ++ return XGBE_MODE_SGMII_10; + case SPEED_100: + return XGBE_MODE_SGMII_100; + case SPEED_1000: +@@ -2553,6 +2604,9 @@ static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode) + case XGBE_MODE_KR: + xgbe_phy_kr_mode(pdata); + break; ++ case XGBE_MODE_SGMII_10: ++ xgbe_phy_sgmii_10_mode(pdata); ++ break; + case XGBE_MODE_SGMII_100: + xgbe_phy_sgmii_100_mode(pdata); + break; +@@ -2609,6 +2663,9 @@ static bool xgbe_phy_use_baset_mode(struct xgbe_prv_data *pdata, + struct ethtool_link_ksettings *lks = &pdata->phy.lks; + + switch (mode) { ++ case XGBE_MODE_SGMII_10: ++ return xgbe_phy_check_mode(pdata, mode, ++ XGBE_ADV(lks, 10baseT_Full)); + case XGBE_MODE_SGMII_100: + return xgbe_phy_check_mode(pdata, mode, + XGBE_ADV(lks, 100baseT_Full)); +@@ -2638,6 +2695,11 @@ static bool xgbe_phy_use_sfp_mode(struct xgbe_prv_data *pdata, + return false; + return xgbe_phy_check_mode(pdata, mode, + XGBE_ADV(lks, 1000baseX_Full)); ++ case XGBE_MODE_SGMII_10: ++ if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) ++ return false; ++ return xgbe_phy_check_mode(pdata, mode, ++ XGBE_ADV(lks, 10baseT_Full)); + case XGBE_MODE_SGMII_100: + if (phy_data->sfp_base != XGBE_SFP_BASE_1000_T) + return false; +@@ -2734,6 +2796,10 @@ static bool xgbe_phy_valid_speed_baset_mode(struct xgbe_phy_data *phy_data, + int speed) + { + switch (speed) { ++ case SPEED_10: ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) ++ return true; ++ break; + case SPEED_100: + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) + return true; +@@ -2760,6 +2826,8 @@ static bool xgbe_phy_valid_speed_sfp_mode(struct xgbe_phy_data *phy_data, + int speed) + { + switch (speed) { ++ case SPEED_10: ++ return (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000); + case SPEED_100: + return (phy_data->sfp_speed == XGBE_SFP_SPEED_100_1000); + case SPEED_1000: +@@ -3115,7 +3183,8 @@ static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata) + return false; + break; + case XGBE_PORT_MODE_1000BASE_T: +- if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || ++ if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || ++ (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)) + return false; + break; +@@ -3124,13 +3193,15 @@ static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata) + return false; + break; + case XGBE_PORT_MODE_NBASE_T: +- if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || ++ if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || ++ (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500)) + return false; + break; + case XGBE_PORT_MODE_10GBASE_T: +- if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || ++ if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || ++ (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500) || + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) +@@ -3141,7 +3212,8 @@ static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata) + return false; + break; + case XGBE_PORT_MODE_SFP: +- if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || ++ if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) || ++ (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) || + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) || + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) + return false; +@@ -3537,6 +3609,11 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + XGBE_SET_SUP(lks, Pause); + XGBE_SET_SUP(lks, Asym_Pause); + XGBE_SET_SUP(lks, TP); ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { ++ dev_dbg(pdata->dev, "setting 10M support\n"); ++ XGBE_SET_SUP(lks, 10baseT_Full); ++ phy_data->start_mode = XGBE_MODE_SGMII_10; ++ } + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { + XGBE_SET_SUP(lks, 100baseT_Full); + phy_data->start_mode = XGBE_MODE_SGMII_100; +@@ -3567,6 +3644,10 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + XGBE_SET_SUP(lks, Pause); + XGBE_SET_SUP(lks, Asym_Pause); + XGBE_SET_SUP(lks, TP); ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { ++ XGBE_SET_SUP(lks, 10baseT_Full); ++ phy_data->start_mode = XGBE_MODE_SGMII_10; ++ } + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { + XGBE_SET_SUP(lks, 100baseT_Full); + phy_data->start_mode = XGBE_MODE_SGMII_100; +@@ -3590,6 +3671,10 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + XGBE_SET_SUP(lks, Pause); + XGBE_SET_SUP(lks, Asym_Pause); + XGBE_SET_SUP(lks, TP); ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) { ++ XGBE_SET_SUP(lks, 10baseT_Full); ++ phy_data->start_mode = XGBE_MODE_SGMII_10; ++ } + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) { + XGBE_SET_SUP(lks, 100baseT_Full); + phy_data->start_mode = XGBE_MODE_SGMII_100; +@@ -3638,6 +3723,8 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + XGBE_SET_SUP(lks, Asym_Pause); + XGBE_SET_SUP(lks, TP); + XGBE_SET_SUP(lks, FIBRE); ++ if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10) ++ phy_data->start_mode = XGBE_MODE_SGMII_10; + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) + phy_data->start_mode = XGBE_MODE_SGMII_100; + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h +index b0e6a837d704..183289e094fb 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe.h +@@ -292,6 +292,7 @@ + + #define XGBE_SGMII_AN_LINK_STATUS BIT(1) + #define XGBE_SGMII_AN_LINK_SPEED (BIT(2) | BIT(3)) ++#define XGBE_SGMII_AN_LINK_SPEED_10 0 + #define XGBE_SGMII_AN_LINK_SPEED_100 0x04 + #define XGBE_SGMII_AN_LINK_SPEED_1000 0x08 + #define XGBE_SGMII_AN_LINK_DUPLEX BIT(4) +@@ -594,6 +595,7 @@ enum xgbe_mode { + XGBE_MODE_KX_2500, + XGBE_MODE_KR, + XGBE_MODE_X, ++ XGBE_MODE_SGMII_10, + XGBE_MODE_SGMII_100, + XGBE_MODE_SGMII_1000, + XGBE_MODE_SFI, +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9052-amd-xgbe-rx-adap-finetunings.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9052-amd-xgbe-rx-adap-finetunings.patch new file mode 100644 index 00000000..a2e99bbf --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9052-amd-xgbe-rx-adap-finetunings.patch @@ -0,0 +1,112 @@ +From 05b20dda7c5f05f489b47af497325f0ade1f8216 Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Thu, 2 Jun 2022 21:45:05 +0530 +Subject: [PATCH 52/57] amd-xgbe: rx-adap finetunings + +- As per Vignesh's suggestion avoid re-enabling pll ctrl for mailbox +cmds 4,1 and 3,1 +- Also, correct the logic to skip pll re-enabling for cmd 0 and 5 +- fine tune adaptation and link status logic + +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Change-Id: I9e03fff90407a475610648d6386eaa9e9d2855b1 +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 41 +++++++++++++-------- + 1 file changed, 25 insertions(+), 16 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index de53e636b049..1035696b295f 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -387,6 +387,8 @@ struct xgbe_phy_data { + /* I2C, MDIO and GPIO lines are muxed, so only one device at a time */ + static DEFINE_MUTEX(xgbe_phy_comm_lock); + ++static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, ++ unsigned int cmd, unsigned int sub_cmd); + static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata); + static void xgbe_phy_rrc(struct xgbe_prv_data *pdata); + static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode); +@@ -2132,6 +2134,11 @@ static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable) + } + } + ++static inline void _xgbe_mode_set(struct xgbe_prv_data *pdata, enum xgbe_mode mode) ++{ ++ xgbe_phy_perform_ratechange(pdata, mode == XGBE_MODE_KR ? 4 : 3, 1); ++} ++ + static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata) + { + /* +@@ -2155,7 +2162,7 @@ static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata) + int reg; + struct xgbe_phy_data *phy_data; + +-#define MAX_RX_ADAPT_RETRIES 5 ++#define MAX_RX_ADAPT_RETRIES 1 + + rx_adapt_reinit: + reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_LSTS, +@@ -2209,7 +2216,7 @@ static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata) + pdata->rx_adapt_retries = 0; + return; + } +- xgbe_phy_set_mode(pdata, phy_data->cur_mode); ++ _xgbe_mode_set(pdata, phy_data->cur_mode); + } + } else { + netif_dbg(pdata, link, pdata->netdev, "%s either RX_VALID or LF_SIGDET is not set, issuing rrc\n",__func__); +@@ -2269,11 +2276,13 @@ static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata, + netif_dbg(pdata, link, pdata->netdev, "%s Enabling RX adaptation\n", __func__); + pdata->mode_set = 1; + xgbe_phy_rx_adaptation(pdata); ++ /* return from here to avoid enabling PLL ctrl during adaptation phase */ ++ return; + } + + reenable_pll: + /* Enable PLL re-initialization, not needed for phy_poweroff (0,0) */ +- if (cmd != 0) ++ if ((cmd != 0) && (cmd !=5)) + xgbe_phy_pll_ctrl(pdata, true); + } + +@@ -2929,21 +2938,21 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) + reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1); + + if (pdata->en_rx_adap) { +- if (reg & MDIO_STAT1_LSTATUS) { +- if (pdata->rx_adapt_done) +- return 1; +- else +- xgbe_phy_rx_adaptation(pdata); +- } else { +- if (pdata->mode_set) +- xgbe_phy_rx_adaptation(pdata); +- else { +- pdata->mode_set = 0; +- pdata->rx_adapt_done = 0; +- xgbe_phy_set_mode(pdata, phy_data->cur_mode); +- } ++ /* if there's a link and adaptation is done, declare link up */ ++ if ((reg & MDIO_STAT1_LSTATUS) && (pdata->rx_adapt_done)) ++ return 1; ++ /* If either of link not set or adaptation not done, retrigger the ++ * mode set. However, if the mode is already set, just do adaptation */ ++ if (pdata->mode_set) ++ xgbe_phy_rx_adaptation(pdata); ++ else { ++ pdata->rx_adapt_done = 0; ++ xgbe_phy_set_mode(pdata, phy_data->cur_mode); + } + ++ /* check again for the link and adaptation status */ ++ if ((reg & MDIO_STAT1_LSTATUS) && (pdata->rx_adapt_done)) ++ return 1; + } else if (reg & MDIO_STAT1_LSTATUS) + return 1; + +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9053-amd-xgbe-rx-adaptation-handle-SFP-connectors.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9053-amd-xgbe-rx-adaptation-handle-SFP-connectors.patch new file mode 100644 index 00000000..a2c9325e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9053-amd-xgbe-rx-adaptation-handle-SFP-connectors.patch @@ -0,0 +1,129 @@ +From f8f3f4cab4c58884fdf00fc7163d6090c5bcd286 Mon Sep 17 00:00:00 2001 +From: Raju Rangoju <Raju.Rangoju@amd.com> +Date: Sat, 18 Jun 2022 00:40:53 +0530 +Subject: [PATCH 53/57] amd-xgbe: rx-adaptation - handle SFP+ connectors + +Add changes to fix the regression for Fiber optic cables (SFP+ conectors). +Also handle the 1G BEL modules. + +Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> +Change-Id: I7f57a00890dae2e36e5f8578e576fc53a01cff5f +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 50 ++++++++++++--------- + 1 file changed, 30 insertions(+), 20 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 1035696b295f..22b2202a6d0f 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -2306,16 +2306,39 @@ static void xgbe_phy_power_off(struct xgbe_prv_data *pdata) + netif_dbg(pdata, link, pdata->netdev, "phy powered off\n"); + } + ++static bool enable_rx_adap(struct xgbe_prv_data *pdata, enum xgbe_mode mode) ++{ ++ struct xgbe_phy_data *phy_data = pdata->phy_data; ++ ++ if ((pdata->vdata->is_yc) && ++ (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) { ++ if ((phy_data->redrv) && ++ ((phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4223) || ++ (phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4227))) ++ return false; ++ ++ if (mode == XGBE_MODE_KR) { ++ if (!((phy_data->mdio_an_mode) || ++ (phy_data->port_mode == XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG))) ++ return false; ++ } ++ ++ pdata->en_rx_adap = 1; ++ return true; ++ } else ++ return false; ++} ++ + static void xgbe_phy_sfi_mode(struct xgbe_prv_data *pdata) + { + struct xgbe_phy_data *phy_data = pdata->phy_data; + + xgbe_phy_set_redrv_mode(pdata); +- + /* 10G/SFI */ + if (phy_data->sfp_cable != XGBE_SFP_CABLE_PASSIVE) { ++ pdata->en_rx_adap = 0; + xgbe_phy_perform_ratechange(pdata, 3, 0); +- } else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) && (pdata->en_rx_adap)) { ++ } else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) && (enable_rx_adap(pdata, XGBE_MODE_SFI))) { + xgbe_phy_perform_ratechange(pdata, 3, 1); + } else { + if (phy_data->sfp_cable_len <= 1) +@@ -2394,7 +2417,7 @@ static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata) + xgbe_phy_set_redrv_mode(pdata); + + /* 10G/KR */ +- if (pdata->en_rx_adap) { ++ if (enable_rx_adap(pdata, XGBE_MODE_KR)) { + xgbe_phy_perform_ratechange(pdata, 4, 1); + } else + xgbe_phy_perform_ratechange(pdata, 4, 0); +@@ -2911,8 +2934,11 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) + return 0; + } + +- if (phy_data->sfp_mod_absent || phy_data->sfp_rx_los) ++ if (phy_data->sfp_mod_absent || phy_data->sfp_rx_los) { ++ if (pdata->en_rx_adap) ++ pdata->rx_adapt_done = 0; + return 0; ++ } + } + + if (phy_data->phydev) { +@@ -3472,16 +3498,6 @@ static void xgbe_phy_exit(struct xgbe_prv_data *pdata) + mdiobus_unregister(phy_data->mii); + } + +-static bool enable_rx_adap(struct xgbe_phy_data *phy_data) +-{ +- +- if ((phy_data->redrv) && +- ((phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4223) || +- (phy_data->redrv_model == XGBE_PHY_REDRV_MODEL_4227))) +- return false; +- return true; +-} +- + static int xgbe_phy_init(struct xgbe_prv_data *pdata) + { + struct ethtool_link_ksettings *lks = &pdata->phy.lks; +@@ -3596,8 +3612,6 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE) + XGBE_SET_SUP(lks, 10000baseR_FEC); + phy_data->start_mode = XGBE_MODE_KR; +- if ((pdata->vdata->is_yc) && enable_rx_adap(phy_data)) +- pdata->en_rx_adap = 1; + } + + phy_data->phydev_mode = XGBE_MDIO_MODE_NONE; +@@ -3700,8 +3714,6 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { + XGBE_SET_SUP(lks, 10000baseT_Full); + phy_data->start_mode = XGBE_MODE_KR; +- if (pdata->vdata->is_yc) +- pdata->en_rx_adap = 1; + } + + phy_data->phydev_mode = XGBE_MDIO_MODE_CL45; +@@ -3740,8 +3752,6 @@ static int xgbe_phy_init(struct xgbe_prv_data *pdata) + phy_data->start_mode = XGBE_MODE_SGMII_1000; + if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) { + phy_data->start_mode = XGBE_MODE_SFI; +- if ((pdata->vdata->is_yc) && enable_rx_adap(phy_data)) +- pdata->en_rx_adap = 1; + } + + phy_data->phydev_mode = XGBE_MDIO_MODE_CL22; +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9054-amd-xgbe-Fix-Tx_Timestamp_Timeout-error-while-runnin.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9054-amd-xgbe-Fix-Tx_Timestamp_Timeout-error-while-runnin.patch new file mode 100644 index 00000000..a2135372 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9054-amd-xgbe-Fix-Tx_Timestamp_Timeout-error-while-runnin.patch @@ -0,0 +1,149 @@ +From 6f213873c2c360853b6d39774c3c0e3fdcf66261 Mon Sep 17 00:00:00 2001 +From: Devang Vyas <devangnayanbhai.vyas@amd.com> +Date: Mon, 20 Jun 2022 18:46:38 +0530 +Subject: [PATCH 54/57] amd-xgbe: Fix Tx_Timestamp_Timeout error while running + ptp4l application + +This patch fixes the Tx timestamp timeout error observed while running ptp4l +application because of which PTP synchronization is not achieved. This patch +schedules PTP packet queue when PTP in-progress flag is set and poll for the +XGMAC TXTSC bit to be set. This work thread reads Tx Timestamp registers +when timestamp is captured, convert the value to HW timestamp and pass it to +the network stack. + +Signed-off-by: Devang Vyas <devangnayanbhai.vyas@amd.com> +Change-Id: I8d331b1c9bd1eaef36149a323ea789b538cc2cc0 +--- + drivers/net/ethernet/amd/xgbe/xgbe-common.h | 2 + + drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 7 ++- + drivers/net/ethernet/amd/xgbe/xgbe-drv.c | 48 ++++++++++----------- + 3 files changed, 27 insertions(+), 30 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h +index 0b8b1e97d2f9..449f5be26930 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h +@@ -333,6 +333,8 @@ + #define MAC_TXSNR 0x0d30 + #define MAC_TXSSR 0x0d34 + ++#define MAC_TXSNR_MASK GENMASK(30, 0) ++ + #define MAC_QTFCR_INC 4 + #define MAC_MACA_INC 4 + #define MAC_HTR_INC 4 +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +index e5cc96bc70ad..0252d80f6834 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +@@ -1576,15 +1576,14 @@ static u64 xgbe_get_tx_tstamp(struct xgbe_prv_data *pdata) + + if (pdata->vdata->tx_tstamp_workaround) { + tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR); ++ tx_snr = tx_snr & MAC_TXSNR_MASK; + tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR); + } else { +- tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR); + tx_snr = XGMAC_IOREAD(pdata, MAC_TXSNR); ++ tx_snr = tx_snr & MAC_TXSNR_MASK; ++ tx_ssr = XGMAC_IOREAD(pdata, MAC_TXSSR); + } + +- if (XGMAC_GET_BITS(tx_snr, MAC_TXSNR, TXTSSTSMIS)) +- return 0; +- + nsec = tx_ssr; + nsec *= NSEC_PER_SEC; + nsec += tx_snr; +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c +index caea72cddb89..3ed9ff7fdaff 100755 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c +@@ -479,7 +479,7 @@ static void xgbe_isr_task(struct tasklet_struct *t) + struct xgbe_hw_if *hw_if = &pdata->hw_if; + struct xgbe_channel *channel; + unsigned int dma_isr, dma_ch_isr; +- unsigned int mac_isr, mac_tssr, mac_mdioisr; ++ unsigned int mac_isr, mac_mdioisr; + unsigned int i; + + /* The DMA interrupt status register also reports MAC and MTL +@@ -548,21 +548,6 @@ static void xgbe_isr_task(struct tasklet_struct *t) + if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCRXIS)) + hw_if->rx_mmc_int(pdata); + +- if (XGMAC_GET_BITS(mac_isr, MAC_ISR, TSIS)) { +- mac_tssr = XGMAC_IOREAD(pdata, MAC_TSSR); +- +- netif_dbg(pdata, intr, pdata->netdev, +- "MAC_TSSR=%#010x\n", mac_tssr); +- +- if (XGMAC_GET_BITS(mac_tssr, MAC_TSSR, TXTSC)) { +- /* Read Tx Timestamp to clear interrupt */ +- pdata->tx_tstamp = +- hw_if->get_tx_tstamp(pdata); +- queue_work(pdata->dev_workqueue, +- &pdata->tx_tstamp_work); +- } +- } +- + if (XGMAC_GET_BITS(mac_isr, MAC_ISR, SMI)) { + mac_mdioisr = XGMAC_IOREAD(pdata, MAC_MDIOISR); + +@@ -1470,25 +1455,35 @@ static void xgbe_tx_tstamp(struct work_struct *work) + struct xgbe_prv_data, + tx_tstamp_work); + struct skb_shared_hwtstamps hwtstamps; ++ struct sk_buff *skb = pdata->tx_tstamp_skb; + u64 nsec; + unsigned long flags; ++ u32 value; + +- spin_lock_irqsave(&pdata->tstamp_lock, flags); +- if (!pdata->tx_tstamp_skb) +- goto unlock; ++ if (readl_poll_timeout_atomic(pdata->xgmac_regs + MAC_TSSR, ++ value, value & (1 << MAC_TSSR_TXTSC_INDEX), 100, 10000)) { ++ dev_kfree_skb_any(pdata->tx_tstamp_skb); ++ pdata->tx_tstamp_skb = NULL; ++ return; ++ } + +- if (pdata->tx_tstamp) { +- nsec = timecounter_cyc2time(&pdata->tstamp_tc, +- pdata->tx_tstamp); ++ pdata->tx_tstamp = pdata->hw_if.get_tx_tstamp(pdata); + +- memset(&hwtstamps, 0, sizeof(hwtstamps)); +- hwtstamps.hwtstamp = ns_to_ktime(nsec); +- skb_tstamp_tx(pdata->tx_tstamp_skb, &hwtstamps); ++ spin_lock_irqsave(&pdata->tstamp_lock, flags); ++ if (!pdata->tx_tstamp_skb) { ++ dev_kfree_skb_any(pdata->tx_tstamp_skb); ++ pdata->tx_tstamp_skb = NULL; ++ goto unlock; + } + +- dev_kfree_skb_any(pdata->tx_tstamp_skb); ++ nsec = timecounter_cyc2time(&pdata->tstamp_tc, ++ pdata->tx_tstamp); + ++ memset(&hwtstamps, 0, sizeof(hwtstamps)); ++ hwtstamps.hwtstamp = ns_to_ktime(nsec); + pdata->tx_tstamp_skb = NULL; ++ skb_tstamp_tx(skb, &hwtstamps); ++ dev_kfree_skb_any(skb); + + unlock: + spin_unlock_irqrestore(&pdata->tstamp_lock, flags); +@@ -1653,6 +1648,7 @@ static void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata, + } else { + pdata->tx_tstamp_skb = skb_get(skb); + skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; ++ queue_work(pdata->dev_workqueue, &pdata->tx_tstamp_work); + } + spin_unlock_irqrestore(&pdata->tstamp_lock, flags); + } +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9055-amd-xgbe-Update-SSINC-value-based-on-125MHz-PTP-cloc.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9055-amd-xgbe-Update-SSINC-value-based-on-125MHz-PTP-cloc.patch new file mode 100644 index 00000000..045e3897 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9055-amd-xgbe-Update-SSINC-value-based-on-125MHz-PTP-cloc.patch @@ -0,0 +1,113 @@ +From 408cadc25201633fe7022848440846c9ee22f6a2 Mon Sep 17 00:00:00 2001 +From: Devang Vyas <devangnayanbhai.vyas@amd.com> +Date: Mon, 20 Jun 2022 15:54:48 +0530 +Subject: [PATCH 55/57] amd-xgbe: Update SSINC value based on 125MHz PTP clock + as per PPR + +Added xgbe version v2 flag to differentiate PTP clock frequency +based on SSINC field. As current implementation is w.r.t 50MHz, +added a flag for the backward compatibility with older chipsets + +Signed-off-by: Devang Vyas <devangnayanbhai.vyas@amd.com> +Change-Id: I483af20d23766199f0315dd8d5b23cd4248453d2 +--- + drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 13 ++++++++++--- + drivers/net/ethernet/amd/xgbe/xgbe-pci.c | 2 ++ + drivers/net/ethernet/amd/xgbe/xgbe-ptp.c | 10 +++++++--- + drivers/net/ethernet/amd/xgbe/xgbe.h | 7 +++++++ + 4 files changed, 26 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +index 0252d80f6834..8e37343ef098 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +@@ -1627,9 +1627,16 @@ static int xgbe_config_tstamp(struct xgbe_prv_data *pdata, + if (!XGMAC_GET_BITS(mac_tscr, MAC_TSCR, TSENA)) + return 0; + +- /* Initialize time registers */ +- XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC); +- XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC); ++ if (pdata->vdata->tstamp_ptp_clock_freq) { ++ /* Initialize time registers based on 125MHz PTP Clock Frequency */ ++ XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_V2_TSTAMP_SSINC); ++ XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_V2_TSTAMP_SNSINC); ++ } else { ++ /* Initialize time registers based on 50MHz PTP Clock Frequency*/ ++ XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SSINC, XGBE_TSTAMP_SSINC); ++ XGMAC_IOWRITE_BITS(pdata, MAC_SSIR, SNSINC, XGBE_TSTAMP_SNSINC); ++ } ++ + xgbe_update_tstamp_addend(pdata, pdata->tstamp_addend); + xgbe_set_tstamp_time(pdata, 0, 0); + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +index 0f2ac86ff904..35bc4ce96072 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-pci.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-pci.c +@@ -482,6 +482,7 @@ static struct xgbe_version_data xgbe_v2a = { + .tx_max_fifo_size = 229376, + .rx_max_fifo_size = 229376, + .tx_tstamp_workaround = 1, ++ .tstamp_ptp_clock_freq = 1, + .ecc_support = 1, + .i2c_support = 1, + .irq_reissue_support = 1, +@@ -498,6 +499,7 @@ static struct xgbe_version_data xgbe_v2b = { + .tx_max_fifo_size = 65536, + .rx_max_fifo_size = 65536, + .tx_tstamp_workaround = 1, ++ .tstamp_ptp_clock_freq = 1, + .ecc_support = 1, + .i2c_support = 1, + .irq_reissue_support = 1, +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c +index d06d260cf1e2..c60db672192d 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-ptp.c +@@ -250,10 +250,14 @@ void xgbe_ptp_register(struct xgbe_prv_data *pdata) + pdata->ptp_clock = clock; + + /* Calculate the addend: +- * addend = 2^32 / (PTP ref clock / 50Mhz) +- * = (2^32 * 50Mhz) / PTP ref clock ++ * addend = 2^32 / (PTP ref clock / (PTP clock based on SSINC)) ++ * = (2^32 * (PTP clock based on SSINC)) / PTP ref clock + */ +- dividend = 50000000; ++ if (pdata->vdata->tstamp_ptp_clock_freq) ++ dividend = 125000000; // PTP clock frequency is 125MHz ++ else ++ dividend = 50000000; // PTP clock frequency is 50MHz ++ + dividend <<= 32; + pdata->tstamp_addend = div_u64(dividend, pdata->ptpclk_rate); + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h +index 183289e094fb..895712fcbbd3 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe.h +@@ -235,6 +235,12 @@ + #define XGBE_TSTAMP_SSINC 20 + #define XGBE_TSTAMP_SNSINC 0 + ++/* Timestamp support - values based on 125MHz PTP clock ++ * 125MHz => 8 nsec ++ */ ++#define XGBE_V2_TSTAMP_SSINC 8 ++#define XGBE_V2_TSTAMP_SNSINC 0 ++ + /* Driver PMT macros */ + #define XGMAC_DRIVER_CONTEXT 1 + #define XGMAC_IOCTL_CONTEXT 2 +@@ -1009,6 +1015,7 @@ struct xgbe_version_data { + unsigned int tx_max_fifo_size; + unsigned int rx_max_fifo_size; + unsigned int tx_tstamp_workaround; ++ unsigned int tstamp_ptp_clock_freq; + unsigned int ecc_support; + unsigned int i2c_support; + unsigned int irq_reissue_support; +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9056-amd-xgbe-Add-support-for-molex-passive-cables.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9056-amd-xgbe-Add-support-for-molex-passive-cables.patch new file mode 100644 index 00000000..434e54a5 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9056-amd-xgbe-Add-support-for-molex-passive-cables.patch @@ -0,0 +1,71 @@ +From 5a8d5955c83d85aba1e04cfedb86e17b4e196685 Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Fri, 8 Jul 2022 14:20:29 +0530 +Subject: [PATCH 56/57] amd-xgbe: Add support for molex passive cables +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Usullay the offset 3 and 6 of the EEPROM SFP BASE of the cables used so +far (mostly Fiber Store cables) are NULL. Also, the offset 12 of those +ables are in the range 0x64 to 0x68. The existing sfp code assumes the +above properties. However, the Ethernet code compliance code standard +for passive cabling, suggests offset 3 is “0x0†and other offsets +4 and 5 - none of the standards are applicable. + +The 5 metre and 7 metre molex cables have valid data at offset 3 and 6, +also a value 0x78 at offset 12. So, add support to identify molex cables +and also extend the macro XGBE_SFP_BASE_BR_10GBE range to 0x78. +Change-Id: I72617bdb1d1da16f5645d9d71671e01a2d7350f6 +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> + +Raju Rangoju <Raju.Rangoju@amd.com> + +Change-Id: Ice85428db2c6a78f4006dc618facfb6d12c27376 +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 22b2202a6d0f..278e0509cd19 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -239,7 +239,7 @@ enum xgbe_sfp_speed { + #define XGBE_SFP_BASE_BR_1GBE_MIN 0x0a + #define XGBE_SFP_BASE_BR_1GBE_MAX 0x0d + #define XGBE_SFP_BASE_BR_10GBE_MIN 0x64 +-#define XGBE_SFP_BASE_BR_10GBE_MAX 0x68 ++#define XGBE_SFP_BASE_BR_10GBE_MAX 0x78 + + #define XGBE_SFP_BASE_CU_CABLE_LEN 18 + +@@ -1173,7 +1173,10 @@ static void xgbe_phy_sfp_parse_eeprom(struct xgbe_prv_data *pdata) + } + + /* Determine the type of SFP */ +- if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_SR) ++ if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) && ++ xgbe_phy_sfp_bit_rate(sfp_eeprom, XGBE_SFP_SPEED_10000)) ++ phy_data->sfp_base = XGBE_SFP_BASE_10000_CR; ++ else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_SR) + phy_data->sfp_base = XGBE_SFP_BASE_10000_SR; + else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_LR) + phy_data->sfp_base = XGBE_SFP_BASE_10000_LR; +@@ -1189,9 +1192,6 @@ static void xgbe_phy_sfp_parse_eeprom(struct xgbe_prv_data *pdata) + phy_data->sfp_base = XGBE_SFP_BASE_1000_CX; + else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] & XGBE_SFP_BASE_1GBE_CC_T) + phy_data->sfp_base = XGBE_SFP_BASE_1000_T; +- else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) && +- xgbe_phy_sfp_bit_rate(sfp_eeprom, XGBE_SFP_SPEED_10000)) +- phy_data->sfp_base = XGBE_SFP_BASE_10000_CR; + + switch (phy_data->sfp_base) { + case XGBE_SFP_BASE_1000_T: +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9057-amd-xgbe-For-mac-SNPSVER-0x30H-modifying-driver-to-u.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9057-amd-xgbe-For-mac-SNPSVER-0x30H-modifying-driver-to-u.patch new file mode 100644 index 00000000..0d034c2d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9057-amd-xgbe-For-mac-SNPSVER-0x30H-modifying-driver-to-u.patch @@ -0,0 +1,77 @@ +From 708136fb3bf09ba7c048dc0401ab1464afb7b97c Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Fri, 15 Jul 2022 15:05:26 +0530 +Subject: [PATCH 57/57] amd-xgbe:For mac SNPSVER 0x30H modifying driver to + update tx + +flowcontrole + +Before 30H it was single register per queue but from 30H onwards there is one register per priority i.e. 8 in total + +Signed-off-by: Ajith Nayak <Ajith.Nayak@amd.com> +Change-Id: I1be23f5683167dc2ecdeac72e08f99fa0ef33cf3 +--- + drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 26 ++++++++++++++++++------ + 1 file changed, 20 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +index 8e37343ef098..7171ebc3973e 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c +@@ -528,15 +528,22 @@ static int xgbe_disable_tx_flow_control(struct xgbe_prv_data *pdata) + { + unsigned int max_q_count, q_count; + unsigned int reg, reg_val; +- unsigned int i; ++ unsigned int i, ver; + + /* Clear MTL flow control */ + for (i = 0; i < pdata->rx_q_count; i++) + XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 0); + +- /* Clear MAC flow control */ + max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES; +- q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count); ++ /* For ver 30H the TFCR is present per priority instead of per queue */ ++ ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); ++ if (ver >= 0x30) { ++ q_count = max_q_count; ++ } else { ++ q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count); ++ } ++ ++ /* Clear MAC flow control */ + reg = MAC_Q0TFCR; + for (i = 0; i < q_count; i++) { + reg_val = XGMAC_IOREAD(pdata, reg); +@@ -555,7 +562,7 @@ static int xgbe_enable_tx_flow_control(struct xgbe_prv_data *pdata) + struct ieee_ets *ets = pdata->ets; + unsigned int max_q_count, q_count; + unsigned int reg, reg_val; +- unsigned int i; ++ unsigned int i, ver; + + /* Set MTL flow control */ + for (i = 0; i < pdata->rx_q_count; i++) { +@@ -578,9 +585,16 @@ static int xgbe_enable_tx_flow_control(struct xgbe_prv_data *pdata) + ehfc ? "enabled" : "disabled", i); + } + +- /* Set MAC flow control */ + max_q_count = XGMAC_MAX_FLOW_CONTROL_QUEUES; +- q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count); ++ /* For ver 30H the TFCR is present per priority instead of per queue */ ++ ver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER); ++ if (ver >= 0x30) { ++ q_count = max_q_count; ++ } else { ++ q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count); ++ } ++ ++ /* Set MAC flow control */ + reg = MAC_Q0TFCR; + for (i = 0; i < q_count; i++) { + reg_val = XGMAC_IOREAD(pdata, reg); +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9058-amd-xgbe-AIC2-rx-adaption-software-tuning-enablement.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9058-amd-xgbe-AIC2-rx-adaption-software-tuning-enablement.patch new file mode 100644 index 00000000..d56d3f14 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9058-amd-xgbe-AIC2-rx-adaption-software-tuning-enablement.patch @@ -0,0 +1,218 @@ +From 2f8aa57b60992e0ea49f2d597f844c01623e7782 Mon Sep 17 00:00:00 2001 +From: rgaridap <Ramesh.Garidapuri@amd.com> +Date: Tue, 23 Aug 2022 16:17:29 +0530 +Subject: [PATCH] amd-xgbe:AIC2 rx-adaption software tuning enablement + +Change-Id: Ib7b6b8db42767a49f848428ac5e03790983e3d3a +--- + drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 4 -- + drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c | 67 +++++++++++++++++---- + drivers/net/ethernet/amd/xgbe/xgbe.h | 1 + + drivers/net/phy/aquantia_main.c | 5 +- + 4 files changed, 61 insertions(+), 16 deletions(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +index d0b2179e9078..c3fdcbb1df98 100755 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +@@ -1309,10 +1309,6 @@ static bool xgbe_phy_aneg_done(struct xgbe_prv_data *pdata) + if (pdata->an_mode == XGBE_AN_MODE_MDIO) { + if(pdata->phy.link) + pdata->an_result = XGBE_AN_COMPLETE; +- else { +- netif_dbg(pdata, link, pdata->netdev, "xgbe_phy_aneg_done : ******* Forcing next mode ******* \n"); +- pdata->an_result = XGBE_AN_NO_LINK; +- } + } + return (pdata->an_result == XGBE_AN_COMPLETE); + } +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +index 278e0509cd19..b067f8216710 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +@@ -1868,7 +1868,7 @@ static enum xgbe_mode xgbe_phy_mdio_an_outcome(struct xgbe_prv_data *pdata) + mode = XGBE_MODE_KX_2500; + break; + default: +- mode = XGBE_MODE_KR; ++ mode = XGBE_MODE_UNKNOWN; + break; + } + } +@@ -1970,6 +1970,7 @@ static int xgbe_phy_an_config(struct xgbe_prv_data *pdata) + struct ethtool_link_ksettings *lks = &pdata->phy.lks; + struct xgbe_phy_data *phy_data = pdata->phy_data; + int ret; ++ unsigned long link_timeout; + + ret = xgbe_phy_find_phy_device(pdata); + if (ret) +@@ -1986,9 +1987,14 @@ static int xgbe_phy_an_config(struct xgbe_prv_data *pdata) + phy_data->phydev->speed = pdata->phy.speed; + phy_data->phydev->duplex = pdata->phy.duplex; + } ++ netif_dbg(pdata, link, pdata->netdev, " phy_start_aneg \n"); + +- ret = phy_start_aneg(phy_data->phydev); +- ++ link_timeout = pdata->phy_link_check + (XGBE_LINK_TIMEOUT*2 * HZ); ++ if (time_after(jiffies, link_timeout)) { ++ ret = phy_start_aneg(phy_data->phydev); ++ pdata->phy_link_check = jiffies; ++ } ++ + return ret; + } + +@@ -2174,7 +2180,7 @@ static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata) + reg = XMDIO_READ_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_EQ_CTRL4, 0xffffffff); + netif_dbg(pdata, link, pdata->netdev, "%s MDIO_PMA_RX_EQ_CTRL4 current data 0x%x\n", + __func__, reg); +- ++ + /* step 2: force PCS to send RX_ADAPT Req to PHY */ + XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_EQ_CTRL4, + XGBE_PMA_RX_AD_REQ_MASK, XGBE_PMA_RX_AD_REQ_ENABLE); +@@ -2202,7 +2208,7 @@ static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata) + reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1); + if (reg & MDIO_STAT1_LSTATUS) { + /* If the block lock is found, declare the link up */ +- netif_dbg(pdata, link, pdata->netdev, "%s block_lock done\n", __func__); ++ netif_dbg(pdata, link, pdata->netdev, "%s block_lock done and link is up\n", __func__); + pdata->rx_adapt_done = 1; + pdata->mode_set = 0; + return; +@@ -2216,7 +2222,10 @@ static void xgbe_phy_rx_adaptation(struct xgbe_prv_data *pdata) + pdata->rx_adapt_retries = 0; + return; + } +- _xgbe_mode_set(pdata, phy_data->cur_mode); ++ ++ if ((phy_data->cur_mode == XGBE_MODE_KR) ||( phy_data->cur_mode == XGBE_MODE_SFI)) ++ pdata->hw_if.set_speed(pdata, SPEED_10000); ++ _xgbe_mode_set(pdata, phy_data->cur_mode); + } + } else { + netif_dbg(pdata, link, pdata->netdev, "%s either RX_VALID or LF_SIGDET is not set, issuing rrc\n",__func__); +@@ -2310,6 +2319,12 @@ static bool enable_rx_adap(struct xgbe_prv_data *pdata, enum xgbe_mode mode) + { + struct xgbe_phy_data *phy_data = pdata->phy_data; + ++ if ((phy_data->mdio_an_mode) && (mode == XGBE_MODE_KR)) { ++ pdata->en_rx_adap = 1; ++ netif_dbg(pdata, link, pdata->netdev, " pdata->en_rx_adap %d\n", pdata->en_rx_adap); ++ return true; ++ } ++ + if ((pdata->vdata->is_yc) && + (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)) { + if ((phy_data->redrv) && +@@ -2415,7 +2430,6 @@ static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata) + struct xgbe_phy_data *phy_data = pdata->phy_data; + + xgbe_phy_set_redrv_mode(pdata); +- + /* 10G/KR */ + if (enable_rx_adap(pdata, XGBE_MODE_KR)) { + xgbe_phy_perform_ratechange(pdata, 4, 1); +@@ -2922,6 +2936,7 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) + struct xgbe_phy_data *phy_data = pdata->phy_data; + unsigned int reg; + int ret; ++ enum xgbe_mode mode = XGBE_MODE_UNKNOWN; + + *an_restart = 0; + +@@ -2948,13 +2963,41 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) + return 0; + + if ((pdata->phy.autoneg == AUTONEG_ENABLE) && +- !phy_aneg_done(phy_data->phydev)) ++ !phy_aneg_done(phy_data->phydev)) { ++ if (enable_rx_adap(pdata, XGBE_MODE_KR)) ++ pdata->rx_adapt_done = 0; ++ pdata->an_result = XGBE_AN_READY; ++ if (!test_bit(XGBE_LINK_INIT, &pdata->dev_state)) { ++ netif_carrier_off(pdata->netdev); ++ *an_restart = 1; ++ } /*should not restart AN within 5 seconds for AQR, AQR will restart after 15s ++ or keep 10 sec between AN restart*/ + return 0; ++ } else { ++ pdata->an_result = XGBE_AN_COMPLETE; ++ } + +- if (!phy_data->phydev->link) ++ ++ if (!phy_data->phydev->link) { ++ if (enable_rx_adap(pdata, XGBE_MODE_KR)) ++ pdata->rx_adapt_done = 0; + return 0; +- if (pdata->an_mode == XGBE_AN_MODE_MDIO) +- return 1; ++ } ++ if (pdata->an_mode == XGBE_AN_MODE_MDIO) { ++ mode = xgbe_phy_mdio_an_outcome(pdata); ++ /* Set MAC to 10G speed and set mode to enable Rx adaptation*/ ++ if(mode == XGBE_MODE_KR) { ++ enable_rx_adap(pdata, XGBE_MODE_KR); ++ if(pdata->rx_adapt_done == 0) { ++ pdata->hw_if.set_speed(pdata, SPEED_10000); ++ xgbe_phy_set_mode(pdata, mode); ++ if(pdata->rx_adapt_done == 0) ++ xgbe_phy_rx_adaptation(pdata); ++ } ++ } ++ if(mode == XGBE_MODE_UNKNOWN) ++ return 0; ++ } + } + + /* Link status is latched low, so read once to clear +@@ -2976,6 +3019,8 @@ static int xgbe_phy_link_status(struct xgbe_prv_data *pdata, int *an_restart) + xgbe_phy_set_mode(pdata, phy_data->cur_mode); + } + ++ reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1); ++ reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1); + /* check again for the link and adaptation status */ + if ((reg & MDIO_STAT1_LSTATUS) && (pdata->rx_adapt_done)) + return 1; +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h +index 895712fcbbd3..2c244aa15c27 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe.h +@@ -1241,6 +1241,7 @@ struct xgbe_prv_data { + struct xgbe_phy phy; + int mdio_mmd; + unsigned long link_check; ++ unsigned long phy_link_check; + struct completion mdio_complete; + + unsigned int kr_redrv; +diff --git a/drivers/net/phy/aquantia_main.c b/drivers/net/phy/aquantia_main.c +index 402b93829c86..28329c281e75 100755 +--- a/drivers/net/phy/aquantia_main.c ++++ b/drivers/net/phy/aquantia_main.c +@@ -299,6 +299,7 @@ static int aqr113_set_mode(struct phy_device *phydev) + + static int aqr113_config_aneg(struct phy_device *phydev) + { ++ phydev_dbg(phydev, " AQR AN start "); + aqr113_set_mode(phydev); + return aqr_config_aneg(phydev); + } +@@ -457,7 +458,9 @@ static int aqr107_read_status(struct phy_device *phydev) + } + + /* Read possibly downshifted rate from vendor register */ +- return aqr107_read_rate(phydev); ++ ret = aqr107_read_rate(phydev); ++ ++ return ret; + } + + static int aqr107_get_downshift(struct phy_device *phydev, u8 *data) +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9059-amd-xgbe-Delay-AN-timeout-during-KR-training.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9059-amd-xgbe-Delay-AN-timeout-during-KR-training.patch new file mode 100644 index 00000000..7e271dd9 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/9059-amd-xgbe-Delay-AN-timeout-during-KR-training.patch @@ -0,0 +1,86 @@ +From 501f3c0cbc5b66e66a7ed0fd6990ac78815c68ef Mon Sep 17 00:00:00 2001 +From: Sudheesh Mavila <sudheesh.mavila@amd.com> +Date: Tue, 21 Sep 2021 13:35:10 +0530 +Subject: [PATCH] amd-xgbe: Delay AN timeout during KR training + +xgbe driver uses a timeout to restart AN process if link is down. +This timeout value is reduced to 1 sec to enable fast +synchronization between link partner. + +This adds a requirement to delay AN restart in xgbe_check_link_timeout(), +while KR training is in progress. + +Signed-off-by: Sudheesh Mavila <sudheesh.mavila@amd.com> +Change-Id: I373f3851036ce4c15c2e5704addbc3fa3b4d0707 +Signed-off-by: rgaridap <Ramesh.Garidapuri@amd.com> +--- + drivers/net/ethernet/amd/xgbe/xgbe-mdio.c | 22 +++++++++++++++++++++- + drivers/net/ethernet/amd/xgbe/xgbe.h | 1 + + 2 files changed, 22 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +index c3fdcbb1df98..ac8b61f8c79f 100755 +--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c ++++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c +@@ -518,6 +518,7 @@ static enum xgbe_an xgbe_an73_tx_training(struct xgbe_prv_data *pdata, + reg |= XGBE_KR_TRAINING_ENABLE; + reg |= XGBE_KR_TRAINING_START; + XMDIO_WRITE(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_10GBR_PMD_CTRL, reg); ++ pdata->kr_start_time = jiffies; + + netif_dbg(pdata, link, pdata->netdev, + "KR training initiated\n"); +@@ -654,6 +655,8 @@ static enum xgbe_an xgbe_an73_incompat_link(struct xgbe_prv_data *pdata) + + xgbe_switch_mode(pdata); + ++ pdata->an_result = XGBE_AN_READY; ++ + xgbe_an_restart(pdata); + + return XGBE_AN_INCOMPAT_LINK; +@@ -1316,11 +1319,28 @@ static bool xgbe_phy_aneg_done(struct xgbe_prv_data *pdata) + static void xgbe_check_link_timeout(struct xgbe_prv_data *pdata) + { + unsigned long link_timeout; ++ int wait = 100; ++ unsigned long kr_time; + + link_timeout = pdata->link_check + (XGBE_LINK_TIMEOUT * HZ); + if (time_after(jiffies, link_timeout)) { + netif_dbg(pdata, link, pdata->netdev, "AN link timeout\n"); +- xgbe_phy_config_aneg(pdata); ++ /* AN restart should not happen within 500ms from start KR training ++ * This loop ensures no AN restart during KR training ++ */ ++ while (wait--) { ++ mutex_lock(&pdata->an_mutex); ++ kr_time = pdata->kr_start_time + msecs_to_jiffies(XGBE_AN_MS_TIMEOUT); ++ mutex_unlock(&pdata->an_mutex); ++ if (time_after(jiffies, kr_time)) ++ break; ++ if (pdata->an_result == XGBE_AN_COMPLETE) ++ break; ++ usleep_range(5000, 6000); ++ } ++ /* AN restart is required, if AN result is not COMPLETE */ ++ if (pdata->an_result != XGBE_AN_COMPLETE) ++ xgbe_phy_config_aneg(pdata); + } + } + +diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h +index 2c244aa15c27..c1a3b208b1ce 100644 +--- a/drivers/net/ethernet/amd/xgbe/xgbe.h ++++ b/drivers/net/ethernet/amd/xgbe/xgbe.h +@@ -1267,6 +1267,7 @@ struct xgbe_prv_data { + unsigned int fec_ability; + unsigned long an_start; + enum xgbe_an_mode an_mode; ++ unsigned long kr_start_time; + + /* I2C support */ + struct xgbe_i2c i2c; +-- +2.37.3 + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/afalg.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/afalg.cfg new file mode 100644 index 00000000..3a101779 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/afalg.cfg @@ -0,0 +1,41 @@ +# +# General setup +# +CONFIG_AUDIT=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_AUDITSYSCALL=y + +CONFIG_INTEGRITY_AUDIT=y + +# +# Crypto core or helper +# + +CONFIG_CRYPTO_USER=m +CONFIG_CRYPTO_CRYPTD=m + +# Authenticated Encryption with Associated Data +# +CONFIG_CRYPTO_ECHAINIV=m + + +# +# Ciphers +# +CONFIG_CRYPTO_DES3_EDE_X86_64=m + +# +# Random Number Generation +# +CONFIG_CRYPTO_ANSI_CPRNG=m +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_HASH=y +CONFIG_CRYPTO_DRBG_CTR=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_USER_API=m +CONFIG_CRYPTO_USER_API_HASH=m +CONFIG_CRYPTO_USER_API_SKCIPHER=m +CONFIG_CRYPTO_USER_API_RNG=m +CONFIG_CRYPTO_USER_API_AEAD=m diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amd-ccp.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amd-ccp.cfg new file mode 100644 index 00000000..109cda5c --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amd-ccp.cfg @@ -0,0 +1,27 @@ +CONFIG_SERIAL_8250_DMA=y +CONFIG_DMADEVICES=y +# CONFIG_DMADEVICES_DEBUG is not set +# +# DMA Devices +# +CONFIG_DMA_ENGINE=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DMA_ACPI=y +# CONFIG_INTEL_IDMA64 is not set +# CONFIG_INTEL_IOATDMA is not set +# CONFIG_QCOM_HIDMA_MGMT is not set +# CONFIG_QCOM_HIDMA is not set +CONFIG_DW_DMAC_CORE=y +# CONFIG_DW_DMAC is not set +# CONFIG_DW_DMAC_PCI is not set +CONFIG_HSU_DMA=y +# +# DMA Clients +# +# CONFIG_ASYNC_TX_DMA is not set +# CONFIG_DMATEST is not set +CONFIG_CRYPTO_DEV_CCP=y +CONFIG_CRYPTO_DEV_CCP_DD=m +CONFIG_CRYPTO_DEV_CCP_CRYPTO=m +CONFIG_CRYPTO_DEV_SP_CCP=y +CONFIG_CRYPTO_DEV_SP_PSP=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amd-xgbe.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amd-xgbe.cfg new file mode 100644 index 00000000..463ed1e8 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amd-xgbe.cfg @@ -0,0 +1,51 @@ +CONFIG_MDIO=y +CONFIG_AMD_XGBE=y +CONFIG_AMD_XGBE_HAVE_ECC=y +CONFIG_PHYLIB=y +CONFIG_MDIO_GPIO=y + +CONFIG_USB_USBNET=y +CONFIG_USB_NET_AX8817X=y +CONFIG_USB_NET_AX88179_178A=y +CONFIG_USB_NET_CDCETHER=y +# CONFIG_USB_NET_CDC_EEM is not set +CONFIG_USB_NET_CDC_NCM=y +# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set +# CONFIG_USB_NET_CDC_MBIM is not set +# CONFIG_USB_NET_DM9601 is not set +# CONFIG_USB_NET_SR9700 is not set +# CONFIG_USB_NET_SR9800 is not set +# CONFIG_USB_NET_SMSC75XX is not set +# CONFIG_USB_NET_SMSC95XX is not set +# CONFIG_USB_NET_GL620A is not set +CONFIG_USB_NET_NET1080=y +# CONFIG_USB_NET_PLUSB is not set +# CONFIG_USB_NET_MCS7830 is not set +# CONFIG_USB_NET_RNDIS_HOST is not set +CONFIG_USB_NET_CDC_SUBSET_ENABLE=y +CONFIG_USB_NET_CDC_SUBSET=y +# CONFIG_USB_ALI_M5632 is not set +# CONFIG_USB_AN2720 is not set +CONFIG_USB_BELKIN=y +CONFIG_USB_ARMLINUX=y +# CONFIG_USB_EPSON2888 is not set +# CONFIG_USB_KC2190 is not set +CONFIG_USB_NET_ZAURUS=y +CONFIG_USB_NET_CX82310_ETH=y +# CONFIG_USB_NET_KALMIA is not set +# CONFIG_USB_NET_QMI_WWAN is not set +# CONFIG_USB_HSO is not set +# CONFIG_USB_NET_INT51X1 is not set +# CONFIG_USB_IPHETH is not set +# CONFIG_USB_SIERRA_NET is not set +# CONFIG_USB_VL600 is not set +# CONFIG_USB_NET_CH9200 is not set + +CONFIG_VFIO_PCI=y + +CONFIG_X86_X2APIC=y +CONFIG_X86_NUMACHIP=y +CONFIG_INET_TCP_DIAG=m +CONFIG_INET_UDP_DIAG=m +CONFIG_INET_DIAG=m +CONFIG_NETLABEL=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86-extra-config.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86-extra-config.cfg new file mode 100644 index 00000000..f76cbb32 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86-extra-config.cfg @@ -0,0 +1,303 @@ +CONFIG_PERF_EVENTS_INTEL_UNCORE=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_CROSS_MEMORY_ATTACH=y +CONFIG_USELIB=y +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_CLOCKSOURCE_VALIDATE_LAST_CYCLE=y +CONFIG_SRCU=y +# CONFIG_TASKS_RCU is not set +CONFIG_BUILD_BIN2C=y +CONFIG_LOG_CPU_MAX_BUF_SHIFT=12 +CONFIG_PAGE_COUNTER=y +CONFIG_BPF=y +CONFIG_MULTIUSER=y +CONFIG_SGETMASK_SYSCALL=y +CONFIG_SYSFS_SYSCALL=y +# CONFIG_BPF_SYSCALL is not set +CONFIG_ADVISE_SYSCALLS=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_X86_FEATURE_NAMES=y +# CONFIG_X86_GOLDFISH is not set +# CONFIG_IOSF_MBI_DEBUG is not set +CONFIG_X86_VSYSCALL_EMULATION=y +CONFIG_X86_DIRECT_GBPAGES=y +CONFIG_MEMORY_BALLOON=y +# CONFIG_ZSWAP is not set +# CONFIG_ZPOOL is not set +# CONFIG_ZBUD is not set +CONFIG_GENERIC_EARLY_IOREMAP=y +# CONFIG_X86_PMEM_LEGACY is not set +# CONFIG_EFI_MIXED is not set +CONFIG_HAVE_LIVEPATCH=y +# CONFIG_LIVEPATCH is not set +CONFIG_ACPI_LEGACY_TABLES_LOOKUP=y +CONFIG_ARCH_MIGHT_HAVE_ACPI_PDC=y +CONFIG_ACPI_SYSTEM_POWER_STATES_SUPPORT=y +CONFIG_ACPI_HOTPLUG_IOAPIC=y +# CONFIG_ACPI_REDUCED_HARDWARE_ONLY is not set +CONFIG_HAVE_ACPI_APEI=y +CONFIG_HAVE_ACPI_APEI_NMI=y +# CONFIG_PMIC_OPREGION is not set +CONFIG_PMC_ATOM=y +CONFIG_NET_UDP_TUNNEL=m +# CONFIG_NET_FOU is not set +# CONFIG_NET_FOU_IP_TUNNELS is not set +# CONFIG_GENEVE is not set +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_BRIDGE_NETFILTER=m +CONFIG_NF_NAT_REDIRECT=m +# CONFIG_NETFILTER_XT_NAT is not set +# CONFIG_NF_LOG_ARP is not set +# CONFIG_NF_LOG_IPV4 is not set +CONFIG_NF_REJECT_IPV4=m +CONFIG_NF_NAT_PPTP=m +CONFIG_NF_NAT_H323=m +# CONFIG_IP_NF_NAT is not set +# CONFIG_NF_REJECT_IPV6 is not set +# CONFIG_NF_LOG_IPV6 is not set +CONFIG_TIPC_MEDIA_UDP=y +# CONFIG_NET_ACT_VLAN is not set +# CONFIG_NET_ACT_BPF is not set +# CONFIG_NET_ACT_CONNMARK is not set +# CONFIG_MPLS is not set +# CONFIG_NET_SWITCHDEV is not set +CONFIG_BT_BREDR=y +CONFIG_BT_LE=y +# CONFIG_BT_SELFTEST is not set +CONFIG_BT_DEBUGFS=y +CONFIG_BT_INTEL=m +CONFIG_BT_BCM=m +CONFIG_BT_HCIBTUSB_BCM=y +# CONFIG_BT_HCIUART_INTEL is not set +# CONFIG_BT_HCIUART_BCM is not set +CONFIG_UEVENT_HELPER=y +# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set +CONFIG_ALLOW_DEV_COREDUMP=y +# CONFIG_BLK_DEV_PMEM is not set +# CONFIG_INTEL_MEI_TXE is not set +# CONFIG_ECHO is not set +# CONFIG_CXL_BASE is not set +# CONFIG_SCSI_AM53C974 is not set +# CONFIG_SCSI_WD719X is not set +# CONFIG_DM_ERA is not set +# CONFIG_DM_LOG_WRITES is not set +# CONFIG_IPVLAN is not set +# CONFIG_NET_VENDOR_AGERE is not set +# CONFIG_ET131X is not set +# CONFIG_ALTERA_TSE is not set +# CONFIG_BCMGENET is not set +# CONFIG_CX_ECAT is not set +# CONFIG_FM10K is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_SXGBE_ETH is not set +# CONFIG_BCM7XXX_PHY is not set +# CONFIG_MDIO_BCM_UNIMAC is not set +CONFIG_USB_NET_DRIVERS=y +# CONFIG_ATH9K_DYNACK is not set +# CONFIG_ATH9K_CHANNEL_CONTEXT is not set +CONFIG_ATH9K_PCOEM=y +CONFIG_BRCMFMAC_PROTO_BCDC=y +# CONFIG_BRCMFMAC_PCIE is not set +CONFIG_IWLWIFI_LEDS=y +# CONFIG_RTL8723BE is not set +# CONFIG_RTL8192EE is not set +# CONFIG_RTL8821AE is not set +# CONFIG_RSI_91X is not set +# CONFIG_MOUSE_ELAN_I2C is not set +# CONFIG_TABLET_SERIAL_WACOM4 is not set +# CONFIG_TOUCHSCREEN_GOODIX is not set +# CONFIG_TOUCHSCREEN_ELAN is not set +# CONFIG_TOUCHSCREEN_SX8654 is not set +CONFIG_DEVMEM=y +CONFIG_SERIAL_EARLYCON=y +# CONFIG_SERIAL_8250_FINTEK is not set +# CONFIG_SERIAL_SC16IS7XX is not set +# CONFIG_IPMI_SSIF is not set +# CONFIG_TCG_CRB is not set +# CONFIG_TCG_TIS_ST33ZP24 is not set +# CONFIG_XILLYBUS is not set +CONFIG_ACPI_I2C_OPREGION=y +# CONFIG_I2C_SLAVE is not set +# CONFIG_SPI_CADENCE is not set +# CONFIG_SPMI is not set +# CONFIG_PINCTRL_BAYTRAIL is not set +# CONFIG_PINCTRL_CHERRYVIEW is not set +# CONFIG_PINCTRL_SUNRISEPOINT is not set +CONFIG_GPIOLIB_IRQCHIP=y +# CONFIG_GPIO_DWAPB is not set +# CONFIG_GPIO_F7188X is not set +# CONFIG_GPIO_ICH is not set +# CONFIG_GPIO_SCH311X is not set +# CONFIG_GPIO_ADP5588 is not set +# CONFIG_GPIO_BT8XX is not set +# CONFIG_BATTERY_GAUGE_LTC2941 is not set +# CONFIG_SENSORS_APPLESMC is not set +# CONFIG_SENSORS_G760A is not set +# CONFIG_SENSORS_G762 is not set +# CONFIG_SENSORS_I5500 is not set +# CONFIG_SENSORS_CORETEMP is not set +# CONFIG_SENSORS_POWR1220 is not set +# CONFIG_SENSORS_LTC2945 is not set +# CONFIG_SENSORS_LTC4151 is not set +# CONFIG_SENSORS_LTC4215 is not set +# CONFIG_SENSORS_LTC4222 is not set +# CONFIG_SENSORS_LTC4245 is not set +# CONFIG_SENSORS_LTC4260 is not set +# CONFIG_SENSORS_LTC4261 is not set +# CONFIG_SENSORS_MAX1111 is not set +# CONFIG_SENSORS_MAX16065 is not set +# CONFIG_SENSORS_MAX1619 is not set +# CONFIG_SENSORS_MAX1668 is not set +# CONFIG_SENSORS_MAX197 is not set +# CONFIG_SENSORS_MAX6639 is not set +# CONFIG_SENSORS_MAX6642 is not set +# CONFIG_SENSORS_MAX6650 is not set +# CONFIG_SENSORS_MAX6697 is not set +# CONFIG_SENSORS_MCP3021 is not set +# CONFIG_SENSORS_ADCXX is not set +# CONFIG_SENSORS_NTC_THERMISTOR is not set +# CONFIG_SENSORS_NCT6683 is not set +# CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT7802 is not set +# CONFIG_SENSORS_NCT7904 is not set +# CONFIG_SENSORS_SHTC1 is not set +# CONFIG_SENSORS_SMM665 is not set +# CONFIG_SENSORS_ADC128D818 is not set +# CONFIG_SENSORS_TMP103 is not set +# CONFIG_THERMAL_GOV_BANG_BANG is not set +# CONFIG_INTEL_SOC_DTS_THERMAL is not set +# CONFIG_INT340X_THERMAL is not set +# CONFIG_XILINX_WATCHDOG is not set +# CONFIG_CADENCE_WATCHDOG is not set +CONFIG_BCMA_DRIVER_PCI=y +# CONFIG_MFD_BCM590XX is not set +# CONFIG_MFD_AXP20X is not set +# CONFIG_MFD_DA9150 is not set +# CONFIG_MFD_DLN2 is not set +# CONFIG_MFD_INTEL_QUARK_I2C_GPIO is not set +# CONFIG_INTEL_SOC_PMIC is not set +# CONFIG_MFD_MAX77843 is not set +# CONFIG_MFD_MT6397 is not set +# CONFIG_MFD_MENF21BMC is not set +# CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RN5T618 is not set +# CONFIG_MFD_SKY81452 is not set +# CONFIG_MFD_TPS65218 is not set +# CONFIG_MEDIA_SDR_SUPPORT is not set +# CONFIG_USB_GSPCA_DTCS033 is not set +# CONFIG_USB_GSPCA_TOUPTEK is not set +# CONFIG_DRM_I2C_ADV7511 is not set +# CONFIG_DRM_VGEM is not set +# CONFIG_HSA_AMD is not set +CONFIG_FB_CMDLINE=y +CONFIG_HDMI=y +CONFIG_DUMMY_CONSOLE_COLUMNS=80 +CONFIG_DUMMY_CONSOLE_ROWS=25 +# CONFIG_HID_BETOP_FF is not set +# CONFIG_HID_CP2112 is not set +# CONFIG_HID_GT683R is not set +# CONFIG_HID_LENOVO is not set +# CONFIG_HID_LOGITECH_HIDPP is not set +# CONFIG_HID_PENMOUNT is not set +# CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_RMI is not set +# CONFIG_USB_OTG_FSM is not set +CONFIG_USB_XHCI_PCI=y +# CONFIG_USB_MAX3421_HCD is not set +# CONFIG_USB_UAS is not set +# CONFIG_USBIP_CORE is not set +# CONFIG_USB_ISP1760 is not set +# CONFIG_USB_LINK_LAYER_TEST is not set +# CONFIG_USB_CHAOSKEY is not set +# CONFIG_USB_LED_TRIG is not set +# CONFIG_MMC_USDHI6ROL0 is not set +# CONFIG_MMC_TOSHIBA_PCI is not set +# CONFIG_LEDS_CLASS_FLASH is not set +# CONFIG_LEDS_LP8860 is not set +# CONFIG_EDAC_IE31200 is not set +# CONFIG_RTC_DRV_ABB5ZES3 is not set +# CONFIG_RTC_DRV_ABX80X is not set +# CONFIG_RTC_DRV_PCF85063 is not set +# CONFIG_RTC_DRV_DS1343 is not set +# CONFIG_RTC_DRV_DS1347 is not set +# CONFIG_RTC_DRV_MCP795 is not set +# CONFIG_RTC_DRV_DS1685_FAMILY is not set +# CONFIG_RTC_DRV_DS2404 is not set +# CONFIG_RTC_DRV_XGENE is not set +# CONFIG_FB_SM750 is not set +# CONFIG_GS_FPGABOOT is not set +# CONFIG_UNISYSSPAR is not set +# CONFIG_FB_TFT is not set +# CONFIG_DELL_SMO8800 is not set +# CONFIG_TOSHIBA_HAPS is not set +# CONFIG_COMMON_CLK_PXA is not set +# CONFIG_COMMON_CLK_CDCE706 is not set +# CONFIG_ATMEL_PIT is not set +# CONFIG_SH_TIMER_CMT is not set +# CONFIG_SH_TIMER_MTU2 is not set +# CONFIG_SH_TIMER_TMU is not set +# CONFIG_EM_TIMER_STI is not set +# CONFIG_SOC_TI is not set +# CONFIG_PM_DEVFREQ_EVENT is not set +# CONFIG_BCM_KONA_USB2_PHY is not set +# CONFIG_MCB is not set +CONFIG_RAS=y +# CONFIG_ANDROID is not set +CONFIG_EFI_RUNTIME_WRAPPERS=y +# CONFIG_F2FS_FS is not set +# CONFIG_FS_DAX is not set +# CONFIG_OVERLAY_FS is not set +CONFIG_KERNFS=y +CONFIG_EFIVAR_FS=m +# CONFIG_SQUASHFS_LZ4 is not set +# CONFIG_PSTORE_PMSG is not set +# CONFIG_NFSD_PNFS is not set +CONFIG_GRACE_PERIOD=y +CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 +# CONFIG_DEBUG_INFO_SPLIT is not set +# CONFIG_DEBUG_INFO_DWARF4 is not set +# CONFIG_GDB_SCRIPTS is not set +# CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_EXTENSION is not set +CONFIG_HAVE_ARCH_KASAN=y +# CONFIG_KASAN is not set +CONFIG_KASAN_SHADOW_OFFSET=0xdffffc0000000000 +# CONFIG_SCHED_STACK_END_CHECK is not set +# CONFIG_DEBUG_TIMEKEEPING is not set +# CONFIG_LOCK_TORTURE_TEST is not set +# CONFIG_PROVE_RCU is not set +# CONFIG_TORTURE_TEST is not set +# CONFIG_TRACEPOINT_BENCHMARK is not set +# CONFIG_TEST_HEXDUMP is not set +# CONFIG_TEST_RHASHTABLE is not set +# CONFIG_TEST_LKM is not set +# CONFIG_TEST_BPF is not set +# CONFIG_TEST_FIRMWARE is not set +# CONFIG_TEST_UDELAY is not set +# CONFIG_MEMTEST is not set +CONFIG_INTEGRITY=y +# CONFIG_INTEGRITY_SIGNATURE is not set +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_GHASH=m +# CONFIG_CRYPTO_DES3_EDE_X86_64 is not set +# CONFIG_CRYPTO_DRBG_MENU is not set +# CONFIG_CRYPTO_USER_API_RNG is not set +# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set +CONFIG_KVM_COMPAT=y +# CONFIG_HAVE_ARCH_BITREVERSE is not set +CONFIG_RATIONAL=y +CONFIG_ARCH_HAS_FAST_MULTIPLIER=y +# CONFIG_AUDIT_ARCH_COMPAT_GENERIC is not set +CONFIG_HAS_IOPORT_MAP=y +CONFIG_GLOB=y +# CONFIG_GLOB_SELFTEST is not set +CONFIG_UIO=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86-standard-only.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86-standard-only.cfg new file mode 100644 index 00000000..bfc1701d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86-standard-only.cfg @@ -0,0 +1,3 @@ +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_MADVISE=y +CONFIG_X86_POWERNOW_K8=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86-user-config.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86-user-config.cfg new file mode 100644 index 00000000..d7deecfb --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86-user-config.cfg @@ -0,0 +1,391 @@ +# +# IRQ subsystem +# +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_IRQ_DOMAIN=y + +CONFIG_CGROUP_PERF=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CHECKPOINT_RESTORE=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_MODVERSIONS=y +CONFIG_MODULE_SRCVERSION_ALL=y +CONFIG_BLK_DEV_BSGLIB=y +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_THROTTLING=y +# +# Partition Types +# +CONFIG_PARTITION_ADVANCED=y + +# +# IO Schedulers +# +CONFIG_X86_AMD_PLATFORM_DEVICE=y +CONFIG_PROCESSOR_SELECT=y +CONFIG_CPU_SUP_AMD=y +CONFIG_HPET_TIMER=y +CONFIG_HPET_EMULATE_RTC=y +CONFIG_GART_IOMMU=y +CONFIG_SWIOTLB=y +CONFIG_NR_CPUS=256 +CONFIG_X86_MCE=y +CONFIG_X86_MCE_AMD=y +CONFIG_X86_MCE_INJECT=m + +# +# Performance monitoring +# +CONFIG_MICROCODE=y +CONFIG_MICROCODE_AMD=y +CONFIG_X86_MSR=m +CONFIG_X86_CPUID=m +CONFIG_NUMA=y +CONFIG_AMD_NUMA=y +CONFIG_X86_64_ACPI_NUMA=y +CONFIG_NODES_SHIFT=6 +CONFIG_ARCH_MEMORY_PROBE=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_HAVE_BOOTMEM_INFO_NODE=y +CONFIG_MEMORY_HOTPLUG=y +CONFIG_MEMORY_HOTPLUG_SPARSE=y +CONFIG_MEMORY_HOTREMOVE=y +CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y +CONFIG_BOUNCE=y +CONFIG_MMU_NOTIFIER=y +CONFIG_KSM=y +CONFIG_MEMORY_FAILURE=y +CONFIG_CLEANCACHE=y +CONFIG_FRONTSWAP=y +CONFIG_CMA=y +CONFIG_KEXEC=y +CONFIG_CRASH_DUMP=y +CONFIG_PHYSICAL_ALIGN=0x1000000 +CONFIG_RANDOMIZE_MEMORY=y +CONFIG_RANDOMIZE_MEMORY_PHYSICAL_PADDING=0xa +CONFIG_COMPAT_VDSO=y +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +CONFIG_USE_PERCPU_NUMA_NODE_ID=y + +# +# Power management and ACPI options +# +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_PM_STD_PARTITION="" +CONFIG_PM_TRACE=y +CONFIG_PM_TRACE_RTC=y +CONFIG_ACPI_VIDEO=m +CONFIG_ACPI_NUMA=y +CONFIG_ACPI_SBS=m +CONFIG_ACPI_HED=y +CONFIG_ACPI_BGRT=y +CONFIG_ACPI_APEI=y +CONFIG_ACPI_APEI_PCIEAER=y +CONFIG_ACPI_APEI_MEMORY_FAILURE=y +CONFIG_ACPI_APEI_EINJ=m +CONFIG_ACPI_APEI_ERST_DEBUG=m + +# +# CPU Frequency scaling +# +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y + +# +# CPU frequency scaling drivers +# +CONFIG_X86_PCC_CPUFREQ=y +CONFIG_X86_ACPI_CPUFREQ=y +CONFIG_X86_ACPI_CPUFREQ_CPB=y +CONFIG_X86_POWERNOW_K8=y +CONFIG_X86_AMD_FREQ_SENSITIVITY=m +CONFIG_X86_SPEEDSTEP_CENTRINO=y +CONFIG_X86_P4_CLOCKMOD=m + +# +# shared options +# +CONFIG_X86_SPEEDSTEP_LIB=m + + +# +# Bus options (PCI etc.) +# +CONFIG_PCI_MMCONFIG=y +CONFIG_PCI_REALLOC_ENABLE_AUTO=y +CONFIG_PCI_STUB=m +CONFIG_PCI_ATS=y +CONFIG_PCI_IOV=y +CONFIG_PCI_PRI=y +CONFIG_PCI_PASID=y +CONFIG_HOTPLUG_PCI_PCIE=y +CONFIG_HOTPLUG_PCI_CPCI=y +CONFIG_HOTPLUG_PCI_CPCI_GENERIC=m + +# +# PCI host controller drivers +# +CONFIG_AMD_NB=y + +# +# RapidIO Switch drivers +# +CONFIG_SYSFB_SIMPLEFB=y + + +# +# Queueing/Scheduling +# +CONFIG_NET_SCH_FQ=m +# +# Misc devices +# +CONFIG_ENCLOSURE_SERVICES=m + +# +# EEPROM support +# +CONFIG_EEPROM_LEGACY=m + + +# +# Controllers with non-SFF native interface +# +CONFIG_SATA_AHCI_PLATFORM=m + + +# +# Distributed Switch Architecture drivers +# +CONFIG_E1000=y +CONFIG_E1000E=y +CONFIG_E1000E_HWTS=y +CONFIG_IGB=y +CONFIG_IGB_HWMON=y +CONFIG_IGBVF=y +CONFIG_IXGB=y +CONFIG_IXGBE=y +CONFIG_IXGBE_HWMON=y +CONFIG_IXGBEVF=y + +# +# MDIO bus device drivers +# +CONFIG_MDIO_GPIO=m + +# +# MII PHY device drivers +# +CONFIG_AMD_PHY=m + +CONFIG_SERIAL_8250_NR_UARTS=48 +CONFIG_SERIAL_8250_RUNTIME_UARTS=32 +CONFIG_SERIAL_8250_EXTENDED=y +CONFIG_SERIAL_8250_MANY_PORTS=y +CONFIG_SERIAL_8250_SHARE_IRQ=y +CONFIG_SERIAL_8250_DETECT_IRQ=y +CONFIG_SERIAL_8250_RSA=y +CONFIG_SERIAL_8250_DW=y + +# +# Non-8250 serial port support +# +CONFIG_IPMI_HANDLER=m +CONFIG_NVRAM=m + +# +# PCMCIA character devices +# +CONFIG_HANGCHECK_TIMER=m +CONFIG_TCG_TPM=y + +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_PIIX4=m +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_CBUS_GPIO=m +CONFIG_I2C_DESIGNWARE_CORE=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_I2C_DESIGNWARE_PCI=m +CONFIG_I2C_DESIGNWARE_BAYTRAIL=y +CONFIG_I2C_GPIO=m +CONFIG_I2C_KEMPLD=m +CONFIG_I2C_OCORES=m +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=m +# +# Pin controllers +# +CONFIG_PINCTRL_AMD=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_ACPI=y +CONFIG_DEBUG_GPIO=y +CONFIG_GPIO_SYSFS=y +CONFIG_GPIO_GENERIC=y +# +# Memory mapped GPIO drivers +# +CONFIG_GPIO_GENERIC_PLATFORM=y + +# +# PCI GPIO expanders +# +CONFIG_GPIO_ML_IOH=m + +# +# Native drivers +# +CONFIG_SENSORS_K10TEMP=m +CONFIG_SENSORS_FAM15H_POWER=m + +# +# ACPI drivers +# +CONFIG_SENSORS_ACPI_POWER=m + + +# +# Graphics support +# +CONFIG_AGP_AMD64=y +CONFIG_VGA_SWITCHEROO=y + + +# +# Frame buffer Devices +# + +# +# Frame buffer hardware drivers +# + +# +# Console display driver support +# + + +# +# CODEC drivers +# + + +# +# USB HID support +# +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + +CONFIG_USB_OHCI_HCD_PCI=y +CONFIG_USB_OHCI_HCD_PLATFORM=y + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_MMC_SPI=m + +CONFIG_EDAC_SUPPORT=y +CONFIG_EDAC=y +CONFIG_EDAC_LEGACY_SYSFS=y +CONFIG_EDAC_DECODE_MCE=y +CONFIG_EDAC_AMD64=y + +# +# DMABUF options +# +CONFIG_AUXDISPLAY=y + + +# +# Clock Source drivers +# +CONFIG_IOMMU_API=y +CONFIG_IOMMU_SUPPORT=y + +# +# Generic IOMMU Pagetable Support +# +CONFIG_IOMMU_IOVA=y +CONFIG_AMD_IOMMU=y +CONFIG_AMD_IOMMU_V2=y +CONFIG_DMAR_TABLE=y +CONFIG_IRQ_REMAP=y + +# +# Broadcom SoC drivers +# +CONFIG_PM_DEVFREQ=y + +# +# DEVFREQ Governors +# +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_POWERSAVE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +# CONFIG_DEVFREQ_GOV_PASSIVE is not set + + +CONFIG_MEMORY=y + +# +# Firmware Drivers +# +CONFIG_EDD=y +CONFIG_EDD_OFF=y +CONFIG_DMI_SYSFS=m + +# +# EFI (Extensible Firmware Interface) Support +# +CONFIG_EFI_VARS=y +CONFIG_EFI_VARS_PSTORE=m +CONFIG_EFI_RUNTIME_MAP=y +CONFIG_UEFI_CPER=y + +# +# CD-ROM/DVD Filesystems +# +CONFIG_UDF_FS=m + + +# +# Pseudo filesystems +# +CONFIG_PROC_VMCORE=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_PSTORE=y + +# +# Compile-time checks and compiler options +# +CONFIG_DEBUG_KERNEL=y + +CONFIG_SECURITYFS=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_INTERVAL_TREE=y + +# +# Graphics support +# + +# +# Console display driver support +# + diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86.cfg new file mode 100644 index 00000000..b321cee6 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/amdx86.cfg @@ -0,0 +1,59 @@ +CONFIG_PRINTK=y + +# Basic hardware support for the box - network, USB, PCI, sound +CONFIG_NETDEVICES=y +CONFIG_ATA=y +CONFIG_ATA_GENERIC=y +CONFIG_ATA_SFF=y +CONFIG_PCI=y +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PCI=y +CONFIG_USB_SUPPORT=y +CONFIG_USB=y +CONFIG_PATA_SCH=y +CONFIG_USB_EHCI_HCD=y +CONFIG_PCIEPORTBUS=y +CONFIG_NET=y +CONFIG_USB_UHCI_HCD=y +CONFIG_BLK_DEV_SD=y +CONFIG_CHR_DEV_SG=y + +# Make sure these are on, otherwise the bootup won't be fun +CONFIG_EXT3_FS=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_MODULES=y +CONFIG_SHMEM=y +CONFIG_TMPFS=y +CONFIG_PACKET=y + +CONFIG_I2C=y +CONFIG_AGP=y +CONFIG_PM=y +CONFIG_ACPI=y +CONFIG_INPUT=y + +# Needed for booting (and using) USB memory sticks +CONFIG_BLK_DEV_LOOP=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y + +CONFIG_RD_GZIP=y + +# Filesystems +CONFIG_EXT2_FS_SECURITY=y +CONFIG_NFSD=m +CONFIG_NFSD_V3=y +CONFIG_NFSD_V4=y +CONFIG_QFMT_V2 +CONFIG_QUOTA=y +CONFIG_QUOTA_NETLINK_INTERFACE=y +CONFIG_QUOTA_TREE=m +CONFIG_QUOTACTL=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TMPFS_XATTR=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/console.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/console.cfg new file mode 100644 index 00000000..9e30450e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/console.cfg @@ -0,0 +1,7 @@ +CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +CONFIG_FB_TILEBLITTING=y +CONFIG_FB_EFI=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FB_VESA=y +CONFIG_FB_SIMPLE=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/core.scc b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/core.scc new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/core.scc diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/disable-bluetooth.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/disable-bluetooth.cfg new file mode 100644 index 00000000..ce6ddb43 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/disable-bluetooth.cfg @@ -0,0 +1 @@ +# CONFIG_BT is not set diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/disable-graphics.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/disable-graphics.cfg new file mode 100644 index 00000000..615724e7 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/disable-graphics.cfg @@ -0,0 +1,2 @@ +# CONFIG_DRM is not set +# CONFIG_AGP is not set diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/disable-kgdb.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/disable-kgdb.cfg new file mode 100644 index 00000000..b8a2218b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/disable-kgdb.cfg @@ -0,0 +1 @@ +# CONFIG_KGDB is not set diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/dpdk.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/dpdk.cfg new file mode 100644 index 00000000..00225509 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/dpdk.cfg @@ -0,0 +1,5 @@ +CONFIG_UIO_PCI_GENERIC=m + +CONFIG_VFIO_PCI=m +CONFIG_VFIO_VIRQFD=m +CONFIG_VFIO_NOIOMMU=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/enable-bluetooth.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/enable-bluetooth.cfg new file mode 100644 index 00000000..581830f0 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/enable-bluetooth.cfg @@ -0,0 +1,13 @@ +CONFIG_BT=m +CONFIG_BT_RFCOMM=m +CONFIG_BT_BNEP=m +CONFIG_BT_HIDP=m +CONFIG_BT_HCIBFUSB=m +CONFIG_BT_HCIBTUSB=m +CONFIG_BT_HCIBTSDIO=m +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIBCM203X=m +CONFIG_BT_HCIBPA10X=m +CONFIG_BT_HCIVHCI=m +CONFIG_BT_MRVL=m +CONFIG_BT_ATH3K=m diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/enable-graphics.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/enable-graphics.cfg new file mode 100644 index 00000000..e90c34d6 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/enable-graphics.cfg @@ -0,0 +1,2 @@ +CONFIG_DRM=y +CONFIG_AGP=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/enable-kgdb.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/enable-kgdb.cfg new file mode 100644 index 00000000..55f296b2 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/enable-kgdb.cfg @@ -0,0 +1,3 @@ +CONFIG_KGDB=y +CONFIG_KGDB_LOW_LEVEL_TRAP=y +CONFIG_KGDB_KDB=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/fragment.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/fragment.cfg new file mode 100644 index 00000000..d5898024 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/fragment.cfg @@ -0,0 +1,124 @@ +# CONFIG_DRM_CIRRUS_QEMU is not set +# CONFIG_AGP_INTEL is not set +# CONFIG_DRM_I915 is not set + +CONFIG_AQUANTIA_PHY=y +CONFIG_I2C_CCGX_UCSI=y +CONFIG_I2C_AMD_MP2=y +CONFIG_I2C_NVIDIA_GPU=y +CONFIG_TYPEC=y +# CONFIG_TYPEC_TCPM is not set +CONFIG_TYPEC_UCSI=y +# CONFIG_UCSI_ACPI is not set +# CONFIG_TYPEC_TPS6598X is not set +# CONFIG_TYPEC_STUSB160X is not set + +# +# USB Type-C Multiplexer/DeMultiplexer Switch support +# +# CONFIG_TYPEC_MUX_PI3USB30532 is not set +# end of USB Type-C Multiplexer/DeMultiplexer Switch support + +# +# USB Type-C Alternate Mode drivers +# +# CONFIG_TYPEC_DP_ALTMODE is not set +# end of USB Type-C Alternate Mode drivers + +CONFIG_UNICODE=y +# CONFIG_UNICODE_NORMALIZATION_SELFTEST is not set + +CONFIG_I2C_PIIX4=y +CONFIG_I2C_DESIGNWARE_PCI=y +CONFIG_I3C=y +# CONFIG_CDNS_I3C_MASTER is not set +CONFIG_DW_I3C_MASTER=y +# CONFIG_SVC_I3C_MASTER is not set +# CONFIG_MIPI_I3C_HCI is not set +CONFIG_UCSI_CCG=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +CONFIG_PERF_EVENTS_AMD_POWER=y +CONFIG_PERF_EVENTS_AMD_BRS=y +CONFIG_AMD_HSMP=y + + +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_DRM_FBDEV_EMULATION=y +CONFIG_DRM_FBDEV_OVERALLOC=100 +CONFIG_FB_NOTIFY=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SYS_FILLRECT=y +CONFIG_FB_SYS_COPYAREA=y +CONFIG_FB_SYS_IMAGEBLIT=y +# CONFIG_FB_FOREIGN_ENDIAN is not set +CONFIG_FB_SYS_FOPS=y +CONFIG_FB_DEFERRED_IO=y +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_CIRRUS is not set +# CONFIG_FB_PM2 is not set +# CONFIG_FB_CYBER2000 is not set +# CONFIG_FB_ARC is not set +# CONFIG_FB_ASILIANT is not set +# CONFIG_FB_IMSTT is not set +# CONFIG_FB_VGA16 is not set +# CONFIG_FB_UVESA is not set +# CONFIG_FB_N411 is not set +# CONFIG_FB_HGA is not set +# CONFIG_FB_OPENCORES is not set +# CONFIG_FB_S1D13XXX is not set +# CONFIG_FB_NVIDIA is not set +# CONFIG_FB_RIVA is not set +# CONFIG_FB_I740 is not set +# CONFIG_FB_LE80578 is not set +# CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON is not set +# CONFIG_FB_ATY128 is not set +# CONFIG_FB_ATY is not set +# CONFIG_FB_S3 is not set +# CONFIG_FB_SAVAGE is not set +# CONFIG_FB_SIS is not set +# CONFIG_FB_VIA is not set +# CONFIG_FB_NEOMAGIC is not set +# CONFIG_FB_KYRO is not set +# CONFIG_FB_3DFX is not set +# CONFIG_FB_VOODOO1 is not set +# CONFIG_FB_VT8623 is not set +# CONFIG_FB_TRIDENT is not set +# CONFIG_FB_ARK is not set +# CONFIG_FB_PM3 is not set +# CONFIG_FB_CARMINE is not set +# CONFIG_FB_SMSCUFX is not set +# CONFIG_FB_UDL is not set +# CONFIG_FB_IBM_GXT4500 is not set +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_SSD1307 is not set +# CONFIG_FB_SM712 is not set +CONFIG_FRAMEBUFFER_CONSOLE=y +# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set +# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set + +# CONFIG_LOGO is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x8=y + +CONFIG_TIGON3=y +CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y + +CONFIG_FB_BOOT_VESA_SUPPORT=y +CONFIG_FB_VESA=y +CONFIG_FB_EFI=y +CONFIG_FB_SIMPLE=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/hid.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/hid.cfg new file mode 100644 index 00000000..cbab0fa7 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/hid.cfg @@ -0,0 +1,5 @@ +CONFIG_HID_A4TECH=m +CONFIG_HID_LOGITECH=m +CONFIG_HID_LOGITECH_DJ=m +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MULTITOUCH=m diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/kvm.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/kvm.cfg new file mode 100644 index 00000000..f4ca1c77 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/kvm.cfg @@ -0,0 +1,39 @@ +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +# CONFIG_TASK_XACCT is not set + +CONFIG_USER_RETURN_NOTIFIER=y +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_VFIO_IOMMU_TYPE1=y +CONFIG_VFIO_VIRQFD=y +CONFIG_VFIO=y +# CONFIG_VFIO_NOIOMMU is not set +CONFIG_VFIO_PCI=y +# CONFIG_VFIO_PCI_VGA is not set +CONFIG_VFIO_PCI_MMAP=y +CONFIG_VFIO_PCI_INTX=y +CONFIG_VFIO_PCI_IGD=y +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_VIRT_DRIVERS=y +CONFIG_SCHED_INFO=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTIO_INPUT=y + +CONFIG_HAVE_KVM_IRQCHIP=y +CONFIG_HAVE_KVM_IRQFD=y +CONFIG_HAVE_KVM_IRQ_ROUTING=y +CONFIG_HAVE_KVM_EVENTFD=y +CONFIG_KVM_MMIO=y +CONFIG_KVM_ASYNC_PF=y +CONFIG_HAVE_KVM_MSI=y +CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT=y +CONFIG_KVM_VFIO=y +CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_KVM_COMPAT=y +CONFIG_HAVE_KVM_IRQ_BYPASS=y +CONFIG_KVM=y +# CONFIG_KVM_INTEL is not set +CONFIG_KVM_AMD=y +# CONFIG_KVM_MMU_AUDIT is not set + +CONFIG_KVM_AMD_SEV=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/logo.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/logo.cfg new file mode 100644 index 00000000..9772c12e --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/logo.cfg @@ -0,0 +1 @@ +CONFIG_LOGO=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/net-phy.scc b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/net-phy.scc new file mode 100644 index 00000000..028f32c1 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/net-phy.scc @@ -0,0 +1,3 @@ +# out-of-tree +patch 9049-net-phy-aquantia-Added-support-for-AQR113-PHY-device.patch +patch 9050-Add-10M-support-in-PHY-device-supported-field.patch diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/smbus.scc b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/smbus.scc new file mode 100644 index 00000000..97fc8944 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/smbus.scc @@ -0,0 +1,2 @@ +# out-of-tree +patch 9011-i2c-amd-mp2-avoid-using-pci_intx-if-msi-or-msix-is-s.patch diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/sound.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/sound.cfg new file mode 100644 index 00000000..250714ae --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/sound.cfg @@ -0,0 +1,29 @@ +CONFIG_SOUND=y +CONFIG_SND=y +CONFIG_SND_SEQUENCER=y +CONFIG_SND_SEQ_DUMMY=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_HRTIMER=y +CONFIG_SND_DYNAMIC_MINORS=y +CONFIG_SND_PCSP=y +CONFIG_SND_HDA_GENERIC=y +CONFIG_SND_HDA_INTEL=y +CONFIG_SND_HDA_HWDEP=y +CONFIG_SND_HDA_INPUT_BEEP=y +CONFIG_SND_HDA_PATCH_LOADER=y +CONFIG_SND_HDA_CODEC_REALTEK=y +CONFIG_SND_HDA_CODEC_ANALOG=y +CONFIG_SND_HDA_CODEC_SIGMATEL=y +CONFIG_SND_HDA_CODEC_VIA=y +CONFIG_SND_HDA_CODEC_HDMI=y +CONFIG_SND_HDA_CODEC_CIRRUS=y +CONFIG_SND_HDA_CODEC_CONEXANT=y +CONFIG_SND_HDA_CODEC_CA0110=y +CONFIG_SND_HDA_CODEC_CA0132=y +CONFIG_SND_HDA_CODEC_CMEDIA=y +CONFIG_SND_HDA_CODEC_SI3054=y +CONFIG_SND_USB_AUDIO=y +CONFIG_SND_PCM_OSS=m +CONFIG_SND_PCM_OSS_PLUGINS=y +CONFIG_SND_SEQUENCER_OSS=y +CONFIG_SND_SOC=m diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/spi-driver.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/spi-driver.cfg new file mode 100644 index 00000000..67795055 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/spi-driver.cfg @@ -0,0 +1 @@ +CONFIG_SPI_AMD=m diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/spi.scc b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/spi.scc new file mode 100644 index 00000000..47f71f4f --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/spi.scc @@ -0,0 +1,2 @@ +# out-of-tree +patch 9002-spi-spidev-Add-dummy-spidev-device-to-SPI-bus.patch diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/ucsi.scc b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/ucsi.scc new file mode 100644 index 00000000..2579c03f --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/ucsi.scc @@ -0,0 +1,2 @@ +# out-of-tree +patch 9017-Add-support-to-instantiate-CCGx-UCSI-driver.patch diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/upstream.scc b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/upstream.scc new file mode 100644 index 00000000..00dcf5de --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/upstream.scc @@ -0,0 +1,68 @@ +patch 0012-i2c-Introduce-common-module-to-instantiate-CCGx-UCSI.patch +patch 0013-i2c-nvidia-gpu-Switch-to-use-i2c_new_ccgx_ucsi.patch +patch 0014-i2c-nvidia-gpu-Use-temporary-variable-for-struct-dev.patch +patch 0015-i2c-nvidia-gpu-Convert-to-use-dev_err_probe.patch +patch 0016-i2c-designware-pci-Switch-to-use-i2c_new_ccgx_ucsi.patch +patch 0018-watchdog-sp5100_tco-Add-support-for-get_timeleft.patch +patch 0027-net-amd-xgbe-Add-Support-for-Yellow-Carp-Ethernet-de.patch +patch 0028-net-amd-xgbe-Alter-the-port-speed-bit-range.patch +patch 0029-net-amd-xgbe-Disable-the-CDR-workaround-path-for-Yel.patch +patch 0030-hwmon-k10temp-Remove-unused-definitions.patch +patch 0031-x86-amd_nb-Add-AMD-Family-19h-Models-10h-1Fh-and-A0h.patch +patch 0032-hwmon-k10temp-Add-support-for-AMD-Family-19h-Models-.patch +patch 0033-hwmon-k10temp-Support-up-to-12-CCDs-on-AMD-Family-of.patch +patch 0034-x86-MCE-AMD-Export-smca_get_bank_type-symbol.patch +patch 0035-x86-MCE-AMD-EDAC-amd64-Move-address-translation-to-A.patch +patch 0036-x86-amd_nb-EDAC-amd64-Move-DF-Indirect-Read-to-AMD64.patch +patch 0037-EDAC-amd64-Allow-for-DF-Indirect-Broadcast-reads.patch +patch 0038-EDAC-amd64-Add-context-struct.patch +patch 0039-EDAC-Add-RDDR5-and-LRDDR5-memory-types.patch +patch 0040-EDAC-amd64-Add-support-for-AMD-Family-19h-Models-10h.patch +patch 0041-x86-MCE-AMD-EDAC-mce_amd-Add-new-SMCA-bank-types.patch +patch 0042-drm-amdgpu-Register-MCE-notifier-for-Aldebaran-RAS.patch +patch 0043-x86-MCE-AMD-EDAC-mce_amd-Support-non-uniform-MCA-ban.patch +patch 0044-KVM-SVM-Ensure-target-pCPU-is-read-once-when-signall.patch +patch 0045-platform-x86-Add-AMD-system-management-interface.patch +patch 0046-amd_hsmp-Add-HSMP-protocol-version-5-messages.patch +patch 0047-watchdog-Kconfig-fix-help-text-indentation.patch +patch 0048-watchdog-Allow-building-BCM7038_WDT-for-BCM63XX.patch +patch 0049-watchdog-renesas_wdt-Add-R-Car-Gen4-support.patch +patch 0050-watchdog-allow-building-BCM7038_WDT-for-BCM4908.patch +patch 0051-watchdog-orion_wdt-support-pretimeout-on-Armada-XP.patch +patch 0052-watchdog-ixp4xx-Implement-restart.patch +patch 0053-perf-Enable-branch-record-for-software-events.patch +patch 0054-x86-cpufeatures-Add-AMD-Collaborative-Processor-Perf.patch +patch 0055-x86-perf-Move-RDPMC-event-flag-to-a-common-definitio.patch +patch 0056-x86-msr-Add-AMD-CPPC-MSR-definitions.patch +patch 0057-perf-x86-intel-lbr-Support-LBR-format-V7.patch +patch 0058-perf-core-Add-perf_clear_branch_entry_bitfields-help.patch +patch 0059-x86-cpufeatures-Add-AMD-Fam19h-Branch-Sampling-featu.patch +patch 0060-perf-x86-amd-Add-AMD-Fam19h-Branch-Sampling-support.patch +patch 0061-perf-x86-amd-Add-branch-brs-helper-event-for-Fam19h-.patch +patch 0062-perf-x86-amd-Enable-branch-sampling-priv-level-filte.patch +patch 0063-perf-x86-amd-Add-AMD-branch-sampling-period-adjustme.patch +patch 0064-perf-x86-amd-Make-Zen3-branch-sampling-opt-in.patch +patch 0065-ACPI-processor-idle-Use-swap-instead-of-open-coding-.patch +patch 0066-ACPI-Add-perf-low-power-callback.patch +patch 0067-perf-x86-amd-Add-idle-hooks-for-branch-sampling.patch +patch 0068-perf-x86-Unify-format-of-events-sysfs-show.patch +patch 0069-x86-cpufeatures-Add-PerfMonV2-feature-bit.patch +patch 0070-x86-msr-Add-PerfCntrGlobal-registers.patch +patch 0071-perf-x86-amd-core-Detect-PerfMonV2-support.patch +patch 0072-perf-x86-amd-core-Detect-available-counters.patch +patch 0073-perf-x86-amd-core-Add-PerfMonV2-counter-control.patch +patch 0074-perf-x86-amd-core-Add-PerfMonV2-overflow-handling.patch +patch 0075-perf-amd-ibs-Use-is_visible-callback-for-dynamic-att.patch +patch 0076-perf-amd-ibs-Add-support-for-L3-miss-filtering.patch +patch 0077-perf-amd-ibs-Advertise-zen4_ibs_extensions-as-pmu-ca.patch +patch 0078-perf-x86-amd-Remove-unused-variable-hwc.patch +patch 0079-perf-x86-amd-Fix-AMD-BRS-period-adjustment.patch +patch 0080-perf-x86-amd-Run-AMD-BRS-code-only-on-supported-hw.patch +patch 0081-perf-x86-amd-core-Fix-reloading-events-for-SVM.patch +patch 0082-x86-cpufeatures-Add-virtual-TSC_AUX-feature-bit.patch +patch 0083-KVM-SVM-Move-RESET-emulation-to-svm_vcpu_reset.patch +patch 0084-KVM-SEV-ES-Use-V_TSC_AUX-if-available-instead-of-RDT.patch +patch 0085-EDAC-amd64-Set-memory-type-per-DIMM.patch +patch 0086-EDAC-amd64-Add-new-register-offset-support-and-relat.patch +patch 0087-NFS-Fix-WARN_ON-due-to-unionization-of-nfs_inode.nre.patch +patch 0088-net-amd-xgbe-add-missed-tasklet_kill.patch diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/usb-serial.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/usb-serial.cfg new file mode 100644 index 00000000..11402439 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/usb-serial.cfg @@ -0,0 +1 @@ +CONFIG_USB_SERIAL_MOS7840=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/usb.scc b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/usb.scc new file mode 100644 index 00000000..9c1a8795 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/usb.scc @@ -0,0 +1,2 @@ +# out-of-tree +patch 9023-usb-xhci-Add-LPM-support-to-AMD-xhci-controller.patch diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/wdt-driver.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/wdt-driver.cfg new file mode 100644 index 00000000..a4f53782 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/wdt-driver.cfg @@ -0,0 +1 @@ +CONFIG_SP5100_TCO=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/wdt.scc b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/wdt.scc new file mode 100644 index 00000000..e69de29b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/wdt.scc diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/wifi-drivers.cfg b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/wifi-drivers.cfg new file mode 100644 index 00000000..8b407303 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/wifi-drivers.cfg @@ -0,0 +1,9 @@ +CONFIG_CFG80211_WEXT=y +CONFIG_WEXT_CORE=y +CONFIG_WEXT_PROC=y +CONFIG_IWLWIFI=m +CONFIG_IWLDVM=m +CONFIG_IWLWIFI_OPMODE_MODULAR=y +CONFIG_CARL9170=m +CONFIG_CARL9170_LEDS=y +CONFIG_CARL9170_WPC=y diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/xgbe.scc b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/xgbe.scc new file mode 100644 index 00000000..9a0b8e44 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-5.15/xgbe.scc @@ -0,0 +1,28 @@ +# out-of-tree +patch 9030-amd-xgbe-fix-for-the-crash-which-happens-during-SFP-.patch +patch 9031-amd-xgbe-Fix-NETDEV-WATCHDOG-transmit-queue-timed-ou.patch +patch 9032-amd-xgbe-Fix-for-Network-fluctuations.patch +patch 9033-amd-xgbe-sets-XGBE_LINK_INIT-when-there-is-a-link-fa.patch +patch 9034-amd-xgbe-rrc-is-required-only-for-Fixed-PHY-configur.patch +patch 9035-amd-xgbe-increased-cdr-delay.patch +patch 9036-amd-xgbe-enable-PLL_CTRL-feature-for-fixed-PHY-only.patch +patch 9037-amd-xgbe-10KR-Modeset-every-AN-link-time-out.patch +patch 9038-amd-xgbe-PLL-enabled-for-10G-Base-T.patch +patch 9039-amd-xgbe-need-to-check-KR-training-before-restart-CL.patch +patch 9040-amd-xgbe-10G-RJ45-support-on-Fox-platform.patch +patch 9041-amd-xgbe-10G-RJ45-support-on-Fox-platform-with-AN-su.patch +patch 9042-amd-xgbe-Yellow-carp-devices-do-not-need-rrc.patch +patch 9043-amd-xgbe-10Gbaset-MDIO-for-10G.patch +patch 9044-amd-xgbe-RX-Adaptation-support-for-V3000.patch +patch 9045-amd-xgbe-limit-the-rx-adaptation-retries-to-MAX_RX_A.patch +patch 9046-amd-xgbe-do-not-enable-rx-adaptation-for-InPhi-redri.patch +patch 9047-amd-xgbe-RX-adapation-sending-proper-mailbox-command.patch +patch 9051-amd-xgbe-Add-support-for-10Mbps.patch +patch 9052-amd-xgbe-rx-adap-finetunings.patch +patch 9053-amd-xgbe-rx-adaptation-handle-SFP-connectors.patch +patch 9054-amd-xgbe-Fix-Tx_Timestamp_Timeout-error-while-runnin.patch +patch 9055-amd-xgbe-Update-SSINC-value-based-on-125MHz-PTP-cloc.patch +patch 9056-amd-xgbe-Add-support-for-molex-passive-cables.patch +patch 9057-amd-xgbe-For-mac-SNPSVER-0x30H-modifying-driver-to-u.patch +patch 9058-amd-xgbe-AIC2-rx-adaption-software-tuning-enablement.patch +patch 9059-amd-xgbe-Delay-AN-timeout-during-KR-training.patch diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-rt_5.15.bbappend b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-rt_5.15.bbappend new file mode 100644 index 00000000..5253fa6f --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-rt_5.15.bbappend @@ -0,0 +1,6 @@ +require linux-yocto-5.15.inc + +PR := "${INC_PR}.0" + +KBRANCH = "v5.15/standard/preempt-rt/base" +SRCREV_machine = "dba1b7d90813231782bdeda1bd169c93b35c94e0" diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto_5.15.bbappend b/meta-amd-bsp/recipes-kernel/linux/linux-yocto_5.15.bbappend new file mode 100644 index 00000000..41b8495d --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto_5.15.bbappend @@ -0,0 +1,6 @@ +require linux-yocto-5.15.inc + +PR := "${INC_PR}.0" + +KBRANCH = "v5.15/standard/base" +SRCREV_machine = "0e51e571701842db33ad96f6ddc8cc6b23230627" |