diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4614-drm-amdgpu-skip-rlc-ucode-loading-for-SRIOV-gfx10.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4614-drm-amdgpu-skip-rlc-ucode-loading-for-SRIOV-gfx10.patch | 119 |
1 files changed, 119 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4614-drm-amdgpu-skip-rlc-ucode-loading-for-SRIOV-gfx10.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4614-drm-amdgpu-skip-rlc-ucode-loading-for-SRIOV-gfx10.patch new file mode 100644 index 00000000..10a5a6dc --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4614-drm-amdgpu-skip-rlc-ucode-loading-for-SRIOV-gfx10.patch @@ -0,0 +1,119 @@ +From bc96184e89b8dc328d8c0e1c533d2315f6bb48bc Mon Sep 17 00:00:00 2001 +From: Monk Liu <Monk.Liu@amd.com> +Date: Tue, 26 Nov 2019 19:36:29 +0800 +Subject: [PATCH 4614/4736] drm/amdgpu: skip rlc ucode loading for SRIOV gfx10 + +Signed-off-by: Monk Liu <Monk.Liu@amd.com> +Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 80 +++++++++++++------------- + 1 file changed, 41 insertions(+), 39 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +index 914d4b2f8401..5bd31e49601c 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +@@ -684,59 +684,61 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev) + adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); + adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); + +- snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name); +- err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); +- if (err) +- goto out; +- err = amdgpu_ucode_validate(adev->gfx.rlc_fw); +- rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; +- version_major = le16_to_cpu(rlc_hdr->header.header_version_major); +- version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); +- if (version_major == 2 && version_minor == 1) +- adev->gfx.rlc.is_rlc_v2_1 = true; +- +- adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); +- adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); +- adev->gfx.rlc.save_and_restore_offset = ++ if (!amdgpu_sriov_vf(adev)) { ++ snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", chip_name); ++ err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev); ++ if (err) ++ goto out; ++ err = amdgpu_ucode_validate(adev->gfx.rlc_fw); ++ rlc_hdr = (const struct rlc_firmware_header_v2_0 *)adev->gfx.rlc_fw->data; ++ version_major = le16_to_cpu(rlc_hdr->header.header_version_major); ++ version_minor = le16_to_cpu(rlc_hdr->header.header_version_minor); ++ if (version_major == 2 && version_minor == 1) ++ adev->gfx.rlc.is_rlc_v2_1 = true; ++ ++ adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version); ++ adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version); ++ adev->gfx.rlc.save_and_restore_offset = + le32_to_cpu(rlc_hdr->save_and_restore_offset); +- adev->gfx.rlc.clear_state_descriptor_offset = ++ adev->gfx.rlc.clear_state_descriptor_offset = + le32_to_cpu(rlc_hdr->clear_state_descriptor_offset); +- adev->gfx.rlc.avail_scratch_ram_locations = ++ adev->gfx.rlc.avail_scratch_ram_locations = + le32_to_cpu(rlc_hdr->avail_scratch_ram_locations); +- adev->gfx.rlc.reg_restore_list_size = ++ adev->gfx.rlc.reg_restore_list_size = + le32_to_cpu(rlc_hdr->reg_restore_list_size); +- adev->gfx.rlc.reg_list_format_start = ++ adev->gfx.rlc.reg_list_format_start = + le32_to_cpu(rlc_hdr->reg_list_format_start); +- adev->gfx.rlc.reg_list_format_separate_start = ++ adev->gfx.rlc.reg_list_format_separate_start = + le32_to_cpu(rlc_hdr->reg_list_format_separate_start); +- adev->gfx.rlc.starting_offsets_start = ++ adev->gfx.rlc.starting_offsets_start = + le32_to_cpu(rlc_hdr->starting_offsets_start); +- adev->gfx.rlc.reg_list_format_size_bytes = ++ adev->gfx.rlc.reg_list_format_size_bytes = + le32_to_cpu(rlc_hdr->reg_list_format_size_bytes); +- adev->gfx.rlc.reg_list_size_bytes = ++ adev->gfx.rlc.reg_list_size_bytes = + le32_to_cpu(rlc_hdr->reg_list_size_bytes); +- adev->gfx.rlc.register_list_format = ++ adev->gfx.rlc.register_list_format = + kmalloc(adev->gfx.rlc.reg_list_format_size_bytes + +- adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL); +- if (!adev->gfx.rlc.register_list_format) { +- err = -ENOMEM; +- goto out; +- } ++ adev->gfx.rlc.reg_list_size_bytes, GFP_KERNEL); ++ if (!adev->gfx.rlc.register_list_format) { ++ err = -ENOMEM; ++ goto out; ++ } + +- tmp = (unsigned int *)((uintptr_t)rlc_hdr + +- le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes)); +- for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++) +- adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]); ++ tmp = (unsigned int *)((uintptr_t)rlc_hdr + ++ le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes)); ++ for (i = 0 ; i < (rlc_hdr->reg_list_format_size_bytes >> 2); i++) ++ adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]); + +- adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; ++ adev->gfx.rlc.register_restore = adev->gfx.rlc.register_list_format + i; + +- tmp = (unsigned int *)((uintptr_t)rlc_hdr + +- le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes)); +- for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++) +- adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]); ++ tmp = (unsigned int *)((uintptr_t)rlc_hdr + ++ le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes)); ++ for (i = 0 ; i < (rlc_hdr->reg_list_size_bytes >> 2); i++) ++ adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]); + +- if (adev->gfx.rlc.is_rlc_v2_1) +- gfx_v10_0_init_rlc_ext_microcode(adev); ++ if (adev->gfx.rlc.is_rlc_v2_1) ++ gfx_v10_0_init_rlc_ext_microcode(adev); ++ } + + snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec%s.bin", chip_name, wks); + err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); +-- +2.17.1 + |