1 files changed, 39 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4609-drm-amdgpu-gfx-Clear-more-EDC-cnt.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4609-drm-amdgpu-gfx-Clear-more-EDC-cnt.patch
new file mode 100644
index 00000000..d2b627bb
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4609-drm-amdgpu-gfx-Clear-more-EDC-cnt.patch
@@ -0,0 +1,39 @@
+From 7662a48fa43894acc6dd80ede850985de652d213 Mon Sep 17 00:00:00 2001
+From: James Zhu <James.Zhu@amd.com>
+Date: Tue, 26 Nov 2019 14:23:10 -0500
+Subject: [PATCH 4609/4736] drm/amdgpu/gfx: Clear more EDC cnt
+
+Clear SDMA and HDP EDC counter in GPR workarounds.
+
+Signed-off-by: James Zhu <James.Zhu@amd.com>
+Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+index 1aff77c89e7a..d008105a5757 100644
+--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+@@ -44,6 +44,8 @@
+ 
+ #include "amdgpu_ras.h"
+ 
++#include "sdma0/sdma0_4_0_offset.h"
++#include "sdma1/sdma1_4_0_offset.h"
+ #define GFX9_NUM_GFX_RINGS     1
+ #define GFX9_MEC_HPD_SIZE 4096
+ #define RLCG_UCODE_LOADING_START_ADDRESS 0x00002000L
+@@ -4032,6 +4034,9 @@ static const struct soc15_reg_entry sec_ded_counter_registers[] = {
+    { SOC15_REG_ENTRY(GC, 0, mmTCC_EDC_CNT2), 0, 1, 16},
+    { SOC15_REG_ENTRY(GC, 0, mmTCA_EDC_CNT), 0, 1, 2},
+    { SOC15_REG_ENTRY(GC, 0, mmSQC_EDC_CNT3), 0, 4, 6},
++   { SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_EDC_COUNTER), 0, 1, 1},
++   { SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_EDC_COUNTER), 0, 1, 1},
++   { SOC15_REG_ENTRY(HDP, 0, mmHDP_EDC_CNT), 0, 1, 1},
+ };
+ 
+ static int gfx_v9_0_do_edc_gds_workarounds(struct amdgpu_device *adev)
+-- 
+2.17.1
+