diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4607-drm-amdgpu-gfx10-unlock-srbm_mutex-after-queue-progr.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4607-drm-amdgpu-gfx10-unlock-srbm_mutex-after-queue-progr.patch | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4607-drm-amdgpu-gfx10-unlock-srbm_mutex-after-queue-progr.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4607-drm-amdgpu-gfx10-unlock-srbm_mutex-after-queue-progr.patch new file mode 100644 index 00000000..2c2b7f33 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4607-drm-amdgpu-gfx10-unlock-srbm_mutex-after-queue-progr.patch @@ -0,0 +1,51 @@ +From 8ba808c2f1cf3757741eec7d2288d15ae6f2e431 Mon Sep 17 00:00:00 2001 +From: Xiaojie Yuan <xiaojie.yuan@amd.com> +Date: Wed, 6 Nov 2019 21:10:20 +0800 +Subject: [PATCH 4607/4736] drm/amdgpu/gfx10: unlock srbm_mutex after queue + programming finish + +srbm_mutex is to guarantee atomicity for r/w of gfx indexed registers + +Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +index bfc2b8f8c1d4..96a9acb0dd6a 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +@@ -2829,7 +2829,7 @@ static int gfx_v10_0_cp_gfx_resume(struct amdgpu_device *adev) + /* Init gfx ring 0 for pipe 0 */ + mutex_lock(&adev->srbm_mutex); + gfx_v10_0_cp_gfx_switch_pipe(adev, PIPE_ID0); +- mutex_unlock(&adev->srbm_mutex); ++ + /* Set ring buffer size */ + ring = &adev->gfx.gfx_ring[0]; + rb_bufsz = order_base_2(ring->ring_size / 8); +@@ -2867,11 +2867,11 @@ static int gfx_v10_0_cp_gfx_resume(struct amdgpu_device *adev) + WREG32_SOC15(GC, 0, mmCP_RB_ACTIVE, 1); + + gfx_v10_0_cp_gfx_set_doorbell(adev, ring); ++ mutex_unlock(&adev->srbm_mutex); + + /* Init gfx ring 1 for pipe 1 */ + mutex_lock(&adev->srbm_mutex); + gfx_v10_0_cp_gfx_switch_pipe(adev, PIPE_ID1); +- mutex_unlock(&adev->srbm_mutex); + ring = &adev->gfx.gfx_ring[1]; + rb_bufsz = order_base_2(ring->ring_size / 8); + tmp = REG_SET_FIELD(0, CP_RB1_CNTL, RB_BUFSZ, rb_bufsz); +@@ -2901,6 +2901,7 @@ static int gfx_v10_0_cp_gfx_resume(struct amdgpu_device *adev) + WREG32_SOC15(GC, 0, mmCP_RB1_ACTIVE, 1); + + gfx_v10_0_cp_gfx_set_doorbell(adev, ring); ++ mutex_unlock(&adev->srbm_mutex); + + /* Switch to pipe 0 */ + mutex_lock(&adev->srbm_mutex); +-- +2.17.1 + |