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-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4518-drm-amdgpu-nv-add-asic-func-for-fetching-vbios-from-.patch59
1 files changed, 59 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4518-drm-amdgpu-nv-add-asic-func-for-fetching-vbios-from-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4518-drm-amdgpu-nv-add-asic-func-for-fetching-vbios-from-.patch
new file mode 100644
index 00000000..aaa0508d
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4518-drm-amdgpu-nv-add-asic-func-for-fetching-vbios-from-.patch
@@ -0,0 +1,59 @@
+From 4baaff63c41abaecb938ac4c3b72ce6e6ce41bd9 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 13 Nov 2019 14:27:54 -0500
+Subject: [PATCH 4518/4736] drm/amdgpu/nv: add asic func for fetching vbios
+ from rom directly
+
+Needed as a fallback if the vbios can't be fetched by other means.
+
+Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/nv.c | 24 ++++++++++++++++++++++--
+ 1 file changed, 22 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
+index 9163f3507a84..91b0482278c2 100644
+--- a/drivers/gpu/drm/amd/amdgpu/nv.c
++++ b/drivers/gpu/drm/amd/amdgpu/nv.c
+@@ -39,6 +39,7 @@
+ #include "gc/gc_10_1_0_sh_mask.h"
+ #include "hdp/hdp_5_0_0_offset.h"
+ #include "hdp/hdp_5_0_0_sh_mask.h"
++#include "smuio/smuio_11_0_0_offset.h"
+
+ #include "soc15.h"
+ #include "soc15_common.h"
+@@ -156,8 +157,27 @@ static bool nv_read_disabled_bios(struct amdgpu_device *adev)
+ static bool nv_read_bios_from_rom(struct amdgpu_device *adev,
+ u8 *bios, u32 length_bytes)
+ {
+- /* TODO: will implement it when SMU header is available */
+- return false;
++ u32 *dw_ptr;
++ u32 i, length_dw;
++
++ if (bios == NULL)
++ return false;
++ if (length_bytes == 0)
++ return false;
++ /* APU vbios image is part of sbios image */
++ if (adev->flags & AMD_IS_APU)
++ return false;
++
++ dw_ptr = (u32 *)bios;
++ length_dw = ALIGN(length_bytes, 4) / 4;
++
++ /* set rom index to 0 */
++ WREG32(SOC15_REG_OFFSET(SMUIO, 0, mmROM_INDEX), 0);
++ /* read out the rom data */
++ for (i = 0; i < length_dw; i++)
++ dw_ptr[i] = RREG32(SOC15_REG_OFFSET(SMUIO, 0, mmROM_DATA));
++
++ return true;
+ }
+
+ static struct soc15_allowed_register_entry nv_allowed_read_registers[] = {
+--
+2.17.1
+