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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4510-drm-amd-display-add-and-use-defines-from-drm_hdcp.h.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4510-drm-amd-display-add-and-use-defines-from-drm_hdcp.h.patch242
1 files changed, 242 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4510-drm-amd-display-add-and-use-defines-from-drm_hdcp.h.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4510-drm-amd-display-add-and-use-defines-from-drm_hdcp.h.patch
new file mode 100644
index 00000000..0c7d4f74
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4510-drm-amd-display-add-and-use-defines-from-drm_hdcp.h.patch
@@ -0,0 +1,242 @@
+From 33346f2afd0be41522106850c13d8c6d76721fc6 Mon Sep 17 00:00:00 2001
+From: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+Date: Mon, 21 Oct 2019 14:40:55 -0400
+Subject: [PATCH 4510/4736] drm/amd/display: add and use defines from
+ drm_hdcp.h
+
+[Why]
+These defines/macros exist already no need to redefine them
+
+[How]
+Use the defines/macros from drm_hdcp.h
+
+-we share the rxstatus between HDMI and DP (2 bytes), But upstream
+defines/macros for HDMI are for 1 byte. So we need to create a separate
+rxstatus for HDMI
+
+Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+Reviewed-by: Harry Wentland <harry.wentland@amd.com>
+---
+ .../gpu/drm/amd/display/modules/hdcp/hdcp.h | 40 ++++++++-----------
+ .../display/modules/hdcp/hdcp1_execution.c | 22 +++++-----
+ .../display/modules/hdcp/hdcp2_execution.c | 24 +++++------
+ 3 files changed, 37 insertions(+), 49 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h
+index 9887c5ea6d5f..bfb32afc1868 100644
+--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h
++++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp.h
+@@ -29,34 +29,28 @@
+ #include "mod_hdcp.h"
+ #include "hdcp_log.h"
+
+-#define BCAPS_READY_MASK 0x20
+-#define BCAPS_REPEATER_MASK 0x40
+-#define BSTATUS_DEVICE_COUNT_MASK 0X007F
+-#define BSTATUS_MAX_DEVS_EXCEEDED_MASK 0x0080
++#include <drm/drm_hdcp.h>
++#include <drm/drm_dp_helper.h>
++
++/* TODO:
++ * Replace below defines with these
++ *
++ * #define DRM_HDCP_MAX_CASCADE_EXCEEDED(x) (x & BIT(3))
++ * #define DRM_HDCP_MAX_CASCADE_EXCEEDED(x) (x & BIT(3))
++ * #define HDCP_2_2_HDMI_RXSTATUS_MSG_SZ_HI(x) ((x) & 0x3)
++ * #define HDCP_2_2_HDMI_RXSTATUS_READY(x) ((x) & BIT(2))
++ * #define HDCP_2_2_HDMI_RXSTATUS_REAUTH_REQ(x) ((x) & BIT(3))
++ *
++ * Currently we share rx_status between HDMI and DP, so we use 16bits
++ * The upstream defines work with 1bytes at a time. So we need to
++ * split the HDMI rxstatus into 2bytes before we can use usptream defs
++ */
++
+ #define BSTATUS_MAX_CASCADE_EXCEEDED_MASK 0x0800
+-#define BCAPS_HDCP_CAPABLE_MASK_DP 0x01
+-#define BCAPS_REPEATER_MASK_DP 0x02
+-#define BSTATUS_READY_MASK_DP 0x01
+-#define BSTATUS_R0_P_AVAILABLE_MASK_DP 0x02
+-#define BSTATUS_LINK_INTEGRITY_FAILURE_MASK_DP 0x04
+-#define BSTATUS_REAUTH_REQUEST_MASK_DP 0x08
+-#define BINFO_DEVICE_COUNT_MASK_DP 0X007F
+-#define BINFO_MAX_DEVS_EXCEEDED_MASK_DP 0x0080
+ #define BINFO_MAX_CASCADE_EXCEEDED_MASK_DP 0x0800
+-
+-#define VERSION_HDCP2_MASK 0x04
+ #define RXSTATUS_MSG_SIZE_MASK 0x03FF
+ #define RXSTATUS_READY_MASK 0x0400
+ #define RXSTATUS_REAUTH_REQUEST_MASK 0x0800
+-#define RXIDLIST_DEVICE_COUNT_LOWER_MASK 0xf0
+-#define RXIDLIST_DEVICE_COUNT_UPPER_MASK 0x01
+-#define RXCAPS_BYTE2_HDCP2_VERSION_DP 0x02
+-#define RXCAPS_BYTE0_HDCP_CAPABLE_MASK_DP 0x02
+-#define RXSTATUS_READY_MASK_DP 0x0001
+-#define RXSTATUS_H_P_AVAILABLE_MASK_DP 0x0002
+-#define RXSTATUS_PAIRING_AVAILABLE_MASK_DP 0x0004
+-#define RXSTATUS_REAUTH_REQUEST_MASK_DP 0x0008
+-#define RXSTATUS_LINK_INTEGRITY_FAILURE_MASK_DP 0x0010
+
+ enum mod_hdcp_trans_input_result {
+ UNKNOWN = 0,
+diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
+index 3db4a7da414f..4618abd6504f 100644
+--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
++++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp1_execution.c
+@@ -41,17 +41,17 @@ static inline enum mod_hdcp_status validate_bksv(struct mod_hdcp *hdcp)
+ static inline enum mod_hdcp_status check_ksv_ready(struct mod_hdcp *hdcp)
+ {
+ if (is_dp_hdcp(hdcp))
+- return (hdcp->auth.msg.hdcp1.bstatus & BSTATUS_READY_MASK_DP) ?
++ return (hdcp->auth.msg.hdcp1.bstatus & DP_BSTATUS_READY) ?
+ MOD_HDCP_STATUS_SUCCESS :
+ MOD_HDCP_STATUS_HDCP1_KSV_LIST_NOT_READY;
+- return (hdcp->auth.msg.hdcp1.bcaps & BCAPS_READY_MASK) ?
++ return (hdcp->auth.msg.hdcp1.bcaps & DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY) ?
+ MOD_HDCP_STATUS_SUCCESS :
+ MOD_HDCP_STATUS_HDCP1_KSV_LIST_NOT_READY;
+ }
+
+ static inline enum mod_hdcp_status check_hdcp_capable_dp(struct mod_hdcp *hdcp)
+ {
+- return (hdcp->auth.msg.hdcp1.bcaps & BCAPS_HDCP_CAPABLE_MASK_DP) ?
++ return (hdcp->auth.msg.hdcp1.bcaps & DP_BCAPS_HDCP_CAPABLE) ?
+ MOD_HDCP_STATUS_SUCCESS :
+ MOD_HDCP_STATUS_HDCP1_NOT_CAPABLE;
+ }
+@@ -61,7 +61,7 @@ static inline enum mod_hdcp_status check_r0p_available_dp(struct mod_hdcp *hdcp)
+ enum mod_hdcp_status status;
+ if (is_dp_hdcp(hdcp)) {
+ status = (hdcp->auth.msg.hdcp1.bstatus &
+- BSTATUS_R0_P_AVAILABLE_MASK_DP) ?
++ DP_BSTATUS_R0_PRIME_READY) ?
+ MOD_HDCP_STATUS_SUCCESS :
+ MOD_HDCP_STATUS_HDCP1_R0_PRIME_PENDING;
+ } else {
+@@ -74,7 +74,7 @@ static inline enum mod_hdcp_status check_link_integrity_dp(
+ struct mod_hdcp *hdcp)
+ {
+ return (hdcp->auth.msg.hdcp1.bstatus &
+- BSTATUS_LINK_INTEGRITY_FAILURE_MASK_DP) ?
++ DP_BSTATUS_LINK_FAILURE) ?
+ MOD_HDCP_STATUS_HDCP1_LINK_INTEGRITY_FAILURE :
+ MOD_HDCP_STATUS_SUCCESS;
+ }
+@@ -82,7 +82,7 @@ static inline enum mod_hdcp_status check_link_integrity_dp(
+ static inline enum mod_hdcp_status check_no_reauthentication_request_dp(
+ struct mod_hdcp *hdcp)
+ {
+- return (hdcp->auth.msg.hdcp1.bstatus & BSTATUS_REAUTH_REQUEST_MASK_DP) ?
++ return (hdcp->auth.msg.hdcp1.bstatus & DP_BSTATUS_REAUTH_REQ) ?
+ MOD_HDCP_STATUS_HDCP1_REAUTH_REQUEST_ISSUED :
+ MOD_HDCP_STATUS_SUCCESS;
+ }
+@@ -109,13 +109,11 @@ static inline enum mod_hdcp_status check_no_max_devs(struct mod_hdcp *hdcp)
+ enum mod_hdcp_status status;
+
+ if (is_dp_hdcp(hdcp))
+- status = (hdcp->auth.msg.hdcp1.binfo_dp &
+- BINFO_MAX_DEVS_EXCEEDED_MASK_DP) ?
++ status = DRM_HDCP_MAX_DEVICE_EXCEEDED(hdcp->auth.msg.hdcp1.binfo_dp) ?
+ MOD_HDCP_STATUS_HDCP1_MAX_DEVS_EXCEEDED_FAILURE :
+ MOD_HDCP_STATUS_SUCCESS;
+ else
+- status = (hdcp->auth.msg.hdcp1.bstatus &
+- BSTATUS_MAX_DEVS_EXCEEDED_MASK) ?
++ status = DRM_HDCP_MAX_DEVICE_EXCEEDED(hdcp->auth.msg.hdcp1.bstatus) ?
+ MOD_HDCP_STATUS_HDCP1_MAX_DEVS_EXCEEDED_FAILURE :
+ MOD_HDCP_STATUS_SUCCESS;
+ return status;
+@@ -124,8 +122,8 @@ static inline enum mod_hdcp_status check_no_max_devs(struct mod_hdcp *hdcp)
+ static inline uint8_t get_device_count(struct mod_hdcp *hdcp)
+ {
+ return is_dp_hdcp(hdcp) ?
+- (hdcp->auth.msg.hdcp1.binfo_dp & BINFO_DEVICE_COUNT_MASK_DP) :
+- (hdcp->auth.msg.hdcp1.bstatus & BSTATUS_DEVICE_COUNT_MASK);
++ DRM_HDCP_NUM_DOWNSTREAM(hdcp->auth.msg.hdcp1.binfo_dp) :
++ DRM_HDCP_NUM_DOWNSTREAM(hdcp->auth.msg.hdcp1.bstatus);
+ }
+
+ static inline enum mod_hdcp_status check_device_count(struct mod_hdcp *hdcp)
+diff --git a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
+index c93c8098d972..7513b3b3c353 100644
+--- a/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
++++ b/drivers/gpu/drm/amd/display/modules/hdcp/hdcp2_execution.c
+@@ -30,7 +30,7 @@ static inline enum mod_hdcp_status check_receiver_id_list_ready(struct mod_hdcp
+ uint8_t is_ready = 0;
+
+ if (is_dp_hdcp(hdcp))
+- is_ready = (hdcp->auth.msg.hdcp2.rxstatus & RXSTATUS_READY_MASK_DP) ? 1 : 0;
++ is_ready = HDCP_2_2_DP_RXSTATUS_READY(hdcp->auth.msg.hdcp2.rxstatus) ? 1 : 0;
+ else
+ is_ready = ((hdcp->auth.msg.hdcp2.rxstatus & RXSTATUS_READY_MASK) &&
+ (hdcp->auth.msg.hdcp2.rxstatus & RXSTATUS_MSG_SIZE_MASK)) ? 1 : 0;
+@@ -43,14 +43,12 @@ static inline enum mod_hdcp_status check_hdcp2_capable(struct mod_hdcp *hdcp)
+ enum mod_hdcp_status status;
+
+ if (is_dp_hdcp(hdcp))
+- status = ((hdcp->auth.msg.hdcp2.rxcaps_dp[2] &
+- RXCAPS_BYTE0_HDCP_CAPABLE_MASK_DP) &&
+- (hdcp->auth.msg.hdcp2.rxcaps_dp[0] ==
+- RXCAPS_BYTE2_HDCP2_VERSION_DP)) ?
++ status = (hdcp->auth.msg.hdcp2.rxcaps_dp[2] & HDCP_2_2_RX_CAPS_VERSION_VAL) &&
++ HDCP_2_2_DP_HDCP_CAPABLE(hdcp->auth.msg.hdcp2.rxcaps_dp[0]) ?
+ MOD_HDCP_STATUS_SUCCESS :
+ MOD_HDCP_STATUS_HDCP2_NOT_CAPABLE;
+ else
+- status = (hdcp->auth.msg.hdcp2.hdcp2version_hdmi & VERSION_HDCP2_MASK) ?
++ status = (hdcp->auth.msg.hdcp2.hdcp2version_hdmi & HDCP_2_2_HDMI_SUPPORT_MASK) ?
+ MOD_HDCP_STATUS_SUCCESS :
+ MOD_HDCP_STATUS_HDCP2_NOT_CAPABLE;
+ return status;
+@@ -62,8 +60,7 @@ static inline enum mod_hdcp_status check_reauthentication_request(
+ uint8_t ret = 0;
+
+ if (is_dp_hdcp(hdcp))
+- ret = (hdcp->auth.msg.hdcp2.rxstatus &
+- RXSTATUS_REAUTH_REQUEST_MASK_DP) ?
++ ret = HDCP_2_2_DP_RXSTATUS_REAUTH_REQ(hdcp->auth.msg.hdcp2.rxstatus) ?
+ MOD_HDCP_STATUS_HDCP2_REAUTH_REQUEST :
+ MOD_HDCP_STATUS_SUCCESS;
+ else
+@@ -76,8 +73,7 @@ static inline enum mod_hdcp_status check_reauthentication_request(
+ static inline enum mod_hdcp_status check_link_integrity_failure_dp(
+ struct mod_hdcp *hdcp)
+ {
+- return (hdcp->auth.msg.hdcp2.rxstatus &
+- RXSTATUS_LINK_INTEGRITY_FAILURE_MASK_DP) ?
++ return HDCP_2_2_DP_RXSTATUS_LINK_FAILED(hdcp->auth.msg.hdcp2.rxstatus) ?
+ MOD_HDCP_STATUS_HDCP2_REAUTH_LINK_INTEGRITY_FAILURE :
+ MOD_HDCP_STATUS_SUCCESS;
+ }
+@@ -111,7 +107,7 @@ static enum mod_hdcp_status check_h_prime_available(struct mod_hdcp *hdcp)
+ goto out;
+
+ if (is_dp_hdcp(hdcp)) {
+- status = (hdcp->auth.msg.hdcp2.rxstatus & RXSTATUS_H_P_AVAILABLE_MASK_DP) ?
++ status = HDCP_2_2_DP_RXSTATUS_H_PRIME(hdcp->auth.msg.hdcp2.rxstatus) ?
+ MOD_HDCP_STATUS_SUCCESS :
+ MOD_HDCP_STATUS_HDCP2_H_PRIME_PENDING;
+ } else {
+@@ -134,7 +130,7 @@ static enum mod_hdcp_status check_pairing_info_available(struct mod_hdcp *hdcp)
+ goto out;
+
+ if (is_dp_hdcp(hdcp)) {
+- status = (hdcp->auth.msg.hdcp2.rxstatus & RXSTATUS_PAIRING_AVAILABLE_MASK_DP) ?
++ status = HDCP_2_2_DP_RXSTATUS_PAIRING(hdcp->auth.msg.hdcp2.rxstatus) ?
+ MOD_HDCP_STATUS_SUCCESS :
+ MOD_HDCP_STATUS_HDCP2_PAIRING_INFO_PENDING;
+ } else {
+@@ -197,8 +193,8 @@ static enum mod_hdcp_status check_stream_ready_available(struct mod_hdcp *hdcp)
+
+ static inline uint8_t get_device_count(struct mod_hdcp *hdcp)
+ {
+- return ((hdcp->auth.msg.hdcp2.rx_id_list[2] & RXIDLIST_DEVICE_COUNT_LOWER_MASK) >> 4) +
+- ((hdcp->auth.msg.hdcp2.rx_id_list[1] & RXIDLIST_DEVICE_COUNT_UPPER_MASK) << 4);
++ return HDCP_2_2_DEV_COUNT_LO(hdcp->auth.msg.hdcp2.rx_id_list[2]) +
++ (HDCP_2_2_DEV_COUNT_HI(hdcp->auth.msg.hdcp2.rx_id_list[1]) << 4);
+ }
+
+ static enum mod_hdcp_status check_device_count(struct mod_hdcp *hdcp)
+--
+2.17.1
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-25 06:44:46 +0000