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Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4347-drm-amd-display-Fix-assert-observed-when-performing-.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4347-drm-amd-display-Fix-assert-observed-when-performing-.patch65
1 files changed, 65 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4347-drm-amd-display-Fix-assert-observed-when-performing-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4347-drm-amd-display-Fix-assert-observed-when-performing-.patch
new file mode 100644
index 00000000..180f8cfc
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4347-drm-amd-display-Fix-assert-observed-when-performing-.patch
@@ -0,0 +1,65 @@
+From 740352c8b0207bd25979c556b1a720e21816f41e Mon Sep 17 00:00:00 2001
+From: David Galiffi <David.Galiffi@amd.com>
+Date: Sat, 12 Oct 2019 16:18:32 -0400
+Subject: [PATCH 4347/4736] drm/amd/display: Fix assert observed when
+ performing dummy p-state check
+
+[WHY]
+V.Active dram clock change workaround need a small modification for DMLv2
+to ensure that the dummy p-state check doesn't fail.
+
+Signed-off-by: David Galiffi <David.Galiffi@amd.com>
+Reviewed-by: Jun Lei <Jun.Lei@amd.com>
+Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+---
+ .../gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c | 4 ++++
+ drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 2 ++
+ drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h | 1 +
+ 3 files changed, 7 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+index 3c70dd577292..d63ca4ccf7cf 100644
+--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
++++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
+@@ -2611,9 +2611,13 @@ static void dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndP
+ mode_lib->vba.MinActiveDRAMClockChangeMargin
+ + mode_lib->vba.DRAMClockChangeLatency;
+
++
+ if (mode_lib->vba.MinActiveDRAMClockChangeMargin > 50) {
+ mode_lib->vba.DRAMClockChangeWatermark += 25;
+ mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
++ } else if (mode_lib->vba.DummyPStateCheck &&
++ mode_lib->vba.MinActiveDRAMClockChangeMargin > 0) {
++ mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
+ } else {
+ if (mode_lib->vba.SynchronizedVBlank || mode_lib->vba.NumberOfActivePlanes == 1) {
+ mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vblank;
+diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+index 7f9a5621922f..81db8517a690 100644
+--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
++++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
+@@ -222,6 +222,8 @@ static void fetch_socbb_params(struct display_mode_lib *mode_lib)
+ mode_lib->vba.SRExitTime = soc->sr_exit_time_us;
+ mode_lib->vba.SREnterPlusExitTime = soc->sr_enter_plus_exit_time_us;
+ mode_lib->vba.DRAMClockChangeLatency = soc->dram_clock_change_latency_us;
++ mode_lib->vba.DummyPStateCheck = soc->dram_clock_change_latency_us == soc->dummy_pstate_latency_us;
++
+ mode_lib->vba.Downspreading = soc->downspread_percent;
+ mode_lib->vba.DRAMChannelWidth = soc->dram_channel_width_bytes; // new!
+ mode_lib->vba.FabricDatapathToDCNDataReturn = soc->fabric_datapath_to_dcn_data_return_bytes; // new!
+diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+index 1540ffbe3979..6c59a332093a 100644
+--- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
++++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
+@@ -155,6 +155,7 @@ struct vba_vars_st {
+ double UrgentLatencySupportUsChroma;
+ unsigned int DSCFormatFactor;
+
++ bool DummyPStateCheck;
+ bool PrefetchModeSupported;
+ enum self_refresh_affinity AllowDRAMSelfRefreshOrDRAMClockChangeInVblank; // Mode Support only
+ double XFCRemoteSurfaceFlipDelay;
+--
+2.17.1
+