diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4261-drm-amd-display-fix-avoid_split-for-dcn2-validation.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4261-drm-amd-display-fix-avoid_split-for-dcn2-validation.patch | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4261-drm-amd-display-fix-avoid_split-for-dcn2-validation.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4261-drm-amd-display-fix-avoid_split-for-dcn2-validation.patch new file mode 100644 index 00000000..9b6d53ac --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4261-drm-amd-display-fix-avoid_split-for-dcn2-validation.patch @@ -0,0 +1,64 @@ +From 98fd9d8313513693c43106e77d5cabd3cb63f6b2 Mon Sep 17 00:00:00 2001 +From: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Date: Tue, 8 Oct 2019 12:53:19 -0400 +Subject: [PATCH 4261/4736] drm/amd/display: fix avoid_split for dcn2+ + validation + +We are currently incorrectly processing avoid split at highest +voltage level. + +Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> +Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 11 +++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +index b5b085aeef2b..9c96242f0ad9 100644 +--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c ++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c +@@ -2355,10 +2355,11 @@ int dcn20_validate_apply_pipe_split_flags( + int vlevel, + bool *split) + { +- int i, pipe_idx, vlevel_unsplit; ++ int i, pipe_idx, vlevel_split; + bool force_split = false; + bool avoid_split = dc->debug.pipe_split_policy != MPC_SPLIT_DYNAMIC; + ++ /* Single display loop, exits if there is more than one display */ + for (i = 0; i < dc->res_pool->pipe_count; i++) { + struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; + bool exit_loop = false; +@@ -2389,22 +2390,24 @@ int dcn20_validate_apply_pipe_split_flags( + if (context->stream_count > dc->res_pool->pipe_count / 2) + avoid_split = true; + ++ /* Avoid split loop looks for lowest voltage level that allows most unsplit pipes possible */ + if (avoid_split) { + for (i = 0, pipe_idx = 0; i < dc->res_pool->pipe_count; i++) { + if (!context->res_ctx.pipe_ctx[i].stream) + continue; + +- for (vlevel_unsplit = vlevel; vlevel <= context->bw_ctx.dml.soc.num_states; vlevel++) ++ for (vlevel_split = vlevel; vlevel <= context->bw_ctx.dml.soc.num_states; vlevel++) + if (context->bw_ctx.dml.vba.NoOfDPP[vlevel][0][pipe_idx] == 1) + break; + /* Impossible to not split this pipe */ +- if (vlevel == context->bw_ctx.dml.soc.num_states) +- vlevel = vlevel_unsplit; ++ if (vlevel > context->bw_ctx.dml.soc.num_states) ++ vlevel = vlevel_split; + pipe_idx++; + } + context->bw_ctx.dml.vba.maxMpcComb = 0; + } + ++ /* Split loop sets which pipe should be split based on dml outputs and dc flags */ + for (i = 0, pipe_idx = 0; i < dc->res_pool->pipe_count; i++) { + struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; + +-- +2.17.1 + |