diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4207-drm-amdgpu-add-a-generic-fb-accessing-helper-functio.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4207-drm-amdgpu-add-a-generic-fb-accessing-helper-functio.patch | 101 |
1 files changed, 101 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4207-drm-amdgpu-add-a-generic-fb-accessing-helper-functio.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4207-drm-amdgpu-add-a-generic-fb-accessing-helper-functio.patch new file mode 100644 index 00000000..3da523f2 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4207-drm-amdgpu-add-a-generic-fb-accessing-helper-functio.patch @@ -0,0 +1,101 @@ +From 127264c9ea12a42fbb31f94eecb20d7917f73efe Mon Sep 17 00:00:00 2001 +From: "Tianci.Yin" <tianci.yin@amd.com> +Date: Mon, 30 Sep 2019 13:33:50 +0800 +Subject: [PATCH 4207/4736] drm/amdgpu: add a generic fb accessing helper + function(v3) + +add a generic helper function for accessing framebuffer via MMIO + +Change-Id: I075e138083e5aef57485a09fe44f27c34ff483a3 +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Reviewed-by: Luben Tuikov <luben.tuikov@amd.com> +Signed-off-by: Tianci.Yin <tianci.yin@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++ + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 30 +++++++++++++++++++ + drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 12 +------- + 3 files changed, 33 insertions(+), 11 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +index e4172f9bece6..6ed17115a56d 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h +@@ -1029,6 +1029,8 @@ int amdgpu_device_init(struct amdgpu_device *adev, + void amdgpu_device_fini(struct amdgpu_device *adev); + int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev); + ++void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos, ++ uint32_t *buf, size_t size, bool write); + uint32_t amdgpu_mm_rreg(struct amdgpu_device *adev, uint32_t reg, + uint32_t acc_flags); + void amdgpu_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index 46723a10d98a..634b581f96b8 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -153,6 +153,36 @@ bool amdgpu_device_is_px(struct drm_device *dev) + return false; + } + ++/** ++ * VRAM access helper functions. ++ * ++ * amdgpu_device_vram_access - read/write a buffer in vram ++ * ++ * @adev: amdgpu_device pointer ++ * @pos: offset of the buffer in vram ++ * @buf: virtual address of the buffer in system memory ++ * @size: read/write size, sizeof(@buf) must > @size ++ * @write: true - write to vram, otherwise - read from vram ++ */ ++void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos, ++ uint32_t *buf, size_t size, bool write) ++{ ++ uint64_t last; ++ unsigned long flags; ++ ++ last = size - 4; ++ for (last += pos; pos <= last; pos += 4) { ++ spin_lock_irqsave(&adev->mmio_idx_lock, flags); ++ WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)pos) | 0x80000000); ++ WREG32_NO_KIQ(mmMM_INDEX_HI, pos >> 31); ++ if (write) ++ WREG32_NO_KIQ(mmMM_DATA, *buf++); ++ else ++ *buf++ = RREG32_NO_KIQ(mmMM_DATA); ++ spin_unlock_irqrestore(&adev->mmio_idx_lock, flags); ++ } ++} ++ + /* + * MMIO register access helper functions. + */ +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +index ddd8364102a2..f95092741c38 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +@@ -134,20 +134,10 @@ static int hw_id_map[MAX_HWIP] = { + + static int amdgpu_discovery_read_binary(struct amdgpu_device *adev, uint8_t *binary) + { +- uint32_t *p = (uint32_t *)binary; + uint64_t vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) << 20; + uint64_t pos = vram_size - DISCOVERY_TMR_SIZE; +- unsigned long flags; +- +- while (pos < vram_size) { +- spin_lock_irqsave(&adev->mmio_idx_lock, flags); +- WREG32_NO_KIQ(mmMM_INDEX, ((uint32_t)pos) | 0x80000000); +- WREG32_NO_KIQ(mmMM_INDEX_HI, pos >> 31); +- *p++ = RREG32_NO_KIQ(mmMM_DATA); +- spin_unlock_irqrestore(&adev->mmio_idx_lock, flags); +- pos += 4; +- } + ++ amdgpu_device_vram_access(adev, pos, (uint32_t *)binary, DISCOVERY_TMR_SIZE, false); + return 0; + } + +-- +2.17.1 + |