diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4191-drm-amd-display-fix-header-for-RN-clk-mgr.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4191-drm-amd-display-fix-header-for-RN-clk-mgr.patch | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4191-drm-amd-display-fix-header-for-RN-clk-mgr.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4191-drm-amd-display-fix-header-for-RN-clk-mgr.patch new file mode 100644 index 00000000..d2e45a53 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4191-drm-amd-display-fix-header-for-RN-clk-mgr.patch @@ -0,0 +1,43 @@ +From 76c869d28bc5e2577e9af4b4ad53936333cac8ef Mon Sep 17 00:00:00 2001 +From: joseph gravenor <joseph.gravenor@amd.com> +Date: Mon, 8 Jul 2019 13:41:01 -0400 +Subject: [PATCH 4191/4736] drm/amd/display: fix header for RN clk mgr +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +[why] +Should always MP0_BASE for any register definition from MP per-IP header files. +I belive the reason the linux version of MP1_BASE works is The 0th element of the 0th table +of that is identical to the corrisponding value of MP0_BASE in the renoir offset header file. +The reason we should only use MP0_BASE is There is only one set of per-IP headers MP +that includes all register definitions related to SMU IP block. This IP includes MP0, MP1, MP2 +and an ecryption engine that can be used only by MP0. As a result all register definitions from +MP file should be based only on MP0_BASE data. + +[How] +Change MP1_BASE to MP0_BASE + +Signed-off-by: joseph gravenor <joseph.gravenor@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Reviewed-by: Roman Li <Roman.Li@amd.com> +--- + .../gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c +index 8e860f567d5c..db28e91adb3d 100644 +--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c ++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c +@@ -33,7 +33,7 @@ + #include "mp/mp_12_0_0_sh_mask.h" + + #define REG(reg_name) \ +- (MP1_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name) ++ (MP0_BASE.instance[0].segment[mm ## reg_name ## _BASE_IDX] + mm ## reg_name) + + #define FN(reg_name, field) \ + FD(reg_name##__##field) +-- +2.17.1 + |