diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4189-drm-amd-display-Fix-rn-audio-playback-and-video-play.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4189-drm-amd-display-Fix-rn-audio-playback-and-video-play.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4189-drm-amd-display-Fix-rn-audio-playback-and-video-play.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4189-drm-amd-display-Fix-rn-audio-playback-and-video-play.patch new file mode 100644 index 00000000..218a424c --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4189-drm-amd-display-Fix-rn-audio-playback-and-video-play.patch @@ -0,0 +1,61 @@ +From 126d6092ca5e7273958180f377881ec38b0efa8f Mon Sep 17 00:00:00 2001 +From: Michael Strauss <michael.strauss@amd.com> +Date: Wed, 7 Aug 2019 16:52:20 -0400 +Subject: [PATCH 4189/4736] drm/amd/display: Fix rn audio playback and video + playback speed + +[WHY] +dprefclk is improperly read due to incorrect units used. +Causes an audio clock to be improperly set, making audio +non-functional and videos play back too fast + +[HOW] +Scale dprefclk value from MHz to KHz (multiply by 1000) +to ensure that dprefclk_khz is in correct units + +Signed-off-by: Michael Strauss <michael.strauss@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Reviewed-by: Roman Li <Roman.Li@amd.com> +--- + .../drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 15 +++++++-------- + 1 file changed, 7 insertions(+), 8 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +index 93e46e376bb1..fb8aa9436bf0 100644 +--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c ++++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +@@ -377,7 +377,7 @@ void rn_get_clk_states(struct clk_mgr *clk_mgr_base, struct clk_states *s) + + rn_dump_clk_registers(&sb, clk_mgr_base, &log_info); + +- s->dprefclk_khz = sb.dprefclk; ++ s->dprefclk_khz = sb.dprefclk * 1000; + } + + void rn_enable_pme_wa(struct clk_mgr *clk_mgr_base) +@@ -633,16 +633,15 @@ void rn_clk_mgr_construct( + clk_mgr->dentist_vco_freq_khz = 3600000; + + rn_dump_clk_registers(&s, &clk_mgr->base, &log_info); +- clk_mgr->base.dprefclk_khz = s.dprefclk; +- +- if (clk_mgr->base.dprefclk_khz != 600000) { +- clk_mgr->base.dprefclk_khz = 600000; +- ASSERT(1); //TODO: Renoir follow up. +- } ++ /* Convert dprefclk units from MHz to KHz */ ++ /* Value already divided by 10, some resolution lost */ ++ clk_mgr->base.dprefclk_khz = s.dprefclk * 1000; + + /* in case we don't get a value from the register, use default */ +- if (clk_mgr->base.dprefclk_khz == 0) ++ if (clk_mgr->base.dprefclk_khz == 0) { ++ ASSERT(clk_mgr->base.dprefclk_khz == 600000); + clk_mgr->base.dprefclk_khz = 600000; ++ } + } + + dce_clock_read_ss_info(clk_mgr); +-- +2.17.1 + |