aboutsummaryrefslogtreecommitdiffstats
path: root/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4179-drm-amd-display-Temporary-workaround-to-toggle-water.patch
diff options
context:
space:
mode:
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4179-drm-amd-display-Temporary-workaround-to-toggle-water.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4179-drm-amd-display-Temporary-workaround-to-toggle-water.patch92
1 files changed, 92 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4179-drm-amd-display-Temporary-workaround-to-toggle-water.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4179-drm-amd-display-Temporary-workaround-to-toggle-water.patch
new file mode 100644
index 00000000..d76a05db
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4179-drm-amd-display-Temporary-workaround-to-toggle-water.patch
@@ -0,0 +1,92 @@
+From 4a2de49201a3d53abc4c27c8a93e368d7e65c926 Mon Sep 17 00:00:00 2001
+From: Lewis Huang <Lewis.Huang@amd.com>
+Date: Sat, 6 Jul 2019 16:02:25 -0500
+Subject: [PATCH 4179/4736] drm/amd/display: Temporary workaround to toggle
+ watermark setting
+
+[Why]
+Watermarks not propagated to DCHUBP after it is powered on
+
+[How]
+Add temoprary function apply_DEDCN21_147_wa to apply wm settings for Renoir
+
+Signed-off-by: Lewis Huang <Lewis.Huang@amd.com>
+Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
+Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+Reviewed-by: Roman Li <Roman.Li@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 4 ++++
+ drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c | 9 +++++++++
+ drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 1 +
+ drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 1 +
+ 4 files changed, 15 insertions(+)
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+index ce2530509e12..6229a8ca0013 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+@@ -1533,6 +1533,10 @@ static void dcn20_program_front_end_for_ctx(
+ msleep(1);
+ }
+ }
++
++ /* WA to apply WM setting*/
++ if (dc->hwseq->wa.DEGVIDCN21)
++ dc->res_pool->hubbub->funcs->apply_DEDCN21_147_wa(dc->res_pool->hubbub);
+ }
+
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c
+index fdfbdeb32459..2232ccf14bdd 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubbub.c
+@@ -616,6 +616,14 @@ void hubbub21_wm_read_state(struct hubbub *hubbub,
+ DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_D, &s->dram_clk_chanage);
+ }
+
++void hubbub21_apply_DEDCN21_147_wa(struct hubbub *hubbub)
++{
++ struct dcn20_hubbub *hubbub1 = TO_DCN20_HUBBUB(hubbub);
++ uint32_t prog_wm_value;
++
++ prog_wm_value = REG_READ(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A);
++ REG_WRITE(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, prog_wm_value);
++}
+
+ static const struct hubbub_funcs hubbub21_funcs = {
+ .update_dchub = hubbub2_update_dchub,
+@@ -627,6 +635,7 @@ static const struct hubbub_funcs hubbub21_funcs = {
+ .wm_read_state = hubbub21_wm_read_state,
+ .get_dchub_ref_freq = hubbub2_get_dchub_ref_freq,
+ .program_watermarks = hubbub21_program_watermarks,
++ .apply_DEDCN21_147_wa = hubbub21_apply_DEDCN21_147_wa,
+ };
+
+ void hubbub21_construct(struct dcn20_hubbub *hubbub,
+diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+index 05baf0e4d79f..a9e2dd71d7a6 100644
+--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
++++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+@@ -1470,6 +1470,7 @@ static struct dce_hwseq *dcn21_hwseq_create(
+ hws->regs = &hwseq_reg;
+ hws->shifts = &hwseq_shift;
+ hws->masks = &hwseq_mask;
++ hws->wa.DEGVIDCN21 = true;
+ }
+ return hws;
+ }
+diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
+index a6297219d7fc..c81a17aeaa25 100644
+--- a/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
++++ b/drivers/gpu/drm/amd/display/dc/inc/hw/dchubbub.h
+@@ -147,6 +147,7 @@ struct hubbub_funcs {
+ bool (*is_allow_self_refresh_enabled)(struct hubbub *hubbub);
+ void (*allow_self_refresh_control)(struct hubbub *hubbub, bool allow);
+
++ void (*apply_DEDCN21_147_wa)(struct hubbub *hubbub);
+ };
+
+ struct hubbub {
+--
+2.17.1
+