diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4093-drm-amdgpu-expand-the-context-control-interface-with.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4093-drm-amdgpu-expand-the-context-control-interface-with.patch | 143 |
1 files changed, 143 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4093-drm-amdgpu-expand-the-context-control-interface-with.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4093-drm-amdgpu-expand-the-context-control-interface-with.patch new file mode 100644 index 00000000..31de8444 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4093-drm-amdgpu-expand-the-context-control-interface-with.patch @@ -0,0 +1,143 @@ +From 7afa328a1d4e78c59c5e74be206878e5b64350a3 Mon Sep 17 00:00:00 2001 +From: Huang Rui <ray.huang@amd.com> +Date: Thu, 8 Aug 2019 20:18:42 +0800 +Subject: [PATCH 4093/4256] drm/amdgpu: expand the context control interface + with trust flag +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This patch expands the context control function to support trusted flag while we +want to set command buffer in trusted mode. + +Signed-off-by: Huang Rui <ray.huang@amd.com> +Reviewed-by: Alex Deucher <alexander.deucher@amd.com> +Acked-by: Christian König <christian.koenig@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +- + drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 5 +++-- + drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 +++- + drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 3 ++- + drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 3 ++- + drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 3 ++- + drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 +++-- + 7 files changed, 16 insertions(+), 9 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c +index 19e638af4d9c..d75dc14be086 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c +@@ -219,7 +219,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, + if (job && ring->funcs->emit_cntxcntl) { + status |= job->preamble_status; + status |= job->preemption_status; +- amdgpu_ring_emit_cntxcntl(ring, status); ++ amdgpu_ring_emit_cntxcntl(ring, status, false); + } + + for (i = 0; i < num_ibs; ++i) { +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +index 34aa63ad5799..5134d0dd6dc2 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h +@@ -158,7 +158,8 @@ struct amdgpu_ring_funcs { + void (*begin_use)(struct amdgpu_ring *ring); + void (*end_use)(struct amdgpu_ring *ring); + void (*emit_switch_buffer) (struct amdgpu_ring *ring); +- void (*emit_cntxcntl) (struct amdgpu_ring *ring, uint32_t flags); ++ void (*emit_cntxcntl) (struct amdgpu_ring *ring, uint32_t flags, ++ bool trusted); + void (*emit_rreg)(struct amdgpu_ring *ring, uint32_t reg); + void (*emit_wreg)(struct amdgpu_ring *ring, uint32_t reg, uint32_t val); + void (*emit_reg_wait)(struct amdgpu_ring *ring, uint32_t reg, +@@ -242,7 +243,7 @@ struct amdgpu_ring { + #define amdgpu_ring_emit_gds_switch(r, v, db, ds, wb, ws, ab, as) (r)->funcs->emit_gds_switch((r), (v), (db), (ds), (wb), (ws), (ab), (as)) + #define amdgpu_ring_emit_hdp_flush(r) (r)->funcs->emit_hdp_flush((r)) + #define amdgpu_ring_emit_switch_buffer(r) (r)->funcs->emit_switch_buffer((r)) +-#define amdgpu_ring_emit_cntxcntl(r, d) (r)->funcs->emit_cntxcntl((r), (d)) ++#define amdgpu_ring_emit_cntxcntl(r, d, s) (r)->funcs->emit_cntxcntl((r), (d), (s)) + #define amdgpu_ring_emit_rreg(r, d) (r)->funcs->emit_rreg((r), (d)) + #define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v)) + #define amdgpu_ring_emit_reg_wait(r, d, v, m) (r)->funcs->emit_reg_wait((r), (d), (v), (m)) +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +index 5a153d3893d8..f93ac8f44a58 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +@@ -4541,7 +4541,9 @@ static void gfx_v10_0_ring_emit_sb(struct amdgpu_ring *ring) + amdgpu_ring_write(ring, 0); + } + +-static void gfx_v10_0_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags) ++static void gfx_v10_0_ring_emit_cntxcntl(struct amdgpu_ring *ring, ++ uint32_t flags, ++ bool trusted) + { + uint32_t dw2 = 0; + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c +index 8c27c305e692..b4af1b55f852 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c +@@ -2972,7 +2972,8 @@ static uint64_t gfx_v6_0_get_gpu_clock_counter(struct amdgpu_device *adev) + return clock; + } + +-static void gfx_v6_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags) ++static void gfx_v6_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags, ++ bool trusted) + { + if (flags & AMDGPU_HAVE_CTX_SWITCH) + gfx_v6_0_ring_emit_vgt_flush(ring); +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +index 48796b6824cf..c08f5c53dcb4 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +@@ -2309,7 +2309,8 @@ static void gfx_v7_0_ring_emit_ib_compute(struct amdgpu_ring *ring, + amdgpu_ring_write(ring, control); + } + +-static void gfx_v7_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags) ++static void gfx_v7_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags, ++ bool trusted) + { + uint32_t dw2 = 0; + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +index bd19af733fa8..614b8226b9eb 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +@@ -6392,7 +6392,8 @@ static void gfx_v8_ring_emit_sb(struct amdgpu_ring *ring) + amdgpu_ring_write(ring, 0); + } + +-static void gfx_v8_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags) ++static void gfx_v8_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags, ++ bool trusted) + { + uint32_t dw2 = 0; + +diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +index b1ff036e9fb5..2e316e9da4cf 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +@@ -5049,14 +5049,15 @@ static void gfx_v9_0_ring_emit_tmz(struct amdgpu_ring *ring, bool start, + | FRAME_CMD(start ? 0 : 1)); + } + +-static void gfx_v9_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags) ++static void gfx_v9_ring_emit_cntxcntl(struct amdgpu_ring *ring, uint32_t flags, ++ bool trusted) + { + uint32_t dw2 = 0; + + if (amdgpu_sriov_vf(ring->adev)) + gfx_v9_0_ring_emit_ce_meta(ring); + +- gfx_v9_0_ring_emit_tmz(ring, true, false); ++ gfx_v9_0_ring_emit_tmz(ring, true, trusted); + + dw2 |= 0x80000000; /* set load_enable otherwise this package is just NOPs */ + if (flags & AMDGPU_HAVE_CTX_SWITCH) { +-- +2.17.1 + |