diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4079-drm-amd-display-correct-stream-LTE_340MCSC_SCRAMBLE-.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4079-drm-amd-display-correct-stream-LTE_340MCSC_SCRAMBLE-.patch | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4079-drm-amd-display-correct-stream-LTE_340MCSC_SCRAMBLE-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4079-drm-amd-display-correct-stream-LTE_340MCSC_SCRAMBLE-.patch new file mode 100644 index 00000000..938f45d5 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/4079-drm-amd-display-correct-stream-LTE_340MCSC_SCRAMBLE-.patch @@ -0,0 +1,53 @@ +From bac1d20351b9cf82ea0545d60cdc97b93f56a96a Mon Sep 17 00:00:00 2001 +From: Wayne Lin <Wayne.Lin@amd.com> +Date: Thu, 19 Sep 2019 17:41:02 +0800 +Subject: [PATCH 4079/4256] drm/amd/display: correct stream + LTE_340MCSC_SCRAMBLE value + +[Why] +HDMI 2.0 requires scrambling under specific conditions. We refer to +stream property LTE_340MCSC_SCRAMBLE to determine whether en/dis +scrambling. +While creating stream for sink, we setup LTE_340MCSC_SCRAMBLE by +referring to edid_caps. However, dm_helpers_parse_edid_caps() +doesn't construct HDMI Forum block data for edid_caps. +Moreover, fill_stream_properties_from_drm_display_mode() aslo +unconsciously clear the LTE_340MCSC_SCRAMBLE flag. + +[How] +Drm already provides drm_display_info to refer HDMI Forum vsdb info. +Set stream LTE_340MCSC_SCRAMBLE by drm_display_info and remove +memset in fill_stream_properties_from_drm_display_mode() + +Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> +Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> +Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +--- + drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index be90836269b4..25d20fd466c0 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -3451,7 +3451,6 @@ static void fill_stream_properties_from_drm_display_mode( + struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector); + struct hdmi_vendor_infoframe hv_frame; + struct hdmi_avi_infoframe avi_frame; +- memset(timing_out, 0, sizeof(struct dc_crtc_timing)); + + timing_out->h_border_left = 0; + timing_out->h_border_right = 0; +@@ -3719,6 +3718,9 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector, + + stream->dm_stream_context = aconnector; + ++ stream->timing.flags.LTE_340MCSC_SCRAMBLE = ++ drm_connector->display_info.hdmi.scdc.scrambling.low_rates; ++ + list_for_each_entry(preferred_mode, &aconnector->base.modes, head) { + /* Search for preferred mode */ + if (preferred_mode->type & DRM_MODE_TYPE_PREFERRED) { +-- +2.17.1 + |