aboutsummaryrefslogtreecommitdiffstats
path: root/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3862-drm-amd-display-Update-hdcp-display-config.patch
diff options
context:
space:
mode:
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3862-drm-amd-display-Update-hdcp-display-config.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3862-drm-amd-display-Update-hdcp-display-config.patch240
1 files changed, 240 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3862-drm-amd-display-Update-hdcp-display-config.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3862-drm-amd-display-Update-hdcp-display-config.patch
new file mode 100644
index 00000000..946f0d5b
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3862-drm-amd-display-Update-hdcp-display-config.patch
@@ -0,0 +1,240 @@
+From 9ff67f68857534e2d360e281e16c913c7392e6bc Mon Sep 17 00:00:00 2001
+From: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+Date: Tue, 6 Aug 2019 17:43:53 -0400
+Subject: [PATCH 3862/4256] drm/amd/display: Update hdcp display config
+
+[Why]
+We need to update the hdcp display parameter whenever the link is
+updated, so the next time there is an update to hdcp we have the
+latest display info
+
+[How]
+Create a callback, and use this anytime there is a change in the link. This will
+be used later by the dm.
+
+Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
+Reviewed-by: Harry Wentland <harry.wentland@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+---
+ drivers/gpu/drm/amd/display/dc/core/dc.c | 10 ++++
+ drivers/gpu/drm/amd/display/dc/core/dc_link.c | 31 ++++++++++++
+ drivers/gpu/drm/amd/display/dc/dc.h | 5 ++
+ drivers/gpu/drm/amd/display/dc/dc_types.h | 7 +++
+ drivers/gpu/drm/amd/display/dc/dm_cp_psp.h | 49 +++++++++++++++++++
+ .../gpu/drm/amd/display/dc/inc/core_types.h | 4 +-
+ 6 files changed, 105 insertions(+), 1 deletion(-)
+ create mode 100644 drivers/gpu/drm/amd/display/dc/dm_cp_psp.h
+
+diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
+index 1ab1df443202..56861f796406 100644
+--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
+@@ -827,6 +827,16 @@ void dc_hardware_init(struct dc *dc)
+ void dc_init_callbacks(struct dc *dc,
+ const struct dc_callback_init *init_params)
+ {
++#ifdef CONFIG_DRM_AMD_DC_HDCP
++ dc->ctx->cp_psp = init_params->cp_psp;
++#endif
++}
++
++void dc_deinit_callbacks(struct dc *dc)
++{
++#ifdef CONFIG_DRM_AMD_DC_HDCP
++ memset(&dc->ctx->cp_psp, 0, sizeof(dc->ctx->cp_psp));
++#endif
+ }
+
+ void dc_destroy(struct dc **dc)
+diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+index 66758033757d..2da239765690 100644
+--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
++++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+@@ -2688,6 +2688,24 @@ static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx)
+
+ return DC_OK;
+ }
++#if defined(CONFIG_DRM_AMD_DC_HDCP)
++static void update_psp_stream_config(struct pipe_ctx *pipe_ctx, bool dpms_off)
++{
++ struct cp_psp *cp_psp = &pipe_ctx->stream->ctx->cp_psp;
++ if (cp_psp && cp_psp->funcs.update_stream_config) {
++ struct cp_psp_stream_config config;
++
++ memset(&config, 0, sizeof(config));
++
++ config.otg_inst = (uint8_t) pipe_ctx->stream_res.tg->inst;
++ config.stream_enc_inst = (uint8_t) pipe_ctx->stream_res.stream_enc->id;
++ config.link_enc_inst = pipe_ctx->stream->link->link_enc_hw_inst;
++ config.dpms_off = dpms_off;
++ config.dm_stream_ctx = pipe_ctx->stream->dm_stream_context;
++ cp_psp->funcs.update_stream_config(cp_psp->handle, &config);
++ }
++}
++#endif
+
+ void core_link_enable_stream(
+ struct dc_state *state,
+@@ -2748,6 +2766,9 @@ void core_link_enable_stream(
+ /* Do not touch link on seamless boot optimization. */
+ if (pipe_ctx->stream->apply_seamless_boot_optimization) {
+ pipe_ctx->stream->dpms_off = false;
++#if defined(CONFIG_DRM_AMD_DC_HDCP)
++ update_psp_stream_config(pipe_ctx, false);
++#endif
+ return;
+ }
+
+@@ -2755,6 +2776,9 @@ void core_link_enable_stream(
+ if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP &&
+ apply_edp_fast_boot_optimization) {
+ pipe_ctx->stream->dpms_off = false;
++#if defined(CONFIG_DRM_AMD_DC_HDCP)
++ update_psp_stream_config(pipe_ctx, false);
++#endif
+ return;
+ }
+
+@@ -2814,6 +2838,9 @@ void core_link_enable_stream(
+
+ if (dc_is_dp_signal(pipe_ctx->stream->signal))
+ enable_stream_features(pipe_ctx);
++#if defined(CONFIG_DRM_AMD_DC_HDCP)
++ update_psp_stream_config(pipe_ctx, false);
++#endif
+ }
+ #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
+ else { // if (IS_FPGA_MAXIMUS_DC(core_dc->ctx->dce_environment))
+@@ -2831,6 +2858,10 @@ void core_link_disable_stream(struct pipe_ctx *pipe_ctx)
+ struct dc_stream_state *stream = pipe_ctx->stream;
+ struct dc_link *link = stream->sink->link;
+
++#if defined(CONFIG_DRM_AMD_DC_HDCP)
++ update_psp_stream_config(pipe_ctx, true);
++#endif
++
+ core_dc->hwss.blank_stream(pipe_ctx);
+
+ if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
+diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
+index 3ecc42987b05..9185297d93c4 100644
+--- a/drivers/gpu/drm/amd/display/dc/dc.h
++++ b/drivers/gpu/drm/amd/display/dc/dc.h
+@@ -552,7 +552,11 @@ struct dc_init_data {
+ };
+
+ struct dc_callback_init {
++#ifdef CONFIG_DRM_AMD_DC_HDCP
++ struct cp_psp cp_psp;
++#else
+ uint8_t reserved;
++#endif
+ };
+
+ struct dc *dc_create(const struct dc_init_data *init_params);
+@@ -566,6 +570,7 @@ int dc_setup_system_context(struct dc *dc, struct dc_phy_addr_space_config *pa_c
+ #endif
+ void dc_init_callbacks(struct dc *dc,
+ const struct dc_callback_init *init_params);
++void dc_deinit_callbacks(struct dc *dc);
+ void dc_destroy(struct dc **dc);
+
+ /*******************************************************************************
+diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h b/drivers/gpu/drm/amd/display/dc/dc_types.h
+index e6ae66791943..d9be8fc3889f 100644
+--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
++++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
+@@ -38,6 +38,10 @@
+ #include "dal_types.h"
+ #include "grph_object_defs.h"
+
++#ifdef CONFIG_DRM_AMD_DC_HDCP
++#include "dm_cp_psp.h"
++#endif
++
+ /* forward declarations */
+ struct dc_plane_state;
+ struct dc_stream_state;
+@@ -105,6 +109,9 @@ struct dc_context {
+ uint32_t dc_sink_id_count;
+ uint32_t dc_stream_id_count;
+ uint64_t fbc_gpu_addr;
++#ifdef CONFIG_DRM_AMD_DC_HDCP
++ struct cp_psp cp_psp;
++#endif
+ };
+
+
+diff --git a/drivers/gpu/drm/amd/display/dc/dm_cp_psp.h b/drivers/gpu/drm/amd/display/dc/dm_cp_psp.h
+new file mode 100644
+index 000000000000..626d22d437f4
+--- /dev/null
++++ b/drivers/gpu/drm/amd/display/dc/dm_cp_psp.h
+@@ -0,0 +1,49 @@
++/*
++ * Copyright 2018 Advanced Micro Devices, Inc.
++ *
++ * Permission is hereby granted, free of charge, to any person obtaining a
++ * copy of this software and associated documentation files (the "Software"),
++ * to deal in the Software without restriction, including without limitation
++ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
++ * and/or sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following conditions:
++ *
++ * The above copyright notice and this permission notice shall be included in
++ * all copies or substantial portions of the Software.
++ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ *
++ * Authors: AMD
++ *
++ */
++
++#ifndef DM_CP_PSP_IF__H
++#define DM_CP_PSP_IF__H
++
++struct dc_link;
++
++struct cp_psp_stream_config {
++ uint8_t otg_inst;
++ uint8_t link_enc_inst;
++ uint8_t stream_enc_inst;
++ void *dm_stream_ctx;
++ bool dpms_off;
++};
++
++struct cp_psp_funcs {
++ void (*update_stream_config)(void *handle, struct cp_psp_stream_config *config);
++};
++
++struct cp_psp {
++ void *handle;
++ struct cp_psp_funcs funcs;
++};
++
++
++#endif /* DM_CP_PSP_IF__H */
+diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+index daf8d5d9c3f1..eee78a73d88c 100644
+--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
++++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+@@ -52,7 +52,9 @@ void enable_surface_flip_reporting(struct dc_plane_state *plane_state,
+ #include "clock_source.h"
+ #include "audio.h"
+ #include "dm_pp_smu.h"
+-
++#ifdef CONFIG_DRM_AMD_DC_HDCP
++#include "dm_cp_psp.h"
++#endif
+
+ /************ link *****************/
+ struct link_init_data {
+--
+2.17.1
+
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-24 19:04:10 +0000