diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3841-drm-amd-display-Optimize-clocks-on-clock-change.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3841-drm-amd-display-Optimize-clocks-on-clock-change.patch | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3841-drm-amd-display-Optimize-clocks-on-clock-change.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3841-drm-amd-display-Optimize-clocks-on-clock-change.patch new file mode 100644 index 00000000..55b7abe3 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3841-drm-amd-display-Optimize-clocks-on-clock-change.patch @@ -0,0 +1,67 @@ +From 9f6396ff839b5c8bbd295039e70e08c39dc8066c Mon Sep 17 00:00:00 2001 +From: Wesley Chalmers <Wesley.Chalmers@amd.com> +Date: Fri, 30 Aug 2019 14:59:00 -0400 +Subject: [PATCH 3841/4256] drm/amd/display: Optimize clocks on clock change + +[WHY] +Presently, there is no way for clocks to be lowered, only raised. + +[HOW] +Compare clock status against previous known clock status, and optimize +if different. +This requires re-ordering the layout of the dc_clocks structure, as the +current ordering allows identical clock states to appear different. + +Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com> +Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> +Acked-by: Anthony Koo <Anthony.Koo@amd.com> +Acked-by: Leo Li <sunpeng.li@amd.com> +--- + drivers/gpu/drm/amd/display/dc/core/dc.c | 3 +++ + drivers/gpu/drm/amd/display/dc/dc.h | 8 ++++---- + 2 files changed, 7 insertions(+), 4 deletions(-) + +diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c +index 3affefd6d427..ffa6544f1e25 100644 +--- a/drivers/gpu/drm/amd/display/dc/core/dc.c ++++ b/drivers/gpu/drm/amd/display/dc/core/dc.c +@@ -1655,6 +1655,9 @@ enum surface_update_type dc_check_update_surfaces_for_stream( + updates[i].surface->update_flags.raw = 0xFFFFFFFF; + } + ++ if (type == UPDATE_TYPE_FAST && memcmp(&dc->current_state->bw_ctx.bw.dcn.clk, &dc->clk_mgr->clks, offsetof(struct dc_clocks, prev_p_state_change_support)) != 0) ++ dc->optimized_required = true; ++ + return type; + } + +diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h +index a1697486b352..afbcf052f478 100644 +--- a/drivers/gpu/drm/amd/display/dc/dc.h ++++ b/drivers/gpu/drm/amd/display/dc/dc.h +@@ -255,11 +255,7 @@ enum wm_report_mode { + */ + struct dc_clocks { + int dispclk_khz; +- int max_supported_dppclk_khz; +- int max_supported_dispclk_khz; + int dppclk_khz; +- int bw_dppclk_khz; /*a copy of dppclk_khz*/ +- int bw_dispclk_khz; + int dcfclk_khz; + int socclk_khz; + int dcfclk_deep_sleep_khz; +@@ -273,6 +269,10 @@ struct dc_clocks { + * optimization required + */ + bool prev_p_state_change_support; ++ int max_supported_dppclk_khz; ++ int max_supported_dispclk_khz; ++ int bw_dppclk_khz; /*a copy of dppclk_khz*/ ++ int bw_dispclk_khz; + }; + + struct dc_bw_validation_profile { +-- +2.17.1 + |