aboutsummaryrefslogtreecommitdiffstats
path: root/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3802-Revert-drm-amdgpu-nbio7.4-add-hw-bug-workaround-for-.patch
diff options
context:
space:
mode:
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3802-Revert-drm-amdgpu-nbio7.4-add-hw-bug-workaround-for-.patch')
-rw-r--r--meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3802-Revert-drm-amdgpu-nbio7.4-add-hw-bug-workaround-for-.patch41
1 files changed, 41 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3802-Revert-drm-amdgpu-nbio7.4-add-hw-bug-workaround-for-.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3802-Revert-drm-amdgpu-nbio7.4-add-hw-bug-workaround-for-.patch
new file mode 100644
index 00000000..f87d7f45
--- /dev/null
+++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3802-Revert-drm-amdgpu-nbio7.4-add-hw-bug-workaround-for-.patch
@@ -0,0 +1,41 @@
+From 3b043c7fe5efc7c7ff437957f45a1356dc40e484 Mon Sep 17 00:00:00 2001
+From: Kent Russell <kent.russell@amd.com>
+Date: Tue, 10 Sep 2019 15:48:55 -0400
+Subject: [PATCH 3802/4256] Revert "drm/amdgpu/nbio7.4: add hw bug workaround
+ for vega20"
+
+This reverts commit e01f2d41895102d824c6b8f5e011dd5e286d5e8b.
+
+VG20 did not require this workaround, as the fix is in the VBIOS.
+Leave VG10/12 workaround as some older shipped cards do not have the
+VBIOS fix in place, and the kernel workaround is required in those
+situations
+
+Change-Id: I2d7c394ce9d205d97be6acfa5edc4635951fdadf
+Signed-off-by: Kent Russell <kent.russell@amd.com>
+Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
+---
+ drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 6 ------
+ 1 file changed, 6 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+index b776332d979f..238c2483496a 100644
+--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
++++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+@@ -308,13 +308,7 @@ static void nbio_v7_4_detect_hw_virt(struct amdgpu_device *adev)
+
+ static void nbio_v7_4_init_registers(struct amdgpu_device *adev)
+ {
+- uint32_t def, data;
+-
+- def = data = RREG32_PCIE(smnPCIE_CI_CNTL);
+- data = REG_SET_FIELD(data, PCIE_CI_CNTL, CI_SLV_ORDERING_DIS, 1);
+
+- if (def != data)
+- WREG32_PCIE(smnPCIE_CI_CNTL, data);
+ }
+
+ static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device *adev)
+--
+2.17.1
+