diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3797-drm-amdgpu-allow-direct-submission-of-clears.patch')
| -rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3797-drm-amdgpu-allow-direct-submission-of-clears.patch | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3797-drm-amdgpu-allow-direct-submission-of-clears.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3797-drm-amdgpu-allow-direct-submission-of-clears.patch new file mode 100644 index 00000000..922210e9 --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3797-drm-amdgpu-allow-direct-submission-of-clears.patch @@ -0,0 +1,96 @@ +From 0a4b5606d82154cb9e4f1ca2adcea9ffbcc5a1ca Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com> +Date: Thu, 28 Mar 2019 10:53:33 +0100 +Subject: [PATCH 3797/4256] drm/amdgpu: allow direct submission of clears +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +For handling PD/PT clears directly in the fault handler. + +Signed-off-by: Christian König <christian.koenig@amd.com> +Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 17 +++++++++++------ + 1 file changed, 11 insertions(+), 6 deletions(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +index 364a17683506..b42436fafe4b 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +@@ -670,6 +670,7 @@ bool amdgpu_vm_ready(struct amdgpu_vm *vm) + * @adev: amdgpu_device pointer + * @vm: VM to clear BO from + * @bo: BO to clear ++ * @direct: use a direct update + * + * Root PD needs to be reserved when calling this. + * +@@ -678,7 +679,8 @@ bool amdgpu_vm_ready(struct amdgpu_vm *vm) + */ + static int amdgpu_vm_clear_bo(struct amdgpu_device *adev, + struct amdgpu_vm *vm, +- struct amdgpu_bo *bo) ++ struct amdgpu_bo *bo, ++ bool direct) + { + struct ttm_operation_ctx ctx = { true, false }; + unsigned level = adev->vm_manager.root_level; +@@ -736,6 +738,7 @@ static int amdgpu_vm_clear_bo(struct amdgpu_device *adev, + memset(¶ms, 0, sizeof(params)); + params.adev = adev; + params.vm = vm; ++ params.direct = direct; + + r = vm->update_funcs->prepare(¶ms, AMDGPU_FENCE_OWNER_KFD, NULL); + +@@ -825,7 +828,8 @@ static void amdgpu_vm_bo_param(struct amdgpu_device *adev, struct amdgpu_vm *vm, + */ + static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev, + struct amdgpu_vm *vm, +- struct amdgpu_vm_pt_cursor *cursor) ++ struct amdgpu_vm_pt_cursor *cursor, ++ bool direct) + { + struct amdgpu_vm_pt *entry = cursor->entry; + struct amdgpu_bo_param bp; +@@ -858,7 +862,7 @@ static int amdgpu_vm_alloc_pts(struct amdgpu_device *adev, + pt->parent = amdgpu_bo_ref(cursor->parent->base.bo); + amdgpu_vm_bo_base_init(&entry->base, vm, pt); + +- r = amdgpu_vm_clear_bo(adev, vm, pt); ++ r = amdgpu_vm_clear_bo(adev, vm, pt, direct); + if (r) + goto error_free_pt; + +@@ -1366,7 +1370,8 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params, + uint64_t incr, entry_end, pe_start; + struct amdgpu_bo *pt; + +- r = amdgpu_vm_alloc_pts(params->adev, params->vm, &cursor); ++ r = amdgpu_vm_alloc_pts(params->adev, params->vm, &cursor, ++ params->direct); + if (r) + return r; + +@@ -2709,7 +2714,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm, + + amdgpu_vm_bo_base_init(&vm->root.base, vm, root); + +- r = amdgpu_vm_clear_bo(adev, vm, root); ++ r = amdgpu_vm_clear_bo(adev, vm, root, false); + if (r) + goto error_unreserve; + +@@ -2820,7 +2825,7 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm) + */ + if (pte_support_ats != vm->pte_support_ats) { + vm->pte_support_ats = pte_support_ats; +- r = amdgpu_vm_clear_bo(adev, vm, vm->root.base.bo); ++ r = amdgpu_vm_clear_bo(adev, vm, vm->root.base.bo, false); + if (r) + goto error; + } +-- +2.17.1 + |