diff options
Diffstat (limited to 'meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3778-drm-amd-display-add-Asic-ID-for-Dali.patch')
-rw-r--r-- | meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3778-drm-amd-display-add-Asic-ID-for-Dali.patch | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3778-drm-amd-display-add-Asic-ID-for-Dali.patch b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3778-drm-amd-display-add-Asic-ID-for-Dali.patch new file mode 100644 index 00000000..6a40d36b --- /dev/null +++ b/meta-amd-bsp/recipes-kernel/linux/linux-yocto-4.19.8/3778-drm-amd-display-add-Asic-ID-for-Dali.patch @@ -0,0 +1,38 @@ +From 22cf5278c460d2cfa3d5a80239078a28a4e3e146 Mon Sep 17 00:00:00 2001 +From: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Date: Fri, 6 Sep 2019 16:31:21 -0400 +Subject: [PATCH 3778/4256] drm/amd/display: add Asic ID for Dali + +Dali is a new asic revision based on raven2 + +Add the ID and ASICREV_IS_DALI define + +Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> +Reviewed-by: Huang Rui <ray.huang@amd.com> +Acked-by: Harry Wentland <harry.wentland@amd.com> +--- + drivers/gpu/drm/amd/display/include/dal_asic_id.h | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h b/drivers/gpu/drm/amd/display/include/dal_asic_id.h +index 47c156800e1e..68e8f6378d40 100644 +--- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h ++++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h +@@ -137,9 +137,13 @@ + #define RAVEN1_F0 0xF0 + #define RAVEN_UNKNOWN 0xFF + ++#define PICASSO_15D8_REV_E3 0xE3 ++#define PICASSO_15D8_REV_E4 0xE4 ++ + #define ASICREV_IS_RAVEN(eChipRev) ((eChipRev >= RAVEN_A0) && eChipRev < RAVEN_UNKNOWN) + #define ASICREV_IS_PICASSO(eChipRev) ((eChipRev >= PICASSO_A0) && (eChipRev < RAVEN2_A0)) +-#define ASICREV_IS_RAVEN2(eChipRev) ((eChipRev >= RAVEN2_A0) && (eChipRev < 0xF0)) ++#define ASICREV_IS_RAVEN2(eChipRev) ((eChipRev >= RAVEN2_A0) && (eChipRev < PICASSO_15D8_REV_E3)) ++#define ASICREV_IS_DALI(eChipRev) ((eChipRev >= PICASSO_15D8_REV_E3) && (eChipRev < RAVEN1_F0)) + + #define ASICREV_IS_RV1_F0(eChipRev) ((eChipRev >= RAVEN1_F0) && (eChipRev < RAVEN_UNKNOWN)) + +-- +2.17.1 + |